.. | .. |
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1 | | -/****************************************************************************** |
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2 | | - * |
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3 | | - * Copyright(c) 2009-2012 Realtek Corporation. |
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4 | | - * |
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5 | | - * This program is free software; you can redistribute it and/or modify it |
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6 | | - * under the terms of version 2 of the GNU General Public License as |
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7 | | - * published by the Free Software Foundation. |
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8 | | - * |
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9 | | - * This program is distributed in the hope that it will be useful, but WITHOUT |
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10 | | - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
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11 | | - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
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12 | | - * more details. |
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13 | | - * |
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14 | | - * The full GNU General Public License is included in this distribution in the |
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15 | | - * file called LICENSE. |
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16 | | - * |
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17 | | - * Contact Information: |
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18 | | - * wlanfae <wlanfae@realtek.com> |
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19 | | - * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park, |
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20 | | - * Hsinchu 300, Taiwan. |
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21 | | - * |
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22 | | - * Larry Finger <Larry.Finger@lwfinger.net> |
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23 | | - * |
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24 | | - *****************************************************************************/ |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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| 2 | +/* Copyright(c) 2009-2012 Realtek Corporation.*/ |
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25 | 3 | |
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26 | 4 | #include "../wifi.h" |
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27 | 5 | #include "../pci.h" |
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.. | .. |
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59 | 37 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
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60 | 38 | u32 original_value = 0, readback_value, bitshift; |
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61 | 39 | struct rtl_phy *rtlphy = &rtlpriv->phy; |
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62 | | - unsigned long flags; |
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63 | 40 | |
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64 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
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65 | | - "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n", |
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66 | | - regaddr, rfpath, bitmask); |
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| 41 | + rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, |
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| 42 | + "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n", |
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| 43 | + regaddr, rfpath, bitmask); |
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67 | 44 | |
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68 | | - spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags); |
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| 45 | + spin_lock(&rtlpriv->locks.rf_lock); |
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69 | 46 | |
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70 | 47 | if (rtlphy->rf_mode != RF_OP_BY_FW) { |
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71 | 48 | original_value = rtl8723_phy_rf_serial_read(hw, |
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.. | .. |
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75 | 52 | bitshift = rtl8723_phy_calculate_bit_shift(bitmask); |
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76 | 53 | readback_value = (original_value & bitmask) >> bitshift; |
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77 | 54 | |
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78 | | - spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags); |
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| 55 | + spin_unlock(&rtlpriv->locks.rf_lock); |
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79 | 56 | |
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80 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
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81 | | - "regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n", |
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82 | | - regaddr, rfpath, bitmask, original_value); |
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| 57 | + rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, |
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| 58 | + "regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n", |
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| 59 | + regaddr, rfpath, bitmask, original_value); |
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83 | 60 | |
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84 | 61 | return readback_value; |
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85 | 62 | } |
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.. | .. |
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91 | 68 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
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92 | 69 | struct rtl_phy *rtlphy = &rtlpriv->phy; |
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93 | 70 | u32 original_value = 0, bitshift; |
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94 | | - unsigned long flags; |
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95 | 71 | |
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96 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
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97 | | - "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", |
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98 | | - regaddr, bitmask, data, rfpath); |
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| 72 | + rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, |
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| 73 | + "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", |
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| 74 | + regaddr, bitmask, data, rfpath); |
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99 | 75 | |
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100 | | - spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags); |
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| 76 | + spin_lock(&rtlpriv->locks.rf_lock); |
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101 | 77 | |
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102 | 78 | if (rtlphy->rf_mode != RF_OP_BY_FW) { |
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103 | 79 | if (bitmask != RFREG_OFFSET_MASK) { |
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.. | .. |
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121 | 97 | _rtl8723e_phy_fw_rf_serial_write(hw, rfpath, regaddr, data); |
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122 | 98 | } |
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123 | 99 | |
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124 | | - spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags); |
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| 100 | + spin_unlock(&rtlpriv->locks.rf_lock); |
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125 | 101 | |
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126 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE, |
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127 | | - "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", |
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128 | | - regaddr, bitmask, data, rfpath); |
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| 102 | + rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, |
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| 103 | + "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n", |
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| 104 | + regaddr, bitmask, data, rfpath); |
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129 | 105 | |
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130 | 106 | } |
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131 | 107 | |
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.. | .. |
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209 | 185 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); |
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210 | 186 | bool rtstatus; |
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211 | 187 | |
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212 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "\n"); |
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| 188 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "\n"); |
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213 | 189 | rtstatus = _rtl8723e_phy_config_bb_with_headerfile(hw, |
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214 | 190 | BASEBAND_CONFIG_PHY_REG); |
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215 | | - if (rtstatus != true) { |
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| 191 | + if (!rtstatus) { |
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216 | 192 | pr_err("Write BB Reg Fail!!\n"); |
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217 | 193 | return false; |
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218 | 194 | } |
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219 | 195 | |
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220 | 196 | if (rtlphy->rf_type == RF_1T2R) { |
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221 | 197 | _rtl8723e_phy_bb_config_1t(hw); |
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222 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Config to 1T!!\n"); |
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| 198 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Config to 1T!!\n"); |
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223 | 199 | } |
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224 | 200 | if (rtlefuse->autoload_failflag == false) { |
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225 | 201 | rtlphy->pwrgroup_cnt = 0; |
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226 | 202 | rtstatus = _rtl8723e_phy_config_bb_with_pgheaderfile(hw, |
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227 | 203 | BASEBAND_CONFIG_PHY_REG); |
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228 | 204 | } |
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229 | | - if (rtstatus != true) { |
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| 205 | + if (!rtstatus) { |
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230 | 206 | pr_err("BB_PG Reg Fail!!\n"); |
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231 | 207 | return false; |
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232 | 208 | } |
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233 | 209 | rtstatus = |
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234 | 210 | _rtl8723e_phy_config_bb_with_headerfile(hw, BASEBAND_CONFIG_AGC_TAB); |
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235 | | - if (rtstatus != true) { |
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| 211 | + if (!rtstatus) { |
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236 | 212 | pr_err("AGC Table Fail\n"); |
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237 | 213 | return false; |
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238 | 214 | } |
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.. | .. |
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250 | 226 | u32 arraylength; |
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251 | 227 | u32 *ptrarray; |
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252 | 228 | |
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253 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl723MACPHY_Array\n"); |
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| 229 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl723MACPHY_Array\n"); |
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254 | 230 | arraylength = RTL8723E_MACARRAYLENGTH; |
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255 | 231 | ptrarray = RTL8723EMAC_ARRAY; |
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256 | 232 | |
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257 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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258 | | - "Img:RTL8192CEMAC_2T_ARRAY\n"); |
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| 233 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 234 | + "Img:RTL8192CEMAC_2T_ARRAY\n"); |
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259 | 235 | for (i = 0; i < arraylength; i = i + 2) |
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260 | 236 | rtl_write_byte(rtlpriv, ptrarray[i], (u8) ptrarray[i + 1]); |
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261 | 237 | return true; |
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.. | .. |
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291 | 267 | rtl_set_bbreg(hw, phy_regarray_table[i], MASKDWORD, |
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292 | 268 | phy_regarray_table[i + 1]); |
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293 | 269 | udelay(1); |
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294 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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295 | | - "The phy_regarray_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n", |
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296 | | - phy_regarray_table[i], |
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297 | | - phy_regarray_table[i + 1]); |
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| 270 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 271 | + "The phy_regarray_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n", |
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| 272 | + phy_regarray_table[i], |
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| 273 | + phy_regarray_table[i + 1]); |
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298 | 274 | } |
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299 | 275 | } else if (configtype == BASEBAND_CONFIG_AGC_TAB) { |
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300 | 276 | for (i = 0; i < agctab_arraylen; i = i + 2) { |
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301 | 277 | rtl_set_bbreg(hw, agctab_array_table[i], MASKDWORD, |
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302 | 278 | agctab_array_table[i + 1]); |
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303 | 279 | udelay(1); |
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304 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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305 | | - "The agctab_array_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n", |
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306 | | - agctab_array_table[i], |
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307 | | - agctab_array_table[i + 1]); |
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| 280 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 281 | + "The agctab_array_table[0] is %x Rtl819XPHY_REGArray[1] is %x\n", |
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| 282 | + agctab_array_table[i], |
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| 283 | + agctab_array_table[i + 1]); |
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308 | 284 | } |
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309 | 285 | } |
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310 | 286 | return true; |
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.. | .. |
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320 | 296 | if (regaddr == RTXAGC_A_RATE18_06) { |
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321 | 297 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][0] = |
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322 | 298 | data; |
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323 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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324 | | - "MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n", |
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325 | | - rtlphy->pwrgroup_cnt, |
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326 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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327 | | - pwrgroup_cnt][0]); |
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| 299 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 300 | + "MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n", |
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| 301 | + rtlphy->pwrgroup_cnt, |
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| 302 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 303 | + [rtlphy->pwrgroup_cnt][0]); |
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328 | 304 | } |
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329 | 305 | if (regaddr == RTXAGC_A_RATE54_24) { |
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330 | 306 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][1] = |
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331 | 307 | data; |
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332 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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333 | | - "MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n", |
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334 | | - rtlphy->pwrgroup_cnt, |
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335 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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| 308 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 309 | + "MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n", |
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| 310 | + rtlphy->pwrgroup_cnt, |
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| 311 | + rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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336 | 312 | pwrgroup_cnt][1]); |
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337 | 313 | } |
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338 | 314 | if (regaddr == RTXAGC_A_CCK1_MCS32) { |
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339 | 315 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][6] = |
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340 | 316 | data; |
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341 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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342 | | - "MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n", |
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343 | | - rtlphy->pwrgroup_cnt, |
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344 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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345 | | - pwrgroup_cnt][6]); |
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| 317 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 318 | + "MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n", |
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| 319 | + rtlphy->pwrgroup_cnt, |
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| 320 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 321 | + [rtlphy->pwrgroup_cnt][6]); |
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346 | 322 | } |
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347 | 323 | if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) { |
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348 | 324 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][7] = |
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349 | 325 | data; |
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350 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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351 | | - "MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n", |
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352 | | - rtlphy->pwrgroup_cnt, |
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353 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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354 | | - pwrgroup_cnt][7]); |
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| 326 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 327 | + "MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n", |
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| 328 | + rtlphy->pwrgroup_cnt, |
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| 329 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 330 | + [rtlphy->pwrgroup_cnt][7]); |
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355 | 331 | } |
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356 | 332 | if (regaddr == RTXAGC_A_MCS03_MCS00) { |
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357 | 333 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][2] = |
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358 | 334 | data; |
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359 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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360 | | - "MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n", |
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361 | | - rtlphy->pwrgroup_cnt, |
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362 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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363 | | - pwrgroup_cnt][2]); |
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| 335 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 336 | + "MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n", |
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| 337 | + rtlphy->pwrgroup_cnt, |
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| 338 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 339 | + [rtlphy->pwrgroup_cnt][2]); |
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364 | 340 | } |
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365 | 341 | if (regaddr == RTXAGC_A_MCS07_MCS04) { |
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366 | 342 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][3] = |
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367 | 343 | data; |
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368 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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369 | | - "MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n", |
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370 | | - rtlphy->pwrgroup_cnt, |
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371 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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372 | | - pwrgroup_cnt][3]); |
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| 344 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 345 | + "MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n", |
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| 346 | + rtlphy->pwrgroup_cnt, |
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| 347 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 348 | + [rtlphy->pwrgroup_cnt][3]); |
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373 | 349 | } |
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374 | 350 | if (regaddr == RTXAGC_A_MCS11_MCS08) { |
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375 | 351 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][4] = |
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376 | 352 | data; |
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377 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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378 | | - "MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n", |
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379 | | - rtlphy->pwrgroup_cnt, |
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380 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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381 | | - pwrgroup_cnt][4]); |
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| 353 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 354 | + "MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n", |
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| 355 | + rtlphy->pwrgroup_cnt, |
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| 356 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 357 | + [rtlphy->pwrgroup_cnt][4]); |
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382 | 358 | } |
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383 | 359 | if (regaddr == RTXAGC_A_MCS15_MCS12) { |
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384 | 360 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][5] = |
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385 | 361 | data; |
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386 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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387 | | - "MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n", |
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388 | | - rtlphy->pwrgroup_cnt, |
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389 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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390 | | - pwrgroup_cnt][5]); |
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| 362 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 363 | + "MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n", |
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| 364 | + rtlphy->pwrgroup_cnt, |
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| 365 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 366 | + [rtlphy->pwrgroup_cnt][5]); |
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391 | 367 | } |
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392 | 368 | if (regaddr == RTXAGC_B_RATE18_06) { |
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393 | 369 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][8] = |
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394 | 370 | data; |
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395 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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396 | | - "MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n", |
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397 | | - rtlphy->pwrgroup_cnt, |
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398 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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399 | | - pwrgroup_cnt][8]); |
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| 371 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 372 | + "MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n", |
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| 373 | + rtlphy->pwrgroup_cnt, |
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| 374 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 375 | + [rtlphy->pwrgroup_cnt][8]); |
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400 | 376 | } |
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401 | 377 | if (regaddr == RTXAGC_B_RATE54_24) { |
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402 | 378 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][9] = |
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403 | 379 | data; |
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404 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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405 | | - "MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n", |
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406 | | - rtlphy->pwrgroup_cnt, |
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407 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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408 | | - pwrgroup_cnt][9]); |
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| 380 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 381 | + "MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n", |
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| 382 | + rtlphy->pwrgroup_cnt, |
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| 383 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 384 | + [rtlphy->pwrgroup_cnt][9]); |
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409 | 385 | } |
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410 | 386 | if (regaddr == RTXAGC_B_CCK1_55_MCS32) { |
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411 | 387 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][14] = |
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412 | 388 | data; |
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413 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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414 | | - "MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n", |
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415 | | - rtlphy->pwrgroup_cnt, |
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416 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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417 | | - pwrgroup_cnt][14]); |
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| 389 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 390 | + "MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n", |
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| 391 | + rtlphy->pwrgroup_cnt, |
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| 392 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 393 | + [rtlphy->pwrgroup_cnt][14]); |
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418 | 394 | } |
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419 | 395 | if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) { |
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420 | 396 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][15] = |
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421 | 397 | data; |
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422 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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423 | | - "MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n", |
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424 | | - rtlphy->pwrgroup_cnt, |
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425 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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426 | | - pwrgroup_cnt][15]); |
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| 398 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 399 | + "MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n", |
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| 400 | + rtlphy->pwrgroup_cnt, |
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| 401 | + rtlphy->mcs_txpwrlevel_origoffset |
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| 402 | + [rtlphy->pwrgroup_cnt][15]); |
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427 | 403 | } |
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428 | 404 | if (regaddr == RTXAGC_B_MCS03_MCS00) { |
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429 | 405 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][10] = |
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430 | 406 | data; |
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431 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
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432 | | - "MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n", |
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433 | | - rtlphy->pwrgroup_cnt, |
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434 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
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435 | | - pwrgroup_cnt][10]); |
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| 407 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
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| 408 | + "MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n", |
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| 409 | + rtlphy->pwrgroup_cnt, |
---|
| 410 | + rtlphy->mcs_txpwrlevel_origoffset |
---|
| 411 | + [rtlphy->pwrgroup_cnt][10]); |
---|
436 | 412 | } |
---|
437 | 413 | if (regaddr == RTXAGC_B_MCS07_MCS04) { |
---|
438 | 414 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][11] = |
---|
439 | 415 | data; |
---|
440 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
441 | | - "MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n", |
---|
442 | | - rtlphy->pwrgroup_cnt, |
---|
443 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
---|
444 | | - pwrgroup_cnt][11]); |
---|
| 416 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
| 417 | + "MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n", |
---|
| 418 | + rtlphy->pwrgroup_cnt, |
---|
| 419 | + rtlphy->mcs_txpwrlevel_origoffset |
---|
| 420 | + [rtlphy->pwrgroup_cnt][11]); |
---|
445 | 421 | } |
---|
446 | 422 | if (regaddr == RTXAGC_B_MCS11_MCS08) { |
---|
447 | 423 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][12] = |
---|
448 | 424 | data; |
---|
449 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
450 | | - "MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n", |
---|
451 | | - rtlphy->pwrgroup_cnt, |
---|
452 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
---|
453 | | - pwrgroup_cnt][12]); |
---|
| 425 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
| 426 | + "MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n", |
---|
| 427 | + rtlphy->pwrgroup_cnt, |
---|
| 428 | + rtlphy->mcs_txpwrlevel_origoffset |
---|
| 429 | + [rtlphy->pwrgroup_cnt][12]); |
---|
454 | 430 | } |
---|
455 | 431 | if (regaddr == RTXAGC_B_MCS15_MCS12) { |
---|
456 | 432 | rtlphy->mcs_txpwrlevel_origoffset[rtlphy->pwrgroup_cnt][13] = |
---|
457 | 433 | data; |
---|
458 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
459 | | - "MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n", |
---|
460 | | - rtlphy->pwrgroup_cnt, |
---|
461 | | - rtlphy->mcs_txpwrlevel_origoffset[rtlphy-> |
---|
462 | | - pwrgroup_cnt][13]); |
---|
| 434 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
| 435 | + "MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n", |
---|
| 436 | + rtlphy->pwrgroup_cnt, |
---|
| 437 | + rtlphy->mcs_txpwrlevel_origoffset |
---|
| 438 | + [rtlphy->pwrgroup_cnt][13]); |
---|
463 | 439 | |
---|
464 | 440 | rtlphy->pwrgroup_cnt++; |
---|
465 | 441 | } |
---|
.. | .. |
---|
497 | 473 | phy_regarray_table_pg[i + 2]); |
---|
498 | 474 | } |
---|
499 | 475 | } else { |
---|
500 | | - RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, |
---|
501 | | - "configtype != BaseBand_Config_PHY_REG\n"); |
---|
| 476 | + rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, |
---|
| 477 | + "configtype != BaseBand_Config_PHY_REG\n"); |
---|
502 | 478 | } |
---|
503 | 479 | return true; |
---|
504 | 480 | } |
---|
.. | .. |
---|
507 | 483 | enum radio_path rfpath) |
---|
508 | 484 | { |
---|
509 | 485 | int i; |
---|
510 | | - bool rtstatus = true; |
---|
511 | 486 | u32 *radioa_array_table; |
---|
512 | | - u32 *radiob_array_table; |
---|
513 | | - u16 radioa_arraylen, radiob_arraylen; |
---|
| 487 | + u16 radioa_arraylen; |
---|
514 | 488 | |
---|
515 | 489 | radioa_arraylen = RTL8723ERADIOA_1TARRAYLENGTH; |
---|
516 | 490 | radioa_array_table = RTL8723E_RADIOA_1TARRAY; |
---|
517 | | - radiob_arraylen = RTL8723E_RADIOB_1TARRAYLENGTH; |
---|
518 | | - radiob_array_table = RTL8723E_RADIOB_1TARRAY; |
---|
519 | | - |
---|
520 | | - rtstatus = true; |
---|
521 | 491 | |
---|
522 | 492 | switch (rfpath) { |
---|
523 | 493 | case RF90_PATH_A: |
---|
.. | .. |
---|
564 | 534 | rtlphy->default_initialgain[3] = |
---|
565 | 535 | (u8) rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0); |
---|
566 | 536 | |
---|
567 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
568 | | - "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n", |
---|
569 | | - rtlphy->default_initialgain[0], |
---|
570 | | - rtlphy->default_initialgain[1], |
---|
571 | | - rtlphy->default_initialgain[2], |
---|
572 | | - rtlphy->default_initialgain[3]); |
---|
| 537 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
| 538 | + "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n", |
---|
| 539 | + rtlphy->default_initialgain[0], |
---|
| 540 | + rtlphy->default_initialgain[1], |
---|
| 541 | + rtlphy->default_initialgain[2], |
---|
| 542 | + rtlphy->default_initialgain[3]); |
---|
573 | 543 | |
---|
574 | 544 | rtlphy->framesync = (u8) rtl_get_bbreg(hw, |
---|
575 | 545 | ROFDM0_RXDETECTOR3, MASKBYTE0); |
---|
576 | 546 | rtlphy->framesync_c34 = rtl_get_bbreg(hw, |
---|
577 | 547 | ROFDM0_RXDETECTOR2, MASKDWORD); |
---|
578 | 548 | |
---|
579 | | - RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
580 | | - "Default framesync (0x%x) = 0x%x\n", |
---|
581 | | - ROFDM0_RXDETECTOR3, rtlphy->framesync); |
---|
| 549 | + rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, |
---|
| 550 | + "Default framesync (0x%x) = 0x%x\n", |
---|
| 551 | + ROFDM0_RXDETECTOR3, rtlphy->framesync); |
---|
582 | 552 | } |
---|
583 | 553 | |
---|
584 | 554 | void rtl8723e_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel) |
---|
.. | .. |
---|
652 | 622 | struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw)); |
---|
653 | 623 | u8 cckpowerlevel[2], ofdmpowerlevel[2]; |
---|
654 | 624 | |
---|
655 | | - if (rtlefuse->txpwr_fromeprom == false) |
---|
| 625 | + if (!rtlefuse->txpwr_fromeprom) |
---|
656 | 626 | return; |
---|
657 | 627 | _rtl8723e_get_txpower_index(hw, channel, |
---|
658 | 628 | &cckpowerlevel[0], &ofdmpowerlevel[0]); |
---|
.. | .. |
---|
680 | 650 | ofdmtxpwridx -= rtlefuse->legacy_ht_txpowerdiff; |
---|
681 | 651 | else |
---|
682 | 652 | ofdmtxpwridx = 0; |
---|
683 | | - RT_TRACE(rtlpriv, COMP_TXAGC, DBG_TRACE, |
---|
684 | | - "%lx dBm, ccktxpwridx = %d, ofdmtxpwridx = %d\n", |
---|
685 | | - power_indbm, ccktxpwridx, ofdmtxpwridx); |
---|
| 653 | + rtl_dbg(rtlpriv, COMP_TXAGC, DBG_TRACE, |
---|
| 654 | + "%lx dBm, ccktxpwridx = %d, ofdmtxpwridx = %d\n", |
---|
| 655 | + power_indbm, ccktxpwridx, ofdmtxpwridx); |
---|
686 | 656 | for (idx = 0; idx < 14; idx++) { |
---|
687 | 657 | for (rf_path = 0; rf_path < 2; rf_path++) { |
---|
688 | 658 | rtlefuse->txpwrlevel_cck[rf_path][idx] = ccktxpwridx; |
---|
.. | .. |
---|
764 | 734 | u8 reg_bw_opmode; |
---|
765 | 735 | u8 reg_prsr_rsc; |
---|
766 | 736 | |
---|
767 | | - RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, |
---|
768 | | - "Switch to %s bandwidth\n", |
---|
769 | | - rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ? |
---|
770 | | - "20MHz" : "40MHz"); |
---|
| 737 | + rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, |
---|
| 738 | + "Switch to %s bandwidth\n", |
---|
| 739 | + rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ? |
---|
| 740 | + "20MHz" : "40MHz"); |
---|
771 | 741 | |
---|
772 | 742 | if (is_hal_stop(rtlhal)) { |
---|
773 | 743 | rtlphy->set_bwmode_inprogress = false; |
---|
.. | .. |
---|
821 | 791 | } |
---|
822 | 792 | rtl8723e_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw); |
---|
823 | 793 | rtlphy->set_bwmode_inprogress = false; |
---|
824 | | - RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "\n"); |
---|
| 794 | + rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, "\n"); |
---|
825 | 795 | } |
---|
826 | 796 | |
---|
827 | 797 | void rtl8723e_phy_set_bw_mode(struct ieee80211_hw *hw, |
---|
.. | .. |
---|
838 | 808 | if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) { |
---|
839 | 809 | rtl8723e_phy_set_bw_mode_callback(hw); |
---|
840 | 810 | } else { |
---|
841 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
---|
842 | | - "false driver sleep or unload\n"); |
---|
| 811 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, |
---|
| 812 | + "false driver sleep or unload\n"); |
---|
843 | 813 | rtlphy->set_bwmode_inprogress = false; |
---|
844 | 814 | rtlphy->current_chan_bw = tmp_bw; |
---|
845 | 815 | } |
---|
.. | .. |
---|
852 | 822 | struct rtl_phy *rtlphy = &rtlpriv->phy; |
---|
853 | 823 | u32 delay; |
---|
854 | 824 | |
---|
855 | | - RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, |
---|
856 | | - "switch to channel%d\n", rtlphy->current_channel); |
---|
| 825 | + rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, |
---|
| 826 | + "switch to channel%d\n", rtlphy->current_channel); |
---|
857 | 827 | if (is_hal_stop(rtlhal)) |
---|
858 | 828 | return; |
---|
859 | 829 | do { |
---|
.. | .. |
---|
871 | 841 | } |
---|
872 | 842 | break; |
---|
873 | 843 | } while (true); |
---|
874 | | - RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "\n"); |
---|
| 844 | + rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, "\n"); |
---|
875 | 845 | } |
---|
876 | 846 | |
---|
877 | 847 | u8 rtl8723e_phy_sw_chnl(struct ieee80211_hw *hw) |
---|
.. | .. |
---|
891 | 861 | rtlphy->sw_chnl_step = 0; |
---|
892 | 862 | if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) { |
---|
893 | 863 | rtl8723e_phy_sw_chnl_callback(hw); |
---|
894 | | - RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD, |
---|
895 | | - "sw_chnl_inprogress false schedule workitem\n"); |
---|
| 864 | + rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD, |
---|
| 865 | + "sw_chnl_inprogress false schedule workitem\n"); |
---|
896 | 866 | rtlphy->sw_chnl_inprogress = false; |
---|
897 | 867 | } else { |
---|
898 | | - RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD, |
---|
899 | | - "sw_chnl_inprogress false driver sleep or unload\n"); |
---|
| 868 | + rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD, |
---|
| 869 | + "sw_chnl_inprogress false driver sleep or unload\n"); |
---|
900 | 870 | rtlphy->sw_chnl_inprogress = false; |
---|
901 | 871 | } |
---|
902 | 872 | return 1; |
---|
.. | .. |
---|
908 | 878 | struct rtl_phy *rtlphy = &rtlpriv->phy; |
---|
909 | 879 | struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw)); |
---|
910 | 880 | |
---|
911 | | - if (IS_81xxC_VENDOR_UMC_B_CUT(rtlhal->version)) { |
---|
| 881 | + if (IS_81XXC_VENDOR_UMC_B_CUT(rtlhal->version)) { |
---|
912 | 882 | if (channel == 6 && rtlphy->current_chan_bw == |
---|
913 | 883 | HT_CHANNEL_WIDTH_20) |
---|
914 | 884 | rtl_set_rfreg(hw, RF90_PATH_A, RF_RX_G1, |
---|
.. | .. |
---|
1021 | 991 | _rtl8723e_phy_sw_rf_seting(hw, channel); |
---|
1022 | 992 | break; |
---|
1023 | 993 | default: |
---|
1024 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
1025 | | - "switch case %#x not processed\n", |
---|
1026 | | - currentcmd->cmdid); |
---|
| 994 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
| 995 | + "switch case %#x not processed\n", |
---|
| 996 | + currentcmd->cmdid); |
---|
1027 | 997 | break; |
---|
1028 | 998 | } |
---|
1029 | 999 | |
---|
.. | .. |
---|
1366 | 1336 | |
---|
1367 | 1337 | long result[4][8]; |
---|
1368 | 1338 | u8 i, final_candidate; |
---|
1369 | | - bool b_patha_ok, b_pathb_ok; |
---|
1370 | | - long reg_e94, reg_e9c, reg_ea4, reg_eac, reg_eb4, reg_ebc, reg_ec4, |
---|
1371 | | - reg_ecc, reg_tmp = 0; |
---|
| 1339 | + bool b_patha_ok; |
---|
| 1340 | + long reg_e94, reg_e9c, reg_ea4, reg_eb4, reg_ebc, |
---|
| 1341 | + reg_tmp = 0; |
---|
1372 | 1342 | bool is12simular, is13simular, is23simular; |
---|
1373 | 1343 | u32 iqk_bb_reg[10] = { |
---|
1374 | 1344 | ROFDM0_XARXIQIMBALANCE, |
---|
.. | .. |
---|
1397 | 1367 | } |
---|
1398 | 1368 | final_candidate = 0xff; |
---|
1399 | 1369 | b_patha_ok = false; |
---|
1400 | | - b_pathb_ok = false; |
---|
1401 | 1370 | is12simular = false; |
---|
1402 | 1371 | is23simular = false; |
---|
1403 | 1372 | is13simular = false; |
---|
.. | .. |
---|
1437 | 1406 | reg_e94 = result[i][0]; |
---|
1438 | 1407 | reg_e9c = result[i][1]; |
---|
1439 | 1408 | reg_ea4 = result[i][2]; |
---|
1440 | | - reg_eac = result[i][3]; |
---|
1441 | 1409 | reg_eb4 = result[i][4]; |
---|
1442 | 1410 | reg_ebc = result[i][5]; |
---|
1443 | | - reg_ec4 = result[i][6]; |
---|
1444 | | - reg_ecc = result[i][7]; |
---|
1445 | 1411 | } |
---|
1446 | 1412 | if (final_candidate != 0xff) { |
---|
1447 | 1413 | rtlphy->reg_e94 = reg_e94 = result[final_candidate][0]; |
---|
1448 | 1414 | rtlphy->reg_e9c = reg_e9c = result[final_candidate][1]; |
---|
1449 | 1415 | reg_ea4 = result[final_candidate][2]; |
---|
1450 | | - reg_eac = result[final_candidate][3]; |
---|
1451 | 1416 | rtlphy->reg_eb4 = reg_eb4 = result[final_candidate][4]; |
---|
1452 | 1417 | rtlphy->reg_ebc = reg_ebc = result[final_candidate][5]; |
---|
1453 | | - reg_ec4 = result[final_candidate][6]; |
---|
1454 | | - reg_ecc = result[final_candidate][7]; |
---|
1455 | 1418 | b_patha_ok = true; |
---|
1456 | | - b_pathb_ok = true; |
---|
1457 | 1419 | } else { |
---|
1458 | 1420 | rtlphy->reg_e94 = rtlphy->reg_eb4 = 0x100; |
---|
1459 | 1421 | rtlphy->reg_e9c = rtlphy->reg_ebc = 0x0; |
---|
.. | .. |
---|
1482 | 1444 | struct rtl_phy *rtlphy = &rtlpriv->phy; |
---|
1483 | 1445 | bool postprocessing = false; |
---|
1484 | 1446 | |
---|
1485 | | - RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
1486 | | - "-->IO Cmd(%#x), set_io_inprogress(%d)\n", |
---|
1487 | | - iotype, rtlphy->set_io_inprogress); |
---|
| 1447 | + rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
| 1448 | + "-->IO Cmd(%#x), set_io_inprogress(%d)\n", |
---|
| 1449 | + iotype, rtlphy->set_io_inprogress); |
---|
1488 | 1450 | do { |
---|
1489 | 1451 | switch (iotype) { |
---|
1490 | 1452 | case IO_CMD_RESUME_DM_BY_SCAN: |
---|
1491 | | - RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
1492 | | - "[IO CMD] Resume DM after scan.\n"); |
---|
| 1453 | + rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
| 1454 | + "[IO CMD] Resume DM after scan.\n"); |
---|
1493 | 1455 | postprocessing = true; |
---|
1494 | 1456 | break; |
---|
1495 | 1457 | case IO_CMD_PAUSE_BAND0_DM_BY_SCAN: |
---|
1496 | | - RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
1497 | | - "[IO CMD] Pause DM before scan.\n"); |
---|
| 1458 | + rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
| 1459 | + "[IO CMD] Pause DM before scan.\n"); |
---|
1498 | 1460 | postprocessing = true; |
---|
1499 | 1461 | break; |
---|
1500 | 1462 | default: |
---|
1501 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
1502 | | - "switch case %#x not processed\n", iotype); |
---|
| 1463 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
| 1464 | + "switch case %#x not processed\n", iotype); |
---|
1503 | 1465 | break; |
---|
1504 | 1466 | } |
---|
1505 | 1467 | } while (false); |
---|
.. | .. |
---|
1510 | 1472 | return false; |
---|
1511 | 1473 | } |
---|
1512 | 1474 | rtl8723e_phy_set_io(hw); |
---|
1513 | | - RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype); |
---|
| 1475 | + rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype); |
---|
1514 | 1476 | return true; |
---|
1515 | 1477 | } |
---|
1516 | 1478 | |
---|
.. | .. |
---|
1520 | 1482 | struct rtl_phy *rtlphy = &rtlpriv->phy; |
---|
1521 | 1483 | struct dig_t *dm_digtable = &rtlpriv->dm_digtable; |
---|
1522 | 1484 | |
---|
1523 | | - RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
1524 | | - "--->Cmd(%#x), set_io_inprogress(%d)\n", |
---|
1525 | | - rtlphy->current_io_type, rtlphy->set_io_inprogress); |
---|
| 1485 | + rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
| 1486 | + "--->Cmd(%#x), set_io_inprogress(%d)\n", |
---|
| 1487 | + rtlphy->current_io_type, rtlphy->set_io_inprogress); |
---|
1526 | 1488 | switch (rtlphy->current_io_type) { |
---|
1527 | 1489 | case IO_CMD_RESUME_DM_BY_SCAN: |
---|
1528 | 1490 | dm_digtable->cur_igvalue = rtlphy->initgain_backup.xaagccore1; |
---|
.. | .. |
---|
1535 | 1497 | rtl8723e_dm_write_dig(hw); |
---|
1536 | 1498 | break; |
---|
1537 | 1499 | default: |
---|
1538 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
1539 | | - "switch case %#x not processed\n", |
---|
1540 | | - rtlphy->current_io_type); |
---|
| 1500 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
| 1501 | + "switch case %#x not processed\n", |
---|
| 1502 | + rtlphy->current_io_type); |
---|
1541 | 1503 | break; |
---|
1542 | 1504 | } |
---|
1543 | 1505 | rtlphy->set_io_inprogress = false; |
---|
1544 | | - RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
1545 | | - "(%#x)\n", rtlphy->current_io_type); |
---|
| 1506 | + rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, |
---|
| 1507 | + "(%#x)\n", rtlphy->current_io_type); |
---|
1546 | 1508 | } |
---|
1547 | 1509 | |
---|
1548 | 1510 | static void rtl8723e_phy_set_rf_on(struct ieee80211_hw *hw) |
---|
.. | .. |
---|
1579 | 1541 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); |
---|
1580 | 1542 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3); |
---|
1581 | 1543 | rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00); |
---|
1582 | | - RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE, |
---|
1583 | | - "Switch RF timeout !!!.\n"); |
---|
| 1544 | + rtl_dbg(rtlpriv, COMP_POWER, DBG_TRACE, |
---|
| 1545 | + "Switch RF timeout !!!.\n"); |
---|
1584 | 1546 | return; |
---|
1585 | 1547 | } |
---|
1586 | 1548 | rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2); |
---|
.. | .. |
---|
1607 | 1569 | |
---|
1608 | 1570 | do { |
---|
1609 | 1571 | initializecount++; |
---|
1610 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
---|
1611 | | - "IPS Set eRf nic enable\n"); |
---|
| 1572 | + rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG, |
---|
| 1573 | + "IPS Set eRf nic enable\n"); |
---|
1612 | 1574 | rtstatus = rtl_ps_enable_nic(hw); |
---|
1613 | 1575 | } while (!rtstatus && (initializecount < 10)); |
---|
1614 | 1576 | RT_CLEAR_PS_LEVEL(ppsc, |
---|
1615 | 1577 | RT_RF_OFF_LEVL_HALT_NIC); |
---|
1616 | 1578 | } else { |
---|
1617 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
---|
1618 | | - "Set ERFON sleeped:%d ms\n", |
---|
1619 | | - jiffies_to_msecs(jiffies - |
---|
1620 | | - ppsc-> |
---|
1621 | | - last_sleep_jiffies)); |
---|
| 1579 | + rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG, |
---|
| 1580 | + "Set ERFON slept:%d ms\n", |
---|
| 1581 | + jiffies_to_msecs(jiffies - |
---|
| 1582 | + ppsc->last_sleep_jiffies)); |
---|
1622 | 1583 | ppsc->last_awake_jiffies = jiffies; |
---|
1623 | 1584 | rtl8723e_phy_set_rf_on(hw); |
---|
1624 | 1585 | } |
---|
.. | .. |
---|
1632 | 1593 | break; |
---|
1633 | 1594 | case ERFOFF: |
---|
1634 | 1595 | if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) { |
---|
1635 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
---|
1636 | | - "IPS Set eRf nic disable\n"); |
---|
| 1596 | + rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG, |
---|
| 1597 | + "IPS Set eRf nic disable\n"); |
---|
1637 | 1598 | rtl_ps_disable_nic(hw); |
---|
1638 | 1599 | RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC); |
---|
1639 | 1600 | } else { |
---|
.. | .. |
---|
1657 | 1618 | queue_id++; |
---|
1658 | 1619 | continue; |
---|
1659 | 1620 | } else { |
---|
1660 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
---|
1661 | | - "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n", |
---|
1662 | | - (i + 1), queue_id, |
---|
1663 | | - skb_queue_len(&ring->queue)); |
---|
| 1621 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, |
---|
| 1622 | + "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n", |
---|
| 1623 | + (i + 1), queue_id, |
---|
| 1624 | + skb_queue_len(&ring->queue)); |
---|
1664 | 1625 | |
---|
1665 | 1626 | udelay(10); |
---|
1666 | 1627 | i++; |
---|
1667 | 1628 | } |
---|
1668 | 1629 | if (i >= MAX_DOZE_WAITING_TIMES_9x) { |
---|
1669 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING, |
---|
1670 | | - "ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n", |
---|
1671 | | - MAX_DOZE_WAITING_TIMES_9x, |
---|
1672 | | - queue_id, |
---|
1673 | | - skb_queue_len(&ring->queue)); |
---|
| 1630 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING, |
---|
| 1631 | + "ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n", |
---|
| 1632 | + MAX_DOZE_WAITING_TIMES_9x, |
---|
| 1633 | + queue_id, |
---|
| 1634 | + skb_queue_len(&ring->queue)); |
---|
1674 | 1635 | break; |
---|
1675 | 1636 | } |
---|
1676 | 1637 | } |
---|
1677 | | - RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, |
---|
1678 | | - "Set ERFSLEEP awaked:%d ms\n", |
---|
1679 | | - jiffies_to_msecs(jiffies - |
---|
1680 | | - ppsc->last_awake_jiffies)); |
---|
| 1638 | + rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG, |
---|
| 1639 | + "Set ERFSLEEP awaked:%d ms\n", |
---|
| 1640 | + jiffies_to_msecs(jiffies - |
---|
| 1641 | + ppsc->last_awake_jiffies)); |
---|
1681 | 1642 | ppsc->last_sleep_jiffies = jiffies; |
---|
1682 | 1643 | _rtl8723e_phy_set_rf_sleep(hw); |
---|
1683 | 1644 | break; |
---|
1684 | 1645 | default: |
---|
1685 | | - RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
1686 | | - "switch case %#x not processed\n", rfpwr_state); |
---|
| 1646 | + rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD, |
---|
| 1647 | + "switch case %#x not processed\n", rfpwr_state); |
---|
1687 | 1648 | bresult = false; |
---|
1688 | 1649 | break; |
---|
1689 | 1650 | } |
---|