forked from ~ljy/RK356X_SDK_RELEASE

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hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/trx.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2014  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2014  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../pci.h"
....@@ -56,7 +34,7 @@
5634 {
5735 	struct rtl_priv *rtlpriv = rtl_priv(hw);
5836 	struct phy_status_rpt *p_phystrpt = (struct phy_status_rpt *)p_drvinfo;
59
-	s8 rx_pwr_all = 0, rx_pwr[4];
37
+	s8 rx_pwr_all, rx_pwr[4];
6038 	u8 rf_rx_num = 0, evm, pwdb_all;
6139 	u8 i, max_spatial_stream;
6240 	u32 rssi, total_rssi = 0;
....@@ -117,6 +95,7 @@
11795 				rx_pwr_all = 14 - 2 * vga_idx;
11896 				break;
11997 		default:
98
+				rx_pwr_all = 0;
12099 				break;
121100 		}
122101 		rx_pwr_all += 16;
....@@ -293,13 +272,14 @@
293272 }
294273 
295274 static void _rtl92ee_insert_emcontent(struct rtl_tcb_desc *ptcb_desc,
296
-				      u8 *virtualaddress)
275
+				      u8 *virtualaddress8)
297276 {
298
-	u32 dwtmp = 0;
277
+	u32 dwtmp;
278
+	__le32 *virtualaddress = (__le32 *)virtualaddress8;
299279 
300280 	memset(virtualaddress, 0, 8);
301281 
302
-	SET_EARLYMODE_PKTNUM(virtualaddress, ptcb_desc->empkt_num);
282
+	set_earlymode_pktnum(virtualaddress, ptcb_desc->empkt_num);
303283 	if (ptcb_desc->empkt_num == 1) {
304284 		dwtmp = ptcb_desc->empkt_len[0];
305285 	} else {
....@@ -307,7 +287,7 @@
307287 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
308288 		dwtmp += ptcb_desc->empkt_len[1];
309289 	}
310
-	SET_EARLYMODE_LEN0(virtualaddress, dwtmp);
290
+	set_earlymode_len0(virtualaddress, dwtmp);
311291 
312292 	if (ptcb_desc->empkt_num <= 3) {
313293 		dwtmp = ptcb_desc->empkt_len[2];
....@@ -316,7 +296,7 @@
316296 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
317297 		dwtmp += ptcb_desc->empkt_len[3];
318298 	}
319
-	SET_EARLYMODE_LEN1(virtualaddress, dwtmp);
299
+	set_earlymode_len1(virtualaddress, dwtmp);
320300 	if (ptcb_desc->empkt_num <= 5) {
321301 		dwtmp = ptcb_desc->empkt_len[4];
322302 	} else {
....@@ -324,8 +304,8 @@
324304 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
325305 		dwtmp += ptcb_desc->empkt_len[5];
326306 	}
327
-	SET_EARLYMODE_LEN2_1(virtualaddress, dwtmp & 0xF);
328
-	SET_EARLYMODE_LEN2_2(virtualaddress, dwtmp >> 4);
307
+	set_earlymode_len2_1(virtualaddress, dwtmp & 0xF);
308
+	set_earlymode_len2_2(virtualaddress, dwtmp >> 4);
329309 	if (ptcb_desc->empkt_num <= 7) {
330310 		dwtmp = ptcb_desc->empkt_len[6];
331311 	} else {
....@@ -333,7 +313,7 @@
333313 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
334314 		dwtmp += ptcb_desc->empkt_len[7];
335315 	}
336
-	SET_EARLYMODE_LEN3(virtualaddress, dwtmp);
316
+	set_earlymode_len3(virtualaddress, dwtmp);
337317 	if (ptcb_desc->empkt_num <= 9) {
338318 		dwtmp = ptcb_desc->empkt_len[8];
339319 	} else {
....@@ -341,49 +321,51 @@
341321 		dwtmp += ((dwtmp % 4) ? (4 - dwtmp % 4) : 0) + 4;
342322 		dwtmp += ptcb_desc->empkt_len[9];
343323 	}
344
-	SET_EARLYMODE_LEN4(virtualaddress, dwtmp);
324
+	set_earlymode_len4(virtualaddress, dwtmp);
345325 }
346326 
347327 bool rtl92ee_rx_query_desc(struct ieee80211_hw *hw,
348328 			   struct rtl_stats *status,
349329 			   struct ieee80211_rx_status *rx_status,
350
-			   u8 *pdesc, struct sk_buff *skb)
330
+			   u8 *pdesc8, struct sk_buff *skb)
351331 {
352332 	struct rtl_priv *rtlpriv = rtl_priv(hw);
353333 	struct rx_fwinfo *p_drvinfo;
354334 	struct ieee80211_hdr *hdr;
355
-	u32 phystatus = GET_RX_DESC_PHYST(pdesc);
335
+	__le32 *pdesc = (__le32 *)pdesc8;
336
+	u32 phystatus = get_rx_desc_physt(pdesc);
337
+	u8 wake_match;
356338 
357
-	if (GET_RX_STATUS_DESC_RPT_SEL(pdesc) == 0)
339
+	if (get_rx_status_desc_rpt_sel(pdesc) == 0)
358340 		status->packet_report_type = NORMAL_RX;
359341 	else
360342 		status->packet_report_type = C2H_PACKET;
361
-	status->length = (u16)GET_RX_DESC_PKT_LEN(pdesc);
362
-	status->rx_drvinfo_size = (u8)GET_RX_DESC_DRV_INFO_SIZE(pdesc) *
343
+	status->length = (u16)get_rx_desc_pkt_len(pdesc);
344
+	status->rx_drvinfo_size = (u8)get_rx_desc_drv_info_size(pdesc) *
363345 				  RX_DRV_INFO_SIZE_UNIT;
364
-	status->rx_bufshift = (u8)(GET_RX_DESC_SHIFT(pdesc) & 0x03);
365
-	status->icv = (u16)GET_RX_DESC_ICV(pdesc);
366
-	status->crc = (u16)GET_RX_DESC_CRC32(pdesc);
346
+	status->rx_bufshift = (u8)(get_rx_desc_shift(pdesc) & 0x03);
347
+	status->icv = (u16)get_rx_desc_icv(pdesc);
348
+	status->crc = (u16)get_rx_desc_crc32(pdesc);
367349 	status->hwerror = (status->crc | status->icv);
368
-	status->decrypted = !GET_RX_DESC_SWDEC(pdesc);
369
-	status->rate = (u8)GET_RX_DESC_RXMCS(pdesc);
370
-	status->isampdu = (bool)(GET_RX_DESC_PAGGR(pdesc) == 1);
371
-	status->timestamp_low = GET_RX_DESC_TSFL(pdesc);
350
+	status->decrypted = !get_rx_desc_swdec(pdesc);
351
+	status->rate = (u8)get_rx_desc_rxmcs(pdesc);
352
+	status->isampdu = (bool)(get_rx_desc_paggr(pdesc) == 1);
353
+	status->timestamp_low = get_rx_desc_tsfl(pdesc);
372354 	status->is_cck = RTL92EE_RX_HAL_IS_CCK_RATE(status->rate);
373355 
374
-	status->macid = GET_RX_DESC_MACID(pdesc);
375
-	if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
376
-		status->wake_match = BIT(2);
377
-	else if (GET_RX_STATUS_DESC_MAGIC_MATCH(pdesc))
378
-		status->wake_match = BIT(1);
379
-	else if (GET_RX_STATUS_DESC_UNICAST_MATCH(pdesc))
380
-		status->wake_match = BIT(0);
356
+	status->macid = get_rx_desc_macid(pdesc);
357
+	if (get_rx_status_desc_pattern_match(pdesc))
358
+		wake_match = BIT(2);
359
+	else if (get_rx_status_desc_magic_match(pdesc))
360
+		wake_match = BIT(1);
361
+	else if (get_rx_status_desc_unicast_match(pdesc))
362
+		wake_match = BIT(0);
381363 	else
382
-		status->wake_match = 0;
383
-	if (status->wake_match)
384
-		RT_TRACE(rtlpriv, COMP_RXDESC, DBG_LOUD,
385
-			 "GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
386
-			 status->wake_match);
364
+		wake_match = 0;
365
+	if (wake_match)
366
+		rtl_dbg(rtlpriv, COMP_RXDESC, DBG_LOUD,
367
+			"GGGGGGGGGGGGGet Wakeup Packet!! WakeMatch=%d\n",
368
+			wake_match);
387369 	rx_status->freq = hw->conf.chandef.chan->center_freq;
388370 	rx_status->band = hw->conf.chandef.chan->band;
389371 
....@@ -393,7 +375,7 @@
393375 	if (status->crc)
394376 		rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
395377 
396
-	if (status->rx_is40Mhzpacket)
378
+	if (status->rx_is40mhzpacket)
397379 		rx_status->bw = RATE_INFO_BW_40;
398380 
399381 	if (status->is_ht)
....@@ -430,42 +412,43 @@
430412 		p_drvinfo = (struct rx_fwinfo *)(skb->data +
431413 						 status->rx_bufshift + 24);
432414 
433
-		_rtl92ee_translate_rx_signal_stuff(hw, skb, status, pdesc,
415
+		_rtl92ee_translate_rx_signal_stuff(hw, skb, status, pdesc8,
434416 						   p_drvinfo);
435417 	}
436418 	rx_status->signal = status->recvsignalpower + 10;
437419 	if (status->packet_report_type == TX_REPORT2) {
438420 		status->macid_valid_entry[0] =
439
-			GET_RX_RPT2_DESC_MACID_VALID_1(pdesc);
421
+			get_rx_rpt2_desc_macid_valid_1(pdesc);
440422 		status->macid_valid_entry[1] =
441
-			GET_RX_RPT2_DESC_MACID_VALID_2(pdesc);
423
+			get_rx_rpt2_desc_macid_valid_2(pdesc);
442424 	}
443425 	return true;
444426 }
445427 
446428 /*in Windows, this == Rx_92EE_Interrupt*/
447
-void rtl92ee_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc,
429
+void rtl92ee_rx_check_dma_ok(struct ieee80211_hw *hw, u8 *header_desc8,
448430 			     u8 queue_index)
449431 {
450432 	u8 first_seg = 0;
451433 	u8 last_seg = 0;
452434 	u16 total_len = 0;
453435 	u16 read_cnt = 0;
436
+	__le32 *header_desc = (__le32 *)header_desc8;
454437 
455438 	if (header_desc == NULL)
456439 		return;
457440 
458
-	total_len = (u16)GET_RX_BUFFER_DESC_TOTAL_LENGTH(header_desc);
441
+	total_len = (u16)get_rx_buffer_desc_total_length(header_desc);
459442 
460
-	first_seg = (u8)GET_RX_BUFFER_DESC_FS(header_desc);
443
+	first_seg = (u8)get_rx_buffer_desc_fs(header_desc);
461444 
462
-	last_seg = (u8)GET_RX_BUFFER_DESC_LS(header_desc);
445
+	last_seg = (u8)get_rx_buffer_desc_ls(header_desc);
463446 
464447 	while (total_len == 0 && first_seg == 0 && last_seg == 0) {
465448 		read_cnt++;
466
-		total_len = (u16)GET_RX_BUFFER_DESC_TOTAL_LENGTH(header_desc);
467
-		first_seg = (u8)GET_RX_BUFFER_DESC_FS(header_desc);
468
-		last_seg = (u8)GET_RX_BUFFER_DESC_LS(header_desc);
449
+		total_len = (u16)get_rx_buffer_desc_total_length(header_desc);
450
+		first_seg = (u8)get_rx_buffer_desc_fs(header_desc);
451
+		last_seg = (u8)get_rx_buffer_desc_ls(header_desc);
469452 
470453 		if (read_cnt > 20)
471454 			break;
....@@ -476,8 +459,8 @@
476459 {
477460 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
478461 	struct rtl_priv *rtlpriv = rtl_priv(hw);
479
-	u16 read_point = 0, write_point = 0, remind_cnt = 0;
480
-	u32 tmp_4byte = 0;
462
+	u16 read_point, write_point, remind_cnt;
463
+	u32 tmp_4byte;
481464 	static bool start_rx;
482465 
483466 	tmp_4byte = rtl_read_dword(rtlpriv, REG_RXQ_TXBD_IDX);
....@@ -485,9 +468,9 @@
485468 	write_point = (u16)(tmp_4byte & 0x7ff);
486469 
487470 	if (write_point != rtlpci->rx_ring[queue_index].next_rx_rp) {
488
-		RT_TRACE(rtlpriv, COMP_RXDESC, DBG_DMESG,
489
-			 "!!!write point is 0x%x, reg 0x3B4 value is 0x%x\n",
490
-			  write_point, tmp_4byte);
471
+		rtl_dbg(rtlpriv, COMP_RXDESC, DBG_DMESG,
472
+			"!!!write point is 0x%x, reg 0x3B4 value is 0x%x\n",
473
+			write_point, tmp_4byte);
491474 		tmp_4byte = rtl_read_dword(rtlpriv, REG_RXQ_TXBD_IDX);
492475 		read_point = (u16)((tmp_4byte>>16) & 0x7ff);
493476 		write_point = (u16)(tmp_4byte & 0x7ff);
....@@ -511,7 +494,7 @@
511494 
512495 static u16 get_desc_addr_fr_q_idx(u16 queue_index)
513496 {
514
-	u16 desc_address = REG_BEQ_TXBD_IDX;
497
+	u16 desc_address;
515498 
516499 	switch (queue_index) {
517500 	case BK_QUEUE:
....@@ -542,6 +525,7 @@
542525 		desc_address = REG_BEQ_TXBD_IDX;
543526 		break;
544527 	default:
528
+		desc_address = REG_BEQ_TXBD_IDX;
545529 		break;
546530 	}
547531 	return desc_address;
....@@ -551,7 +535,7 @@
551535 {
552536 	struct rtl_priv *rtlpriv = rtl_priv(hw);
553537 	u16 point_diff = 0;
554
-	u16 current_tx_read_point = 0, current_tx_write_point = 0;
538
+	u16 current_tx_read_point, current_tx_write_point;
555539 	u32 tmp_4byte;
556540 
557541 	tmp_4byte = rtl_read_dword(rtlpriv,
....@@ -567,7 +551,7 @@
567551 }
568552 
569553 void rtl92ee_pre_fill_tx_bd_desc(struct ieee80211_hw *hw,
570
-				 u8 *tx_bd_desc, u8 *desc, u8 queue_index,
554
+				 u8 *tx_bd_desc8, u8 *desc8, u8 queue_index,
571555 				 struct sk_buff *skb, dma_addr_t addr)
572556 {
573557 	struct rtl_priv *rtlpriv = rtl_priv(hw);
....@@ -575,15 +559,17 @@
575559 	u32 pkt_len = skb->len;
576560 	u16 desc_size = 40; /*tx desc size*/
577561 	u32 psblen = 0;
578
-	u16 tx_page_size = 0;
579
-	u32 total_packet_size = 0;
562
+	u16 tx_page_size;
563
+	u32 total_packet_size;
580564 	u16 current_bd_desc;
581
-	u8 i = 0;
565
+	u8 i;
582566 	u16 real_desc_size = 0x28;
583567 	u16	append_early_mode_size = 0;
584568 	u8 segmentnum = 1 << (RTL8192EE_SEG_NUM + 1);
585569 	dma_addr_t desc_dma_addr;
586570 	bool dma64 = rtlpriv->cfg->mod_params->dma64;
571
+	__le32 *desc = (__le32 *)desc8;
572
+	__le32 *tx_bd_desc = (__le32 *)tx_bd_desc8;
587573 
588574 	tx_page_size = 2;
589575 	current_bd_desc = rtlpci->tx_ring[queue_index].cur_tx_wp;
....@@ -610,48 +596,48 @@
610596 			(current_bd_desc * TX_DESC_SIZE);
611597 
612598 	/* Reset */
613
-	SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, 0);
614
-	SET_TX_BUFF_DESC_PSB(tx_bd_desc, 0);
615
-	SET_TX_BUFF_DESC_OWN(tx_bd_desc, 0);
599
+	set_tx_buff_desc_len_0(tx_bd_desc, 0);
600
+	set_tx_buff_desc_psb(tx_bd_desc, 0);
601
+	set_tx_buff_desc_own(tx_bd_desc, 0);
616602 
617603 	for (i = 1; i < segmentnum; i++) {
618
-		SET_TXBUFFER_DESC_LEN_WITH_OFFSET(tx_bd_desc, i, 0);
619
-		SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(tx_bd_desc, i, 0);
620
-		SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(tx_bd_desc, i, 0);
621
-		SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(tx_bd_desc, i, 0, dma64);
604
+		set_txbuffer_desc_len_with_offset(tx_bd_desc, i, 0);
605
+		set_txbuffer_desc_amsdu_with_offset(tx_bd_desc, i, 0);
606
+		set_txbuffer_desc_add_low_with_offset(tx_bd_desc, i, 0);
607
+		set_txbuffer_desc_add_high_with_offset(tx_bd_desc, i, 0, dma64);
622608 	}
623609 
624610 	/* Clear all status */
625
-	CLEAR_PCI_TX_DESC_CONTENT(desc, TX_DESC_SIZE);
611
+	clear_pci_tx_desc_content(desc, TX_DESC_SIZE);
626612 
627613 	if (rtlpriv->rtlhal.earlymode_enable) {
628614 		if (queue_index < BEACON_QUEUE) {
629615 			/* This if needs braces */
630
-			SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size + 8);
616
+			set_tx_buff_desc_len_0(tx_bd_desc, desc_size + 8);
631617 		} else {
632
-			SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size);
618
+			set_tx_buff_desc_len_0(tx_bd_desc, desc_size);
633619 		}
634620 	} else {
635
-		SET_TX_BUFF_DESC_LEN_0(tx_bd_desc, desc_size);
621
+		set_tx_buff_desc_len_0(tx_bd_desc, desc_size);
636622 	}
637
-	SET_TX_BUFF_DESC_PSB(tx_bd_desc, psblen);
638
-	SET_TX_BUFF_DESC_ADDR_LOW_0(tx_bd_desc, desc_dma_addr);
639
-	SET_TX_BUFF_DESC_ADDR_HIGH_0(tx_bd_desc, ((u64)desc_dma_addr >> 32),
623
+	set_tx_buff_desc_psb(tx_bd_desc, psblen);
624
+	set_tx_buff_desc_addr_low_0(tx_bd_desc, desc_dma_addr);
625
+	set_tx_buff_desc_addr_high_0(tx_bd_desc, ((u64)desc_dma_addr >> 32),
640626 				     dma64);
641627 
642
-	SET_TXBUFFER_DESC_LEN_WITH_OFFSET(tx_bd_desc, 1, pkt_len);
628
+	set_txbuffer_desc_len_with_offset(tx_bd_desc, 1, pkt_len);
643629 	/* don't using extendsion mode. */
644
-	SET_TXBUFFER_DESC_AMSDU_WITH_OFFSET(tx_bd_desc, 1, 0);
645
-	SET_TXBUFFER_DESC_ADD_LOW_WITH_OFFSET(tx_bd_desc, 1, addr);
646
-	SET_TXBUFFER_DESC_ADD_HIGH_WITH_OFFSET(tx_bd_desc, 1,
630
+	set_txbuffer_desc_amsdu_with_offset(tx_bd_desc, 1, 0);
631
+	set_txbuffer_desc_add_low_with_offset(tx_bd_desc, 1, addr);
632
+	set_txbuffer_desc_add_high_with_offset(tx_bd_desc, 1,
647633 					       ((u64)addr >> 32), dma64);
648634 
649
-	SET_TX_DESC_PKT_SIZE(desc, (u16)(pkt_len));
650
-	SET_TX_DESC_TX_BUFFER_SIZE(desc, (u16)(pkt_len));
635
+	set_tx_desc_pkt_size(desc, (u16)(pkt_len));
636
+	set_tx_desc_tx_buffer_size(desc, (u16)(pkt_len));
651637 }
652638 
653639 void rtl92ee_tx_fill_desc(struct ieee80211_hw *hw,
654
-			  struct ieee80211_hdr *hdr, u8 *pdesc_tx,
640
+			  struct ieee80211_hdr *hdr, u8 *pdesc8,
655641 			  u8 *pbd_desc_tx,
656642 			  struct ieee80211_tx_info *info,
657643 			  struct ieee80211_sta *sta,
....@@ -663,10 +649,8 @@
663649 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
664650 	struct rtl_hal *rtlhal = rtl_hal(rtlpriv);
665651 	struct rtlwifi_tx_info *tx_info = rtl_tx_skb_cb_info(skb);
666
-	u8 *pdesc = (u8 *)pdesc_tx;
667652 	u16 seq_number;
668653 	__le16 fc = hdr->frame_control;
669
-	unsigned int buf_len = 0;
670654 	u8 fw_qsel = _rtl92ee_map_hwqueue_to_fwqueue(skb, hw_queue);
671655 	bool firstseg = ((hdr->seq_ctrl &
672656 			    cpu_to_le16(IEEE80211_SCTL_FRAG)) == 0);
....@@ -674,7 +658,7 @@
674658 			   cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)) == 0);
675659 	dma_addr_t mapping;
676660 	u8 bw_40 = 0;
677
-	u8 short_gi = 0;
661
+	__le32 *pdesc = (__le32 *)pdesc8;
678662 
679663 	if (mac->opmode == NL80211_IFTYPE_STATION) {
680664 		bw_40 = mac->bw_40;
....@@ -691,17 +675,16 @@
691675 		skb_push(skb, EM_HDR_LEN);
692676 		memset(skb->data, 0, EM_HDR_LEN);
693677 	}
694
-	buf_len = skb->len;
695
-	mapping = pci_map_single(rtlpci->pdev, skb->data, skb->len,
696
-				 PCI_DMA_TODEVICE);
697
-	if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
698
-		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
699
-			 "DMA mapping error\n");
678
+	mapping = dma_map_single(&rtlpci->pdev->dev, skb->data, skb->len,
679
+				 DMA_TO_DEVICE);
680
+	if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
681
+		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
682
+			"DMA mapping error\n");
700683 		return;
701684 	}
702685 
703686 	if (pbd_desc_tx != NULL)
704
-		rtl92ee_pre_fill_tx_bd_desc(hw, pbd_desc_tx, pdesc, hw_queue,
687
+		rtl92ee_pre_fill_tx_bd_desc(hw, pbd_desc_tx, pdesc8, hw_queue,
705688 					    skb, mapping);
706689 
707690 	if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
....@@ -710,80 +693,75 @@
710693 	}
711694 	if (firstseg) {
712695 		if (rtlhal->earlymode_enable) {
713
-			SET_TX_DESC_PKT_OFFSET(pdesc, 1);
714
-			SET_TX_DESC_OFFSET(pdesc,
696
+			set_tx_desc_pkt_offset(pdesc, 1);
697
+			set_tx_desc_offset(pdesc,
715698 					   USB_HWDESC_HEADER_LEN + EM_HDR_LEN);
716699 			if (ptcb_desc->empkt_num) {
717
-				RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
718
-					 "Insert 8 byte.pTcb->EMPktNum:%d\n",
719
-					  ptcb_desc->empkt_num);
700
+				rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
701
+					"Insert 8 byte.pTcb->EMPktNum:%d\n",
702
+					ptcb_desc->empkt_num);
720703 				_rtl92ee_insert_emcontent(ptcb_desc,
721704 							  (u8 *)(skb->data));
722705 			}
723706 		} else {
724
-			SET_TX_DESC_OFFSET(pdesc, USB_HWDESC_HEADER_LEN);
707
+			set_tx_desc_offset(pdesc, USB_HWDESC_HEADER_LEN);
725708 		}
726709 
727710 
728
-		SET_TX_DESC_TX_RATE(pdesc, ptcb_desc->hw_rate);
711
+		set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
729712 
730713 		if (ieee80211_is_mgmt(fc)) {
731714 			ptcb_desc->use_driver_rate = true;
732715 		} else {
733716 			if (rtlpriv->ra.is_special_data) {
734717 				ptcb_desc->use_driver_rate = true;
735
-				SET_TX_DESC_TX_RATE(pdesc, DESC_RATE11M);
718
+				set_tx_desc_tx_rate(pdesc, DESC_RATE11M);
736719 			} else {
737720 				ptcb_desc->use_driver_rate = false;
738721 			}
739722 		}
740723 
741
-		if (ptcb_desc->hw_rate > DESC_RATEMCS0)
742
-			short_gi = (ptcb_desc->use_shortgi) ? 1 : 0;
743
-		else
744
-			short_gi = (ptcb_desc->use_shortpreamble) ? 1 : 0;
745
-
746724 		if (info->flags & IEEE80211_TX_CTL_AMPDU) {
747
-			SET_TX_DESC_AGG_ENABLE(pdesc, 1);
748
-			SET_TX_DESC_MAX_AGG_NUM(pdesc, 0x14);
725
+			set_tx_desc_agg_enable(pdesc, 1);
726
+			set_tx_desc_max_agg_num(pdesc, 0x14);
749727 		}
750
-		SET_TX_DESC_SEQ(pdesc, seq_number);
751
-		SET_TX_DESC_RTS_ENABLE(pdesc,
728
+		set_tx_desc_seq(pdesc, seq_number);
729
+		set_tx_desc_rts_enable(pdesc,
752730 				       ((ptcb_desc->rts_enable &&
753731 					 !ptcb_desc->cts_enable) ? 1 : 0));
754
-		SET_TX_DESC_HW_RTS_ENABLE(pdesc, 0);
755
-		SET_TX_DESC_CTS2SELF(pdesc,
732
+		set_tx_desc_hw_rts_enable(pdesc, 0);
733
+		set_tx_desc_cts2self(pdesc,
756734 				     ((ptcb_desc->cts_enable) ? 1 : 0));
757735 
758
-		SET_TX_DESC_RTS_RATE(pdesc, ptcb_desc->rts_rate);
759
-		SET_TX_DESC_RTS_SC(pdesc, ptcb_desc->rts_sc);
760
-		SET_TX_DESC_RTS_SHORT(pdesc,
736
+		set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
737
+		set_tx_desc_rts_sc(pdesc, ptcb_desc->rts_sc);
738
+		set_tx_desc_rts_short(pdesc,
761739 				((ptcb_desc->rts_rate <= DESC_RATE54M) ?
762740 				 (ptcb_desc->rts_use_shortpreamble ? 1 : 0) :
763741 				 (ptcb_desc->rts_use_shortgi ? 1 : 0)));
764742 
765743 		if (ptcb_desc->tx_enable_sw_calc_duration)
766
-			SET_TX_DESC_NAV_USE_HDR(pdesc, 1);
744
+			set_tx_desc_nav_use_hdr(pdesc, 1);
767745 
768746 		if (bw_40) {
769747 			if (ptcb_desc->packet_bw == HT_CHANNEL_WIDTH_20_40) {
770
-				SET_TX_DESC_DATA_BW(pdesc, 1);
771
-				SET_TX_DESC_TX_SUB_CARRIER(pdesc, 3);
748
+				set_tx_desc_data_bw(pdesc, 1);
749
+				set_tx_desc_tx_sub_carrier(pdesc, 3);
772750 			} else {
773
-				SET_TX_DESC_DATA_BW(pdesc, 0);
774
-				SET_TX_DESC_TX_SUB_CARRIER(pdesc,
751
+				set_tx_desc_data_bw(pdesc, 0);
752
+				set_tx_desc_tx_sub_carrier(pdesc,
775753 							   mac->cur_40_prime_sc);
776754 			}
777755 		} else {
778
-			SET_TX_DESC_DATA_BW(pdesc, 0);
779
-			SET_TX_DESC_TX_SUB_CARRIER(pdesc, 0);
756
+			set_tx_desc_data_bw(pdesc, 0);
757
+			set_tx_desc_tx_sub_carrier(pdesc, 0);
780758 		}
781759 
782
-		SET_TX_DESC_LINIP(pdesc, 0);
760
+		set_tx_desc_linip(pdesc, 0);
783761 		if (sta) {
784762 			u8 ampdu_density = sta->ht_cap.ampdu_density;
785763 
786
-			SET_TX_DESC_AMPDU_DENSITY(pdesc, ampdu_density);
764
+			set_tx_desc_ampdu_density(pdesc, ampdu_density);
787765 		}
788766 		if (info->control.hw_key) {
789767 			struct ieee80211_key_conf *key = info->control.hw_key;
....@@ -792,129 +770,130 @@
792770 			case WLAN_CIPHER_SUITE_WEP40:
793771 			case WLAN_CIPHER_SUITE_WEP104:
794772 			case WLAN_CIPHER_SUITE_TKIP:
795
-				SET_TX_DESC_SEC_TYPE(pdesc, 0x1);
773
+				set_tx_desc_sec_type(pdesc, 0x1);
796774 				break;
797775 			case WLAN_CIPHER_SUITE_CCMP:
798
-				SET_TX_DESC_SEC_TYPE(pdesc, 0x3);
776
+				set_tx_desc_sec_type(pdesc, 0x3);
799777 				break;
800778 			default:
801
-				SET_TX_DESC_SEC_TYPE(pdesc, 0x0);
779
+				set_tx_desc_sec_type(pdesc, 0x0);
802780 				break;
803781 			}
804782 		}
805783 
806
-		SET_TX_DESC_QUEUE_SEL(pdesc, fw_qsel);
807
-		SET_TX_DESC_DATA_RATE_FB_LIMIT(pdesc, 0x1F);
808
-		SET_TX_DESC_RTS_RATE_FB_LIMIT(pdesc, 0xF);
809
-		SET_TX_DESC_DISABLE_FB(pdesc,
784
+		set_tx_desc_queue_sel(pdesc, fw_qsel);
785
+		set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
786
+		set_tx_desc_rts_rate_fb_limit(pdesc, 0xF);
787
+		set_tx_desc_disable_fb(pdesc,
810788 				       ptcb_desc->disable_ratefallback ? 1 : 0);
811
-		SET_TX_DESC_USE_RATE(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
789
+		set_tx_desc_use_rate(pdesc, ptcb_desc->use_driver_rate ? 1 : 0);
812790 
813
-		/*SET_TX_DESC_PWR_STATUS(pdesc, pwr_status);*/
791
+		/*set_tx_desc_pwr_status(pdesc, pwr_status);*/
814792 		/* Set TxRate and RTSRate in TxDesc  */
815793 		/* This prevent Tx initial rate of new-coming packets */
816794 		/* from being overwritten by retried  packet rate.*/
817795 		if (!ptcb_desc->use_driver_rate) {
818
-			/*SET_TX_DESC_RTS_RATE(pdesc, 0x08); */
819
-			/* SET_TX_DESC_TX_RATE(pdesc, 0x0b); */
796
+			/*set_tx_desc_rts_rate(pdesc, 0x08); */
797
+			/* set_tx_desc_tx_rate(pdesc, 0x0b); */
820798 		}
821799 		if (ieee80211_is_data_qos(fc)) {
822800 			if (mac->rdg_en) {
823
-				RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
824
-					 "Enable RDG function.\n");
825
-				SET_TX_DESC_RDG_ENABLE(pdesc, 1);
826
-				SET_TX_DESC_HTC(pdesc, 1);
801
+				rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
802
+					"Enable RDG function.\n");
803
+				set_tx_desc_rdg_enable(pdesc, 1);
804
+				set_tx_desc_htc(pdesc, 1);
827805 			}
828806 		}
829807 		/* tx report */
830
-		rtl_set_tx_report(ptcb_desc, pdesc, hw, tx_info);
808
+		rtl_set_tx_report(ptcb_desc, pdesc8, hw, tx_info);
831809 	}
832810 
833
-	SET_TX_DESC_FIRST_SEG(pdesc, (firstseg ? 1 : 0));
834
-	SET_TX_DESC_LAST_SEG(pdesc, (lastseg ? 1 : 0));
835
-	SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
811
+	set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
812
+	set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
813
+	set_tx_desc_tx_buffer_address(pdesc, mapping);
836814 	if (rtlpriv->dm.useramask) {
837
-		SET_TX_DESC_RATE_ID(pdesc, ptcb_desc->ratr_index);
838
-		SET_TX_DESC_MACID(pdesc, ptcb_desc->mac_id);
815
+		set_tx_desc_rate_id(pdesc, ptcb_desc->ratr_index);
816
+		set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
839817 	} else {
840
-		SET_TX_DESC_RATE_ID(pdesc, 0xC + ptcb_desc->ratr_index);
841
-		SET_TX_DESC_MACID(pdesc, ptcb_desc->ratr_index);
818
+		set_tx_desc_rate_id(pdesc, 0xC + ptcb_desc->ratr_index);
819
+		set_tx_desc_macid(pdesc, ptcb_desc->ratr_index);
842820 	}
843821 
844
-	SET_TX_DESC_MORE_FRAG(pdesc, (lastseg ? 0 : 1));
822
+	set_tx_desc_more_frag(pdesc, (lastseg ? 0 : 1));
845823 	if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) ||
846824 	    is_broadcast_ether_addr(ieee80211_get_DA(hdr))) {
847
-		SET_TX_DESC_BMC(pdesc, 1);
825
+		set_tx_desc_bmc(pdesc, 1);
848826 	}
849
-	RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
827
+	rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
850828 }
851829 
852830 void rtl92ee_tx_fill_cmddesc(struct ieee80211_hw *hw,
853
-			     u8 *pdesc, bool firstseg,
831
+			     u8 *pdesc8, bool firstseg,
854832 			     bool lastseg, struct sk_buff *skb)
855833 {
856834 	struct rtl_priv *rtlpriv = rtl_priv(hw);
857835 	struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
858836 	u8 fw_queue = QSLT_BEACON;
859
-	dma_addr_t mapping = pci_map_single(rtlpci->pdev,
860
-					    skb->data, skb->len,
861
-					    PCI_DMA_TODEVICE);
837
+	dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
838
+					    skb->len, DMA_TO_DEVICE);
862839 	u8 txdesc_len = 40;
840
+	__le32 *pdesc = (__le32 *)pdesc8;
863841 
864
-	if (pci_dma_mapping_error(rtlpci->pdev, mapping)) {
865
-		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
866
-			 "DMA mapping error\n");
842
+	if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
843
+		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
844
+			"DMA mapping error\n");
867845 		return;
868846 	}
869
-	CLEAR_PCI_TX_DESC_CONTENT(pdesc, txdesc_len);
847
+	clear_pci_tx_desc_content(pdesc, txdesc_len);
870848 
871849 	if (firstseg)
872
-		SET_TX_DESC_OFFSET(pdesc, txdesc_len);
850
+		set_tx_desc_offset(pdesc, txdesc_len);
873851 
874
-	SET_TX_DESC_TX_RATE(pdesc, DESC_RATE1M);
852
+	set_tx_desc_tx_rate(pdesc, DESC_RATE1M);
875853 
876
-	SET_TX_DESC_SEQ(pdesc, 0);
854
+	set_tx_desc_seq(pdesc, 0);
877855 
878
-	SET_TX_DESC_LINIP(pdesc, 0);
856
+	set_tx_desc_linip(pdesc, 0);
879857 
880
-	SET_TX_DESC_QUEUE_SEL(pdesc, fw_queue);
858
+	set_tx_desc_queue_sel(pdesc, fw_queue);
881859 
882
-	SET_TX_DESC_FIRST_SEG(pdesc, 1);
883
-	SET_TX_DESC_LAST_SEG(pdesc, 1);
860
+	set_tx_desc_first_seg(pdesc, 1);
861
+	set_tx_desc_last_seg(pdesc, 1);
884862 
885
-	SET_TX_DESC_TX_BUFFER_SIZE(pdesc, (u16)(skb->len));
863
+	set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
886864 
887
-	SET_TX_DESC_TX_BUFFER_ADDRESS(pdesc, mapping);
865
+	set_tx_desc_tx_buffer_address(pdesc, mapping);
888866 
889
-	SET_TX_DESC_RATE_ID(pdesc, 7);
890
-	SET_TX_DESC_MACID(pdesc, 0);
867
+	set_tx_desc_rate_id(pdesc, 7);
868
+	set_tx_desc_macid(pdesc, 0);
891869 
892
-	SET_TX_DESC_OWN(pdesc, 1);
870
+	set_tx_desc_own(pdesc, 1);
893871 
894
-	SET_TX_DESC_PKT_SIZE((u8 *)pdesc, (u16)(skb->len));
872
+	set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
895873 
896
-	SET_TX_DESC_FIRST_SEG(pdesc, 1);
897
-	SET_TX_DESC_LAST_SEG(pdesc, 1);
874
+	set_tx_desc_first_seg(pdesc, 1);
875
+	set_tx_desc_last_seg(pdesc, 1);
898876 
899
-	SET_TX_DESC_OFFSET(pdesc, 40);
877
+	set_tx_desc_offset(pdesc, 40);
900878 
901
-	SET_TX_DESC_USE_RATE(pdesc, 1);
879
+	set_tx_desc_use_rate(pdesc, 1);
902880 
903881 	RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
904882 		      "H2C Tx Cmd Content\n", pdesc, txdesc_len);
905883 }
906884 
907
-void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc, bool istx,
885
+void rtl92ee_set_desc(struct ieee80211_hw *hw, u8 *pdesc8, bool istx,
908886 		      u8 desc_name, u8 *val)
909887 {
910888 	struct rtl_priv *rtlpriv = rtl_priv(hw);
911889 	u8 q_idx = *val;
912890 	bool dma64 = rtlpriv->cfg->mod_params->dma64;
891
+	__le32 *pdesc = (__le32 *)pdesc8;
913892 
914893 	if (istx) {
915894 		switch (desc_name) {
916895 		case HW_DESC_TX_NEXTDESC_ADDR:
917
-			SET_TX_DESC_NEXT_DESC_ADDRESS(pdesc, *(u32 *)val);
896
+			set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
918897 			break;
919898 		case HW_DESC_OWN:{
920899 			struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
....@@ -924,7 +903,7 @@
924903 			if (q_idx == BEACON_QUEUE) {
925904 				ring->cur_tx_wp = 0;
926905 				ring->cur_tx_rp = 0;
927
-				SET_TX_BUFF_DESC_OWN(pdesc, 1);
906
+				set_tx_buff_desc_own(pdesc, 1);
928907 				return;
929908 			}
930909 
....@@ -940,23 +919,23 @@
940919 	} else {
941920 		switch (desc_name) {
942921 		case HW_DESC_RX_PREPARE:
943
-			SET_RX_BUFFER_DESC_LS(pdesc, 0);
944
-			SET_RX_BUFFER_DESC_FS(pdesc, 0);
945
-			SET_RX_BUFFER_DESC_TOTAL_LENGTH(pdesc, 0);
922
+			set_rx_buffer_desc_ls(pdesc, 0);
923
+			set_rx_buffer_desc_fs(pdesc, 0);
924
+			set_rx_buffer_desc_total_length(pdesc, 0);
946925 
947
-			SET_RX_BUFFER_DESC_DATA_LENGTH(pdesc,
926
+			set_rx_buffer_desc_data_length(pdesc,
948927 						       MAX_RECEIVE_BUFFER_SIZE +
949928 						       RX_DESC_SIZE);
950929 
951
-			SET_RX_BUFFER_PHYSICAL_LOW(pdesc, (*(dma_addr_t *)val) &
930
+			set_rx_buffer_physical_low(pdesc, (*(dma_addr_t *)val) &
952931 						   DMA_BIT_MASK(32));
953
-			SET_RX_BUFFER_PHYSICAL_HIGH(pdesc,
932
+			set_rx_buffer_physical_high(pdesc,
954933 						    ((u64)(*(dma_addr_t *)val)
955934 						    >> 32),
956935 						    dma64);
957936 			break;
958937 		case HW_DESC_RXERO:
959
-			SET_RX_DESC_EOR(pdesc, 1);
938
+			set_rx_desc_eor(pdesc, 1);
960939 			break;
961940 		default:
962941 			WARN_ONCE(true,
....@@ -968,20 +947,21 @@
968947 }
969948 
970949 u64 rtl92ee_get_desc(struct ieee80211_hw *hw,
971
-		     u8 *pdesc, bool istx, u8 desc_name)
950
+		     u8 *pdesc8, bool istx, u8 desc_name)
972951 {
973952 	struct rtl_priv *rtlpriv = rtl_priv(hw);
974953 	u64 ret = 0;
975954 	bool dma64 = rtlpriv->cfg->mod_params->dma64;
955
+	__le32 *pdesc = (__le32 *)pdesc8;
976956 
977957 	if (istx) {
978958 		switch (desc_name) {
979959 		case HW_DESC_OWN:
980
-			ret = GET_TX_DESC_OWN(pdesc);
960
+			ret = get_tx_desc_own(pdesc);
981961 			break;
982962 		case HW_DESC_TXBUFF_ADDR:
983
-			ret = GET_TXBUFFER_DESC_ADDR_LOW(pdesc, 1);
984
-			ret |= (u64)GET_TXBUFFER_DESC_ADDR_HIGH(pdesc, 1,
963
+			ret = get_txbuffer_desc_addr_low(pdesc, 1);
964
+			ret |= (u64)get_txbuffer_desc_addr_high(pdesc, 1,
985965 								dma64) << 32;
986966 			break;
987967 		default:
....@@ -993,13 +973,13 @@
993973 	} else {
994974 		switch (desc_name) {
995975 		case HW_DESC_OWN:
996
-			ret = GET_RX_DESC_OWN(pdesc);
976
+			ret = get_rx_desc_own(pdesc);
997977 			break;
998978 		case HW_DESC_RXPKT_LEN:
999
-			ret = GET_RX_DESC_PKT_LEN(pdesc);
979
+			ret = get_rx_desc_pkt_len(pdesc);
1000980 			break;
1001981 		case HW_DESC_RXBUFF_ADDR:
1002
-			ret = GET_RX_DESC_BUFF_ADDR(pdesc);
982
+			ret = get_rx_desc_buff_addr(pdesc);
1003983 			break;
1004984 		default:
1005985 			WARN_ONCE(true,
....@@ -1021,14 +1001,13 @@
10211001 	struct rtl8192_tx_ring *ring = &rtlpci->tx_ring[hw_queue];
10221002 
10231003 	{
1024
-		u16 cur_tx_rp, cur_tx_wp;
1025
-		u32 tmpu32 = 0;
1004
+		u16 cur_tx_rp;
1005
+		u32 tmpu32;
10261006 
10271007 		tmpu32 =
10281008 		  rtl_read_dword(rtlpriv,
10291009 				 get_desc_addr_fr_q_idx(hw_queue));
10301010 		cur_tx_rp = (u16)((tmpu32 >> 16) & 0x0fff);
1031
-		cur_tx_wp = (u16)(tmpu32 & 0x0fff);
10321011 
10331012 		/* don't need to update ring->cur_tx_wp */
10341013 		ring->cur_tx_rp = cur_tx_rp;