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2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/phy.c
....@@ -1,27 +1,5 @@
1
-/******************************************************************************
2
- *
3
- * Copyright(c) 2009-2013  Realtek Corporation.
4
- *
5
- * This program is free software; you can redistribute it and/or modify it
6
- * under the terms of version 2 of the GNU General Public License as
7
- * published by the Free Software Foundation.
8
- *
9
- * This program is distributed in the hope that it will be useful, but WITHOUT
10
- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11
- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12
- * more details.
13
- *
14
- * The full GNU General Public License is included in this distribution in the
15
- * file called LICENSE.
16
- *
17
- * Contact Information:
18
- * wlanfae <wlanfae@realtek.com>
19
- * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20
- * Hsinchu 300, Taiwan.
21
- *
22
- * Larry Finger <Larry.Finger@lwfinger.net>
23
- *
24
- *****************************************************************************/
1
+// SPDX-License-Identifier: GPL-2.0
2
+/* Copyright(c) 2009-2013  Realtek Corporation.*/
253 
264 #include "../wifi.h"
275 #include "../pci.h"
....@@ -38,7 +16,12 @@
3816 static void _rtl88e_phy_rf_serial_write(struct ieee80211_hw *hw,
3917 					enum radio_path rfpath, u32 offset,
4018 					u32 data);
41
-static u32 _rtl88e_phy_calculate_bit_shift(u32 bitmask);
19
+static u32 _rtl88e_phy_calculate_bit_shift(u32 bitmask)
20
+{
21
+	u32 i = ffs(bitmask);
22
+
23
+	return i ? i - 1 : 32;
24
+}
4225 static bool _rtl88e_phy_bb8188e_config_parafile(struct ieee80211_hw *hw);
4326 static bool _rtl88e_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
4427 static bool phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
....@@ -65,15 +48,15 @@
6548 	struct rtl_priv *rtlpriv = rtl_priv(hw);
6649 	u32 returnvalue, originalvalue, bitshift;
6750 
68
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
69
-		 "regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask);
51
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
52
+		"regaddr(%#x), bitmask(%#x)\n", regaddr, bitmask);
7053 	originalvalue = rtl_read_dword(rtlpriv, regaddr);
7154 	bitshift = _rtl88e_phy_calculate_bit_shift(bitmask);
7255 	returnvalue = (originalvalue & bitmask) >> bitshift;
7356 
74
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
75
-		 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask,
76
-		 regaddr, originalvalue);
57
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
58
+		"BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask,
59
+		regaddr, originalvalue);
7760 
7861 	return returnvalue;
7962 
....@@ -85,9 +68,9 @@
8568 	struct rtl_priv *rtlpriv = rtl_priv(hw);
8669 	u32 originalvalue, bitshift;
8770 
88
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
89
-		 "regaddr(%#x), bitmask(%#x), data(%#x)\n",
90
-		 regaddr, bitmask, data);
71
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
72
+		"regaddr(%#x), bitmask(%#x), data(%#x)\n",
73
+		regaddr, bitmask, data);
9174 
9275 	if (bitmask != MASKDWORD) {
9376 		originalvalue = rtl_read_dword(rtlpriv, regaddr);
....@@ -97,9 +80,9 @@
9780 
9881 	rtl_write_dword(rtlpriv, regaddr, data);
9982 
100
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
101
-		 "regaddr(%#x), bitmask(%#x), data(%#x)\n",
102
-		 regaddr, bitmask, data);
83
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
84
+		"regaddr(%#x), bitmask(%#x), data(%#x)\n",
85
+		regaddr, bitmask, data);
10386 }
10487 
10588 u32 rtl88e_phy_query_rf_reg(struct ieee80211_hw *hw,
....@@ -107,24 +90,23 @@
10790 {
10891 	struct rtl_priv *rtlpriv = rtl_priv(hw);
10992 	u32 original_value, readback_value, bitshift;
110
-	unsigned long flags;
11193 
112
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
113
-		 "regaddr(%#x), rfpath(%#x), bitmask(%#x)\n",
114
-		 regaddr, rfpath, bitmask);
94
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
95
+		"regaddr(%#x), rfpath(%#x), bitmask(%#x)\n",
96
+		regaddr, rfpath, bitmask);
11597 
116
-	spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
98
+	spin_lock(&rtlpriv->locks.rf_lock);
11799 
118100 
119101 	original_value = _rtl88e_phy_rf_serial_read(hw, rfpath, regaddr);
120102 	bitshift = _rtl88e_phy_calculate_bit_shift(bitmask);
121103 	readback_value = (original_value & bitmask) >> bitshift;
122104 
123
-	spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
105
+	spin_unlock(&rtlpriv->locks.rf_lock);
124106 
125
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
126
-		 "regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n",
127
-		  regaddr, rfpath, bitmask, original_value);
107
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
108
+		"regaddr(%#x), rfpath(%#x), bitmask(%#x), original_value(%#x)\n",
109
+		regaddr, rfpath, bitmask, original_value);
128110 	return readback_value;
129111 }
130112 
....@@ -134,13 +116,12 @@
134116 {
135117 	struct rtl_priv *rtlpriv = rtl_priv(hw);
136118 	u32 original_value, bitshift;
137
-	unsigned long flags;
138119 
139
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
140
-		 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
141
-		  regaddr, bitmask, data, rfpath);
120
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
121
+		"regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
122
+		regaddr, bitmask, data, rfpath);
142123 
143
-	spin_lock_irqsave(&rtlpriv->locks.rf_lock, flags);
124
+	spin_lock(&rtlpriv->locks.rf_lock);
144125 
145126 	if (bitmask != RFREG_OFFSET_MASK) {
146127 			original_value = _rtl88e_phy_rf_serial_read(hw,
....@@ -155,11 +136,11 @@
155136 	_rtl88e_phy_rf_serial_write(hw, rfpath, regaddr, data);
156137 
157138 
158
-	spin_unlock_irqrestore(&rtlpriv->locks.rf_lock, flags);
139
+	spin_unlock(&rtlpriv->locks.rf_lock);
159140 
160
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
161
-		 "regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
162
-		 regaddr, bitmask, data, rfpath);
141
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
142
+		"regaddr(%#x), bitmask(%#x), data(%#x), rfpath(%#x)\n",
143
+		regaddr, bitmask, data, rfpath);
163144 }
164145 
165146 static u32 _rtl88e_phy_rf_serial_read(struct ieee80211_hw *hw,
....@@ -188,9 +169,9 @@
188169 	    (newoffset << 23) | BLSSIREADEDGE;
189170 	rtl_set_bbreg(hw, RFPGA0_XA_HSSIPARAMETER2, MASKDWORD,
190171 		      tmplong & (~BLSSIREADEDGE));
191
-	mdelay(1);
172
+	udelay(10);
192173 	rtl_set_bbreg(hw, pphyreg->rfhssi_para2, MASKDWORD, tmplong2);
193
-	mdelay(2);
174
+	udelay(120);
194175 	if (rfpath == RF90_PATH_A)
195176 		rfpi_enable = (u8)rtl_get_bbreg(hw, RFPGA0_XA_HSSIPARAMETER1,
196177 						BIT(8));
....@@ -203,9 +184,9 @@
203184 	else
204185 		retvalue = rtl_get_bbreg(hw, pphyreg->rf_rb,
205186 					 BLSSIREADBACKDATA);
206
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
207
-		 "RFR-%d Addr[0x%x]=0x%x\n",
208
-		 rfpath, pphyreg->rf_rb, retvalue);
187
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
188
+		"RFR-%d Addr[0x%x]=0x%x\n",
189
+		rfpath, pphyreg->rf_rb, retvalue);
209190 	return retvalue;
210191 }
211192 
....@@ -227,20 +208,9 @@
227208 	newoffset = offset;
228209 	data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff;
229210 	rtl_set_bbreg(hw, pphyreg->rf3wire_offset, MASKDWORD, data_and_addr);
230
-	RT_TRACE(rtlpriv, COMP_RF, DBG_TRACE,
231
-		 "RFW-%d Addr[0x%x]=0x%x\n",
232
-		 rfpath, pphyreg->rf3wire_offset, data_and_addr);
233
-}
234
-
235
-static u32 _rtl88e_phy_calculate_bit_shift(u32 bitmask)
236
-{
237
-	u32 i;
238
-
239
-	for (i = 0; i <= 31; i++) {
240
-		if (((bitmask >> i) & 0x1) == 1)
241
-			break;
242
-	}
243
-	return i;
211
+	rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE,
212
+		"RFW-%d Addr[0x%x]=0x%x\n",
213
+		rfpath, pphyreg->rf3wire_offset, data_and_addr);
244214 }
245215 
246216 bool rtl88e_phy_mac_config(struct ieee80211_hw *hw)
....@@ -288,7 +258,7 @@
288258 	u32 _board = rtlefuse->board_type; /*need efuse define*/
289259 	u32 _interface = rtlhal->interface;
290260 	u32 _platform = 0x08;/*SupportPlatform */
291
-	u32 cond = condition;
261
+	u32 cond;
292262 
293263 	if (condition == 0xCDCDCDCD)
294264 		return true;
....@@ -405,11 +375,11 @@
405375 	u32 arraylength;
406376 	u32 *ptrarray;
407377 
408
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl8188EMACPHY_Array\n");
378
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE, "Read Rtl8188EMACPHY_Array\n");
409379 	arraylength = RTL8188EEMAC_1T_ARRAYLEN;
410380 	ptrarray = RTL8188EEMAC_1T_ARRAY;
411
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
412
-		 "Img:RTL8188EEMAC_1T_ARRAY LEN %d\n", arraylength);
381
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
382
+		"Img:RTL8188EEMAC_1T_ARRAY LEN %d\n", arraylength);
413383 	for (i = 0; i < arraylength; i = i + 2)
414384 		rtl_write_byte(rtlpriv, ptrarray[i], (u8)ptrarray[i + 1]);
415385 	return true;
....@@ -511,9 +481,9 @@
511481 					READ_NEXT_PAIR(v1, v2, i);
512482 			}
513483 		}
514
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
515
-			 "The agctab_array_table[0] is %x Rtl818EEPHY_REGArray[1] is %x\n",
516
-			 array_table[i], array_table[i + 1]);
484
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
485
+			"The agctab_array_table[0] is %x Rtl818EEPHY_REGArray[1] is %x\n",
486
+			array_table[i], array_table[i + 1]);
517487 	}
518488 }
519489 
....@@ -545,52 +515,52 @@
545515 
546516 	if (regaddr == RTXAGC_A_RATE18_06) {
547517 		rtlphy->mcs_txpwrlevel_origoffset[count][0] = data;
548
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
549
-			 "MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n",
550
-			  count,
551
-			  rtlphy->mcs_txpwrlevel_origoffset[count][0]);
518
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
519
+			"MCSTxPowerLevelOriginalOffset[%d][0] = 0x%x\n",
520
+			count,
521
+			rtlphy->mcs_txpwrlevel_origoffset[count][0]);
552522 	}
553523 	if (regaddr == RTXAGC_A_RATE54_24) {
554524 		rtlphy->mcs_txpwrlevel_origoffset[count][1] = data;
555
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
556
-			 "MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n",
557
-			  count,
558
-			  rtlphy->mcs_txpwrlevel_origoffset[count][1]);
525
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
526
+			"MCSTxPowerLevelOriginalOffset[%d][1] = 0x%x\n",
527
+			count,
528
+			rtlphy->mcs_txpwrlevel_origoffset[count][1]);
559529 	}
560530 	if (regaddr == RTXAGC_A_CCK1_MCS32) {
561531 		rtlphy->mcs_txpwrlevel_origoffset[count][6] = data;
562
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
563
-			 "MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n",
564
-			  count,
565
-			  rtlphy->mcs_txpwrlevel_origoffset[count][6]);
532
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
533
+			"MCSTxPowerLevelOriginalOffset[%d][6] = 0x%x\n",
534
+			count,
535
+			rtlphy->mcs_txpwrlevel_origoffset[count][6]);
566536 	}
567537 	if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0xffffff00) {
568538 		rtlphy->mcs_txpwrlevel_origoffset[count][7] = data;
569
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
570
-			 "MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n",
571
-			  count,
572
-			  rtlphy->mcs_txpwrlevel_origoffset[count][7]);
539
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
540
+			"MCSTxPowerLevelOriginalOffset[%d][7] = 0x%x\n",
541
+			count,
542
+			rtlphy->mcs_txpwrlevel_origoffset[count][7]);
573543 	}
574544 	if (regaddr == RTXAGC_A_MCS03_MCS00) {
575545 		rtlphy->mcs_txpwrlevel_origoffset[count][2] = data;
576
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
577
-			 "MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n",
578
-			  count,
579
-			  rtlphy->mcs_txpwrlevel_origoffset[count][2]);
546
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
547
+			"MCSTxPowerLevelOriginalOffset[%d][2] = 0x%x\n",
548
+			count,
549
+			rtlphy->mcs_txpwrlevel_origoffset[count][2]);
580550 	}
581551 	if (regaddr == RTXAGC_A_MCS07_MCS04) {
582552 		rtlphy->mcs_txpwrlevel_origoffset[count][3] = data;
583
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
584
-			 "MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n",
585
-			  count,
586
-			  rtlphy->mcs_txpwrlevel_origoffset[count][3]);
553
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
554
+			"MCSTxPowerLevelOriginalOffset[%d][3] = 0x%x\n",
555
+			count,
556
+			rtlphy->mcs_txpwrlevel_origoffset[count][3]);
587557 	}
588558 	if (regaddr == RTXAGC_A_MCS11_MCS08) {
589559 		rtlphy->mcs_txpwrlevel_origoffset[count][4] = data;
590
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
591
-			 "MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n",
592
-			  count,
593
-			  rtlphy->mcs_txpwrlevel_origoffset[count][4]);
560
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
561
+			"MCSTxPowerLevelOriginalOffset[%d][4] = 0x%x\n",
562
+			count,
563
+			rtlphy->mcs_txpwrlevel_origoffset[count][4]);
594564 	}
595565 	if (regaddr == RTXAGC_A_MCS15_MCS12) {
596566 		rtlphy->mcs_txpwrlevel_origoffset[count][5] = data;
....@@ -598,66 +568,66 @@
598568 			count++;
599569 			rtlphy->pwrgroup_cnt = count;
600570 		}
601
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
602
-			 "MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n",
603
-			  count,
604
-			  rtlphy->mcs_txpwrlevel_origoffset[count][5]);
571
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
572
+			"MCSTxPowerLevelOriginalOffset[%d][5] = 0x%x\n",
573
+			count,
574
+			rtlphy->mcs_txpwrlevel_origoffset[count][5]);
605575 	}
606576 	if (regaddr == RTXAGC_B_RATE18_06) {
607577 		rtlphy->mcs_txpwrlevel_origoffset[count][8] = data;
608
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
609
-			 "MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n",
610
-			  count,
611
-			  rtlphy->mcs_txpwrlevel_origoffset[count][8]);
578
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
579
+			"MCSTxPowerLevelOriginalOffset[%d][8] = 0x%x\n",
580
+			count,
581
+			rtlphy->mcs_txpwrlevel_origoffset[count][8]);
612582 	}
613583 	if (regaddr == RTXAGC_B_RATE54_24) {
614584 		rtlphy->mcs_txpwrlevel_origoffset[count][9] = data;
615
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
616
-			 "MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n",
617
-			  count,
618
-			  rtlphy->mcs_txpwrlevel_origoffset[count][9]);
585
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
586
+			"MCSTxPowerLevelOriginalOffset[%d][9] = 0x%x\n",
587
+			count,
588
+			rtlphy->mcs_txpwrlevel_origoffset[count][9]);
619589 	}
620590 	if (regaddr == RTXAGC_B_CCK1_55_MCS32) {
621591 		rtlphy->mcs_txpwrlevel_origoffset[count][14] = data;
622
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
623
-			 "MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n",
624
-			  count,
625
-			  rtlphy->mcs_txpwrlevel_origoffset[count][14]);
592
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
593
+			"MCSTxPowerLevelOriginalOffset[%d][14] = 0x%x\n",
594
+			count,
595
+			rtlphy->mcs_txpwrlevel_origoffset[count][14]);
626596 	}
627597 	if (regaddr == RTXAGC_B_CCK11_A_CCK2_11 && bitmask == 0x000000ff) {
628598 		rtlphy->mcs_txpwrlevel_origoffset[count][15] = data;
629
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
630
-			 "MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n",
631
-			  count,
632
-			  rtlphy->mcs_txpwrlevel_origoffset[count][15]);
599
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
600
+			"MCSTxPowerLevelOriginalOffset[%d][15] = 0x%x\n",
601
+			count,
602
+			rtlphy->mcs_txpwrlevel_origoffset[count][15]);
633603 	}
634604 	if (regaddr == RTXAGC_B_MCS03_MCS00) {
635605 		rtlphy->mcs_txpwrlevel_origoffset[count][10] = data;
636
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
637
-			 "MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n",
638
-			  count,
639
-			  rtlphy->mcs_txpwrlevel_origoffset[count][10]);
606
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
607
+			"MCSTxPowerLevelOriginalOffset[%d][10] = 0x%x\n",
608
+			count,
609
+			rtlphy->mcs_txpwrlevel_origoffset[count][10]);
640610 	}
641611 	if (regaddr == RTXAGC_B_MCS07_MCS04) {
642612 		rtlphy->mcs_txpwrlevel_origoffset[count][11] = data;
643
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
644
-			 "MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n",
645
-			  count,
646
-			  rtlphy->mcs_txpwrlevel_origoffset[count][11]);
613
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
614
+			"MCSTxPowerLevelOriginalOffset[%d][11] = 0x%x\n",
615
+			count,
616
+			rtlphy->mcs_txpwrlevel_origoffset[count][11]);
647617 	}
648618 	if (regaddr == RTXAGC_B_MCS11_MCS08) {
649619 		rtlphy->mcs_txpwrlevel_origoffset[count][12] = data;
650
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
651
-			 "MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n",
652
-			  count,
653
-			  rtlphy->mcs_txpwrlevel_origoffset[count][12]);
620
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
621
+			"MCSTxPowerLevelOriginalOffset[%d][12] = 0x%x\n",
622
+			count,
623
+			rtlphy->mcs_txpwrlevel_origoffset[count][12]);
654624 	}
655625 	if (regaddr == RTXAGC_B_MCS15_MCS12) {
656626 		rtlphy->mcs_txpwrlevel_origoffset[count][13] = data;
657
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
658
-			 "MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n",
659
-			  count,
660
-			  rtlphy->mcs_txpwrlevel_origoffset[count][13]);
627
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
628
+			"MCSTxPowerLevelOriginalOffset[%d][13] = 0x%x\n",
629
+			count,
630
+			rtlphy->mcs_txpwrlevel_origoffset[count][13]);
661631 		if (get_rf_type(rtlphy) != RF_1T1R) {
662632 			count++;
663633 			rtlphy->pwrgroup_cnt = count;
....@@ -671,7 +641,7 @@
671641 	int i;
672642 	u32 *phy_reg_page;
673643 	u16 phy_reg_page_len;
674
-	u32 v1 = 0, v2 = 0, v3 = 0;
644
+	u32 v1 = 0, v2 = 0;
675645 
676646 	phy_reg_page_len = RTL8188EEPHY_REG_ARRAY_PGLEN;
677647 	phy_reg_page = RTL8188EEPHY_REG_ARRAY_PG;
....@@ -680,7 +650,6 @@
680650 		for (i = 0; i < phy_reg_page_len; i = i + 3) {
681651 			v1 = phy_reg_page[i];
682652 			v2 = phy_reg_page[i+1];
683
-			v3 = phy_reg_page[i+2];
684653 
685654 			if (v1 < 0xcdcdcdcd) {
686655 				if (phy_reg_page[i] == 0xfe)
....@@ -711,20 +680,18 @@
711680 
712681 				    v1 = phy_reg_page[i];
713682 				    v2 = phy_reg_page[i+1];
714
-				    v3 = phy_reg_page[i+2];
715683 				    while (v2 != 0xDEAD &&
716684 					   i < phy_reg_page_len - 5) {
717685 					i += 3;
718686 					v1 = phy_reg_page[i];
719687 					v2 = phy_reg_page[i+1];
720
-					v3 = phy_reg_page[i+2];
721688 				    }
722689 				}
723690 			}
724691 		}
725692 	} else {
726
-		RT_TRACE(rtlpriv, COMP_SEND, DBG_TRACE,
727
-			 "configtype != BaseBand_Config_PHY_REG\n");
693
+		rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
694
+			"configtype != BaseBand_Config_PHY_REG\n");
728695 	}
729696 	return true;
730697 }
....@@ -791,16 +758,14 @@
791758 					  enum radio_path rfpath)
792759 {
793760 	struct rtl_priv *rtlpriv = rtl_priv(hw);
794
-	bool rtstatus = true;
795761 	u32 *radioa_array_table;
796762 	u16 radioa_arraylen;
797763 
798764 	radioa_arraylen = RTL8188EE_RADIOA_1TARRAYLEN;
799765 	radioa_array_table = RTL8188EE_RADIOA_1TARRAY;
800
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
801
-		 "Radio_A:RTL8188EE_RADIOA_1TARRAY %d\n", radioa_arraylen);
802
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath);
803
-	rtstatus = true;
766
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
767
+		"Radio_A:RTL8188EE_RADIOA_1TARRAY %d\n", radioa_arraylen);
768
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "Radio No %x\n", rfpath);
804769 	switch (rfpath) {
805770 	case RF90_PATH_A:
806771 		process_path_a(hw, radioa_arraylen, radioa_array_table);
....@@ -827,21 +792,21 @@
827792 	rtlphy->default_initialgain[3] =
828793 	    (u8)rtl_get_bbreg(hw, ROFDM0_XDAGCCORE1, MASKBYTE0);
829794 
830
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
831
-		 "Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n",
832
-		 rtlphy->default_initialgain[0],
833
-		 rtlphy->default_initialgain[1],
834
-		 rtlphy->default_initialgain[2],
835
-		 rtlphy->default_initialgain[3]);
795
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
796
+		"Default initial gain (c50=0x%x, c58=0x%x, c60=0x%x, c68=0x%x\n",
797
+		rtlphy->default_initialgain[0],
798
+		rtlphy->default_initialgain[1],
799
+		rtlphy->default_initialgain[2],
800
+		rtlphy->default_initialgain[3]);
836801 
837802 	rtlphy->framesync = (u8)rtl_get_bbreg(hw, ROFDM0_RXDETECTOR3,
838803 					      MASKBYTE0);
839804 	rtlphy->framesync_c34 = rtl_get_bbreg(hw, ROFDM0_RXDETECTOR2,
840805 					      MASKDWORD);
841806 
842
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
843
-		 "Default framesync (0x%x) = 0x%x\n",
844
-		 ROFDM0_RXDETECTOR3, rtlphy->framesync);
807
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_TRACE,
808
+		"Default framesync (0x%x) = 0x%x\n",
809
+		ROFDM0_RXDETECTOR3, rtlphy->framesync);
845810 }
846811 
847812 static void _rtl88e_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw)
....@@ -1110,10 +1075,10 @@
11101075 	u8 reg_bw_opmode;
11111076 	u8 reg_prsr_rsc;
11121077 
1113
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
1114
-		 "Switch to %s bandwidth\n",
1115
-		  rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
1116
-		  "20MHz" : "40MHz");
1078
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE,
1079
+		"Switch to %s bandwidth\n",
1080
+		rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
1081
+		"20MHz" : "40MHz");
11171082 
11181083 	if (is_hal_stop(rtlhal)) {
11191084 		rtlphy->set_bwmode_inprogress = false;
....@@ -1167,7 +1132,7 @@
11671132 	}
11681133 	rtl88e_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
11691134 	rtlphy->set_bwmode_inprogress = false;
1170
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_LOUD, "\n");
1135
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_LOUD, "\n");
11711136 }
11721137 
11731138 void rtl88e_phy_set_bw_mode(struct ieee80211_hw *hw,
....@@ -1184,8 +1149,8 @@
11841149 	if ((!is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
11851150 		rtl88e_phy_set_bw_mode_callback(hw);
11861151 	} else {
1187
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
1188
-			 "false driver sleep or unload\n");
1152
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
1153
+			"false driver sleep or unload\n");
11891154 		rtlphy->set_bwmode_inprogress = false;
11901155 		rtlphy->current_chan_bw = tmp_bw;
11911156 	}
....@@ -1198,8 +1163,8 @@
11981163 	struct rtl_phy *rtlphy = &rtlpriv->phy;
11991164 	u32 delay;
12001165 
1201
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
1202
-		 "switch to channel%d\n", rtlphy->current_channel);
1166
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE,
1167
+		"switch to channel%d\n", rtlphy->current_channel);
12031168 	if (is_hal_stop(rtlhal))
12041169 		return;
12051170 	do {
....@@ -1217,7 +1182,7 @@
12171182 		}
12181183 		break;
12191184 	} while (true);
1220
-	RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
1185
+	rtl_dbg(rtlpriv, COMP_SCAN, DBG_TRACE, "\n");
12211186 }
12221187 
12231188 u8 rtl88e_phy_sw_chnl(struct ieee80211_hw *hw)
....@@ -1237,13 +1202,13 @@
12371202 	rtlphy->sw_chnl_step = 0;
12381203 	if (!(is_hal_stop(rtlhal)) && !(RT_CANNOT_IO(hw))) {
12391204 		rtl88e_phy_sw_chnl_callback(hw);
1240
-		RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
1241
-			 "sw_chnl_inprogress false schedule workitem current channel %d\n",
1242
-			 rtlphy->current_channel);
1205
+		rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD,
1206
+			"sw_chnl_inprogress false schedule workitem current channel %d\n",
1207
+			rtlphy->current_channel);
12431208 		rtlphy->sw_chnl_inprogress = false;
12441209 	} else {
1245
-		RT_TRACE(rtlpriv, COMP_CHAN, DBG_LOUD,
1246
-			 "sw_chnl_inprogress false driver sleep or unload\n");
1210
+		rtl_dbg(rtlpriv, COMP_CHAN, DBG_LOUD,
1211
+			"sw_chnl_inprogress false driver sleep or unload\n");
12471212 		rtlphy->sw_chnl_inprogress = false;
12481213 	}
12491214 	return 1;
....@@ -1344,9 +1309,9 @@
13441309 			}
13451310 			break;
13461311 		default:
1347
-			RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
1348
-				 "switch case %#x not processed\n",
1349
-				 currentcmd->cmdid);
1312
+			rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
1313
+				"switch case %#x not processed\n",
1314
+				currentcmd->cmdid);
13501315 			break;
13511316 		}
13521317 
....@@ -1610,7 +1575,7 @@
16101575 	u32 i;
16111576 
16121577 	pathon = is_patha_on ? 0x04db25a4 : 0x0b1b25a4;
1613
-	if (false == is2t) {
1578
+	if (!is2t) {
16141579 		pathon = 0x0bdb25a0;
16151580 		rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0);
16161581 	} else {
....@@ -1778,8 +1743,8 @@
17781743 	for (i = 0; i < retrycount; i++) {
17791744 		patha_ok = _rtl88e_phy_path_a_iqk(hw, is2t);
17801745 		if (patha_ok == 0x01) {
1781
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1782
-				 "Path A Tx IQK Success!!\n");
1746
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1747
+				"Path A Tx IQK Success!!\n");
17831748 			result[t][0] = (rtl_get_bbreg(hw, 0xe94, MASKDWORD) &
17841749 					0x3FF0000) >> 16;
17851750 			result[t][1] = (rtl_get_bbreg(hw, 0xe9c, MASKDWORD) &
....@@ -1791,22 +1756,22 @@
17911756 	for (i = 0; i < retrycount; i++) {
17921757 		patha_ok = _rtl88e_phy_path_a_rx_iqk(hw, is2t);
17931758 		if (patha_ok == 0x03) {
1794
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1795
-				 "Path A Rx IQK Success!!\n");
1759
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1760
+				"Path A Rx IQK Success!!\n");
17961761 			result[t][2] = (rtl_get_bbreg(hw, 0xea4, MASKDWORD) &
17971762 					0x3FF0000) >> 16;
17981763 			result[t][3] = (rtl_get_bbreg(hw, 0xeac, MASKDWORD) &
17991764 					0x3FF0000) >> 16;
18001765 			break;
18011766 		} else {
1802
-			RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1803
-				 "Path a RX iqk fail!!!\n");
1767
+			rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1768
+				"Path a RX iqk fail!!!\n");
18041769 		}
18051770 	}
18061771 
18071772 	if (0 == patha_ok)
1808
-		RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD,
1809
-			 "Path A IQK Success!!\n");
1773
+		rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD,
1774
+			"Path A IQK Success!!\n");
18101775 	if (is2t) {
18111776 		_rtl88e_phy_path_a_standby(hw);
18121777 		_rtl88e_phy_path_adda_on(hw, adda_reg, false, is2t);
....@@ -1857,7 +1822,7 @@
18571822 		rtl_set_bbreg(hw, 0xe30, MASKDWORD, 0x01008c00);
18581823 		rtl_set_bbreg(hw, 0xe34, MASKDWORD, 0x01008c00);
18591824 	}
1860
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "88ee IQK Finish!!\n");
1825
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "88ee IQK Finish!!\n");
18611826 }
18621827 
18631828 static void _rtl88e_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
....@@ -1903,7 +1868,7 @@
19031868 	} else {
19041869 		rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
19051870 	}
1906
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "\n");
1871
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "\n");
19071872 }
19081873 
19091874 static void _rtl88e_phy_set_rfpath_switch(struct ieee80211_hw *hw,
....@@ -1912,7 +1877,7 @@
19121877 	struct rtl_priv *rtlpriv = rtl_priv(hw);
19131878 	struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
19141879 	struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
1915
-	RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, "\n");
1880
+	rtl_dbg(rtlpriv, COMP_INIT, DBG_LOUD, "\n");
19161881 
19171882 	if (is_hal_stop(rtlhal)) {
19181883 		u8 u1btmp;
....@@ -1962,9 +1927,9 @@
19621927 	struct rtl_phy *rtlphy = &rtlpriv->phy;
19631928 	long result[4][8];
19641929 	u8 i, final_candidate;
1965
-	bool b_patha_ok, b_pathb_ok;
1966
-	long reg_e94, reg_e9c, reg_ea4, reg_eac, reg_eb4, reg_ebc, reg_ec4,
1967
-	    reg_ecc, reg_tmp = 0;
1930
+	bool b_patha_ok;
1931
+	long reg_e94, reg_e9c, reg_ea4, reg_eb4, reg_ebc,
1932
+	    reg_tmp = 0;
19681933 	bool is12simular, is13simular, is23simular;
19691934 	u32 iqk_bb_reg[9] = {
19701935 		ROFDM0_XARXIQIMBALANCE,
....@@ -1993,7 +1958,6 @@
19931958 	}
19941959 	final_candidate = 0xff;
19951960 	b_patha_ok = false;
1996
-	b_pathb_ok = false;
19971961 	is12simular = false;
19981962 	is23simular = false;
19991963 	is13simular = false;
....@@ -2036,27 +2000,20 @@
20362000 		reg_e94 = result[i][0];
20372001 		reg_e9c = result[i][1];
20382002 		reg_ea4 = result[i][2];
2039
-		reg_eac = result[i][3];
20402003 		reg_eb4 = result[i][4];
20412004 		reg_ebc = result[i][5];
2042
-		reg_ec4 = result[i][6];
2043
-		reg_ecc = result[i][7];
20442005 	}
20452006 	if (final_candidate != 0xff) {
20462007 		reg_e94 = result[final_candidate][0];
20472008 		reg_e9c = result[final_candidate][1];
20482009 		reg_ea4 = result[final_candidate][2];
2049
-		reg_eac = result[final_candidate][3];
20502010 		reg_eb4 = result[final_candidate][4];
20512011 		reg_ebc = result[final_candidate][5];
2052
-		reg_ec4 = result[final_candidate][6];
2053
-		reg_ecc = result[final_candidate][7];
20542012 		rtlphy->reg_eb4 = reg_eb4;
20552013 		rtlphy->reg_ebc = reg_ebc;
20562014 		rtlphy->reg_e94 = reg_e94;
20572015 		rtlphy->reg_e9c = reg_e9c;
20582016 		b_patha_ok = true;
2059
-		b_pathb_ok = true;
20602017 	} else {
20612018 		rtlphy->reg_e94 = 0x100;
20622019 		rtlphy->reg_eb4 = 0x100;
....@@ -2111,24 +2068,24 @@
21112068 	struct rtl_phy *rtlphy = &rtlpriv->phy;
21122069 	bool postprocessing = false;
21132070 
2114
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2115
-		 "-->IO Cmd(%#x), set_io_inprogress(%d)\n",
2116
-		  iotype, rtlphy->set_io_inprogress);
2071
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2072
+		"-->IO Cmd(%#x), set_io_inprogress(%d)\n",
2073
+		iotype, rtlphy->set_io_inprogress);
21172074 	do {
21182075 		switch (iotype) {
21192076 		case IO_CMD_RESUME_DM_BY_SCAN:
2120
-			RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2121
-				 "[IO CMD] Resume DM after scan.\n");
2077
+			rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2078
+				"[IO CMD] Resume DM after scan.\n");
21222079 			postprocessing = true;
21232080 			break;
21242081 		case IO_CMD_PAUSE_BAND0_DM_BY_SCAN:
2125
-			RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2126
-				 "[IO CMD] Pause DM before scan.\n");
2082
+			rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2083
+				"[IO CMD] Pause DM before scan.\n");
21272084 			postprocessing = true;
21282085 			break;
21292086 		default:
2130
-			RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
2131
-				 "switch case %#x not processed\n", iotype);
2087
+			rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
2088
+				"switch case %#x not processed\n", iotype);
21322089 			break;
21332090 		}
21342091 	} while (false);
....@@ -2139,7 +2096,7 @@
21392096 		return false;
21402097 	}
21412098 	rtl88e_phy_set_io(hw);
2142
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype);
2099
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE, "IO Type(%#x)\n", iotype);
21432100 	return true;
21442101 }
21452102 
....@@ -2149,9 +2106,9 @@
21492106 	struct rtl_phy *rtlphy = &rtlpriv->phy;
21502107 	struct dig_t *dm_digtable = &rtlpriv->dm_digtable;
21512108 
2152
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2153
-		 "--->Cmd(%#x), set_io_inprogress(%d)\n",
2154
-		  rtlphy->current_io_type, rtlphy->set_io_inprogress);
2109
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2110
+		"--->Cmd(%#x), set_io_inprogress(%d)\n",
2111
+		rtlphy->current_io_type, rtlphy->set_io_inprogress);
21552112 	switch (rtlphy->current_io_type) {
21562113 	case IO_CMD_RESUME_DM_BY_SCAN:
21572114 		dm_digtable->cur_igvalue = rtlphy->initgain_backup.xaagccore1;
....@@ -2165,14 +2122,14 @@
21652122 		rtl_set_bbreg(hw, RCCK0_CCA, 0xff0000, 0x40);
21662123 		break;
21672124 	default:
2168
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
2169
-			 "switch case %#x not processed\n",
2170
-			 rtlphy->current_io_type);
2125
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
2126
+			"switch case %#x not processed\n",
2127
+			rtlphy->current_io_type);
21712128 		break;
21722129 	}
21732130 	rtlphy->set_io_inprogress = false;
2174
-	RT_TRACE(rtlpriv, COMP_CMD, DBG_TRACE,
2175
-		 "(%#x)\n", rtlphy->current_io_type);
2131
+	rtl_dbg(rtlpriv, COMP_CMD, DBG_TRACE,
2132
+		"(%#x)\n", rtlphy->current_io_type);
21762133 }
21772134 
21782135 static void rtl88ee_phy_set_rf_on(struct ieee80211_hw *hw)
....@@ -2217,19 +2174,18 @@
22172174 
22182175 			do {
22192176 				initializecount++;
2220
-				RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2221
-					 "IPS Set eRf nic enable\n");
2177
+				rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2178
+					"IPS Set eRf nic enable\n");
22222179 				rtstatus = rtl_ps_enable_nic(hw);
22232180 			} while (!rtstatus &&
22242181 				 (initializecount < 10));
22252182 			RT_CLEAR_PS_LEVEL(ppsc,
22262183 					  RT_RF_OFF_LEVL_HALT_NIC);
22272184 		} else {
2228
-			RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2229
-				 "Set ERFON sleeped:%d ms\n",
2230
-				  jiffies_to_msecs(jiffies -
2231
-						   ppsc->
2232
-						   last_sleep_jiffies));
2185
+			rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2186
+				"Set ERFON slept:%d ms\n",
2187
+				jiffies_to_msecs(jiffies -
2188
+						 ppsc->last_sleep_jiffies));
22332189 			ppsc->last_awake_jiffies = jiffies;
22342190 			rtl88ee_phy_set_rf_on(hw);
22352191 		}
....@@ -2250,27 +2206,27 @@
22502206 				queue_id++;
22512207 				continue;
22522208 			} else {
2253
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2254
-					 "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
2255
-					 (i + 1), queue_id,
2256
-					 skb_queue_len(&ring->queue));
2209
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
2210
+					"eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
2211
+					(i + 1), queue_id,
2212
+					skb_queue_len(&ring->queue));
22572213 
22582214 				udelay(10);
22592215 				i++;
22602216 			}
22612217 			if (i >= MAX_DOZE_WAITING_TIMES_9x) {
2262
-				RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2263
-					 "\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
2264
-					  MAX_DOZE_WAITING_TIMES_9x,
2265
-					  queue_id,
2266
-					  skb_queue_len(&ring->queue));
2218
+				rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
2219
+					"\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
2220
+					MAX_DOZE_WAITING_TIMES_9x,
2221
+					queue_id,
2222
+					skb_queue_len(&ring->queue));
22672223 				break;
22682224 			}
22692225 		}
22702226 
22712227 		if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
2272
-			RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2273
-				 "IPS Set eRf nic disable\n");
2228
+			rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2229
+				"IPS Set eRf nic disable\n");
22742230 			rtl_ps_disable_nic(hw);
22752231 			RT_SET_PS_LEVEL(ppsc, RT_RF_OFF_LEVL_HALT_NIC);
22762232 		} else {
....@@ -2293,34 +2249,34 @@
22932249 					queue_id++;
22942250 					continue;
22952251 				} else {
2296
-					RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2297
-						 "eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
2298
-						 (i + 1), queue_id,
2299
-						 skb_queue_len(&ring->queue));
2252
+					rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
2253
+						"eRf Off/Sleep: %d times TcbBusyQueue[%d] =%d before doze!\n",
2254
+						(i + 1), queue_id,
2255
+						skb_queue_len(&ring->queue));
23002256 
23012257 					udelay(10);
23022258 					i++;
23032259 				}
23042260 				if (i >= MAX_DOZE_WAITING_TIMES_9x) {
2305
-					RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
2306
-						 "\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
2307
-						 MAX_DOZE_WAITING_TIMES_9x,
2308
-						 queue_id,
2309
-						 skb_queue_len(&ring->queue));
2261
+					rtl_dbg(rtlpriv, COMP_ERR, DBG_WARNING,
2262
+						"\n ERFSLEEP: %d times TcbBusyQueue[%d] = %d !\n",
2263
+						MAX_DOZE_WAITING_TIMES_9x,
2264
+						queue_id,
2265
+						skb_queue_len(&ring->queue));
23102266 					break;
23112267 				}
23122268 			}
2313
-			RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
2314
-				 "Set ERFSLEEP awaked:%d ms\n",
2315
-				  jiffies_to_msecs(jiffies -
2316
-				  ppsc->last_awake_jiffies));
2269
+			rtl_dbg(rtlpriv, COMP_RF, DBG_DMESG,
2270
+				"Set ERFSLEEP awaked:%d ms\n",
2271
+				jiffies_to_msecs(jiffies -
2272
+				ppsc->last_awake_jiffies));
23172273 			ppsc->last_sleep_jiffies = jiffies;
23182274 			_rtl88ee_phy_set_rf_sleep(hw);
23192275 			break;
23202276 		}
23212277 	default:
2322
-		RT_TRACE(rtlpriv, COMP_ERR, DBG_LOUD,
2323
-			 "switch case %#x not processed\n", rfpwr_state);
2278
+		rtl_dbg(rtlpriv, COMP_ERR, DBG_LOUD,
2279
+			"switch case %#x not processed\n", rfpwr_state);
23242280 		bresult = false;
23252281 		break;
23262282 	}