hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390
kernel/drivers/net/wireless/intel/iwlwifi/pcie/drv.c
....@@ -5,10 +5,9 @@
55 *
66 * GPL LICENSE SUMMARY
77 *
8
- * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved.
98 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
109 * Copyright(c) 2016-2017 Intel Deutschland GmbH
11
- * Copyright(c) 2018 Intel Corporation
10
+ * Copyright(c) 2007 - 2014, 2018 - 2020 Intel Corporation
1211 *
1312 * This program is free software; you can redistribute it and/or modify
1413 * it under the terms of version 2 of the GNU General Public License as
....@@ -19,11 +18,6 @@
1918 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
2019 * General Public License for more details.
2120 *
22
- * You should have received a copy of the GNU General Public License
23
- * along with this program; if not, write to the Free Software
24
- * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
25
- * USA
26
- *
2721 * The full GNU General Public License is included in this distribution
2822 * in the file called COPYING.
2923 *
....@@ -33,11 +27,10 @@
3327 *
3428 * BSD LICENSE
3529 *
36
- * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
3730 * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
3831 * All rights reserved.
3932 * Copyright(c) 2017 Intel Deutschland GmbH
40
- * Copyright(c) 2018 Intel Corporation
33
+ * Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
4134 *
4235 * Redistribution and use in source and binary forms, with or without
4336 * modification, are permitted provided that the following conditions
....@@ -70,7 +63,6 @@
7063 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
7164
7265 #include <linux/module.h>
73
-#include <linux/pm_runtime.h>
7466 #include <linux/pci.h>
7567 #include <linux/acpi.h>
7668
....@@ -78,12 +70,23 @@
7870
7971 #include "iwl-trans.h"
8072 #include "iwl-drv.h"
73
+#include "iwl-prph.h"
8174 #include "internal.h"
75
+
76
+#define TRANS_CFG_MARKER BIT(0)
77
+#define _IS_A(cfg, _struct) __builtin_types_compatible_p(typeof(cfg), \
78
+ struct _struct)
79
+extern int _invalid_type;
80
+#define _TRANS_CFG_MARKER(cfg) \
81
+ (__builtin_choose_expr(_IS_A(cfg, iwl_cfg_trans_params), \
82
+ TRANS_CFG_MARKER, \
83
+ __builtin_choose_expr(_IS_A(cfg, iwl_cfg), 0, _invalid_type)))
84
+#define _ASSIGN_CFG(cfg) (_TRANS_CFG_MARKER(cfg) + (kernel_ulong_t)&(cfg))
8285
8386 #define IWL_PCI_DEVICE(dev, subdev, cfg) \
8487 .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
8588 .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
86
- .driver_data = (kernel_ulong_t)&(cfg)
89
+ .driver_data = _ASSIGN_CFG(cfg)
8790
8891 /* Hardware specific file defines the PCI IDs table for that hardware module */
8992 static const struct pci_device_id iwl_hw_card_ids[] = {
....@@ -518,391 +521,67 @@
518521 {IWL_PCI_DEVICE(0x24FD, 0x9074, iwl8265_2ac_cfg)},
519522
520523 /* 9000 Series */
521
- {IWL_PCI_DEVICE(0x02F0, 0x0030, iwl9560_2ac_cfg_soc)},
522
- {IWL_PCI_DEVICE(0x02F0, 0x0034, iwl9560_2ac_cfg_soc)},
523
- {IWL_PCI_DEVICE(0x02F0, 0x0038, iwl9560_2ac_cfg_soc)},
524
- {IWL_PCI_DEVICE(0x02F0, 0x003C, iwl9560_2ac_cfg_soc)},
525
- {IWL_PCI_DEVICE(0x02F0, 0x0060, iwl9461_2ac_cfg_soc)},
526
- {IWL_PCI_DEVICE(0x02F0, 0x0064, iwl9461_2ac_cfg_soc)},
527
- {IWL_PCI_DEVICE(0x02F0, 0x00A0, iwl9462_2ac_cfg_soc)},
528
- {IWL_PCI_DEVICE(0x02F0, 0x00A4, iwl9462_2ac_cfg_soc)},
529
- {IWL_PCI_DEVICE(0x02F0, 0x0230, iwl9560_2ac_cfg_soc)},
530
- {IWL_PCI_DEVICE(0x02F0, 0x0234, iwl9560_2ac_cfg_soc)},
531
- {IWL_PCI_DEVICE(0x02F0, 0x0238, iwl9560_2ac_cfg_soc)},
532
- {IWL_PCI_DEVICE(0x02F0, 0x023C, iwl9560_2ac_cfg_soc)},
533
- {IWL_PCI_DEVICE(0x02F0, 0x0260, iwl9461_2ac_cfg_soc)},
534
- {IWL_PCI_DEVICE(0x02F0, 0x0264, iwl9461_2ac_cfg_soc)},
535
- {IWL_PCI_DEVICE(0x02F0, 0x02A0, iwl9462_2ac_cfg_soc)},
536
- {IWL_PCI_DEVICE(0x02F0, 0x02A4, iwl9462_2ac_cfg_soc)},
537
- {IWL_PCI_DEVICE(0x02F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
538
- {IWL_PCI_DEVICE(0x02F0, 0x1552, iwl9560_killer_2ac_cfg_soc)},
539
- {IWL_PCI_DEVICE(0x02F0, 0x2030, iwl9560_2ac_cfg_soc)},
540
- {IWL_PCI_DEVICE(0x02F0, 0x2034, iwl9560_2ac_cfg_soc)},
541
- {IWL_PCI_DEVICE(0x02F0, 0x4030, iwl9560_2ac_cfg_soc)},
542
- {IWL_PCI_DEVICE(0x02F0, 0x4034, iwl9560_2ac_cfg_soc)},
543
- {IWL_PCI_DEVICE(0x02F0, 0x40A4, iwl9462_2ac_cfg_soc)},
544
- {IWL_PCI_DEVICE(0x02F0, 0x4234, iwl9560_2ac_cfg_soc)},
545
- {IWL_PCI_DEVICE(0x02F0, 0x42A4, iwl9462_2ac_cfg_soc)},
546
- {IWL_PCI_DEVICE(0x06F0, 0x0030, iwl9560_2ac_cfg_soc)},
547
- {IWL_PCI_DEVICE(0x06F0, 0x0034, iwl9560_2ac_cfg_soc)},
548
- {IWL_PCI_DEVICE(0x06F0, 0x0038, iwl9560_2ac_cfg_soc)},
549
- {IWL_PCI_DEVICE(0x06F0, 0x003C, iwl9560_2ac_cfg_soc)},
550
- {IWL_PCI_DEVICE(0x06F0, 0x0060, iwl9461_2ac_cfg_soc)},
551
- {IWL_PCI_DEVICE(0x06F0, 0x0064, iwl9461_2ac_cfg_soc)},
552
- {IWL_PCI_DEVICE(0x06F0, 0x00A0, iwl9462_2ac_cfg_soc)},
553
- {IWL_PCI_DEVICE(0x06F0, 0x00A4, iwl9462_2ac_cfg_soc)},
554
- {IWL_PCI_DEVICE(0x06F0, 0x0230, iwl9560_2ac_cfg_soc)},
555
- {IWL_PCI_DEVICE(0x06F0, 0x0234, iwl9560_2ac_cfg_soc)},
556
- {IWL_PCI_DEVICE(0x06F0, 0x0238, iwl9560_2ac_cfg_soc)},
557
- {IWL_PCI_DEVICE(0x06F0, 0x023C, iwl9560_2ac_cfg_soc)},
558
- {IWL_PCI_DEVICE(0x06F0, 0x0260, iwl9461_2ac_cfg_soc)},
559
- {IWL_PCI_DEVICE(0x06F0, 0x0264, iwl9461_2ac_cfg_soc)},
560
- {IWL_PCI_DEVICE(0x06F0, 0x02A0, iwl9462_2ac_cfg_soc)},
561
- {IWL_PCI_DEVICE(0x06F0, 0x02A4, iwl9462_2ac_cfg_soc)},
562
- {IWL_PCI_DEVICE(0x06F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
563
- {IWL_PCI_DEVICE(0x06F0, 0x1552, iwl9560_killer_2ac_cfg_soc)},
564
- {IWL_PCI_DEVICE(0x06F0, 0x2030, iwl9560_2ac_cfg_soc)},
565
- {IWL_PCI_DEVICE(0x06F0, 0x2034, iwl9560_2ac_cfg_soc)},
566
- {IWL_PCI_DEVICE(0x06F0, 0x4030, iwl9560_2ac_cfg_soc)},
567
- {IWL_PCI_DEVICE(0x06F0, 0x4034, iwl9560_2ac_cfg_soc)},
568
- {IWL_PCI_DEVICE(0x06F0, 0x40A4, iwl9462_2ac_cfg_soc)},
569
- {IWL_PCI_DEVICE(0x06F0, 0x4234, iwl9560_2ac_cfg_soc)},
570
- {IWL_PCI_DEVICE(0x06F0, 0x42A4, iwl9462_2ac_cfg_soc)},
571
- {IWL_PCI_DEVICE(0x2526, 0x0010, iwl9260_2ac_cfg)},
572
- {IWL_PCI_DEVICE(0x2526, 0x0014, iwl9260_2ac_cfg)},
573
- {IWL_PCI_DEVICE(0x2526, 0x0018, iwl9260_2ac_cfg)},
574
- {IWL_PCI_DEVICE(0x2526, 0x0030, iwl9560_2ac_cfg)},
575
- {IWL_PCI_DEVICE(0x2526, 0x0034, iwl9560_2ac_cfg)},
576
- {IWL_PCI_DEVICE(0x2526, 0x0038, iwl9560_2ac_cfg)},
577
- {IWL_PCI_DEVICE(0x2526, 0x003C, iwl9560_2ac_cfg)},
578
- {IWL_PCI_DEVICE(0x2526, 0x0060, iwl9460_2ac_cfg)},
579
- {IWL_PCI_DEVICE(0x2526, 0x0064, iwl9460_2ac_cfg)},
580
- {IWL_PCI_DEVICE(0x2526, 0x00A0, iwl9460_2ac_cfg)},
581
- {IWL_PCI_DEVICE(0x2526, 0x00A4, iwl9460_2ac_cfg)},
582
- {IWL_PCI_DEVICE(0x2526, 0x0210, iwl9260_2ac_cfg)},
583
- {IWL_PCI_DEVICE(0x2526, 0x0214, iwl9260_2ac_cfg)},
584
- {IWL_PCI_DEVICE(0x2526, 0x0230, iwl9560_2ac_cfg)},
585
- {IWL_PCI_DEVICE(0x2526, 0x0234, iwl9560_2ac_cfg)},
586
- {IWL_PCI_DEVICE(0x2526, 0x0238, iwl9560_2ac_cfg)},
587
- {IWL_PCI_DEVICE(0x2526, 0x023C, iwl9560_2ac_cfg)},
588
- {IWL_PCI_DEVICE(0x2526, 0x0260, iwl9460_2ac_cfg)},
589
- {IWL_PCI_DEVICE(0x2526, 0x0264, iwl9461_2ac_cfg_soc)},
590
- {IWL_PCI_DEVICE(0x2526, 0x02A0, iwl9460_2ac_cfg)},
591
- {IWL_PCI_DEVICE(0x2526, 0x02A4, iwl9460_2ac_cfg)},
592
- {IWL_PCI_DEVICE(0x2526, 0x1010, iwl9260_2ac_cfg)},
593
- {IWL_PCI_DEVICE(0x2526, 0x1030, iwl9560_2ac_cfg)},
594
- {IWL_PCI_DEVICE(0x2526, 0x1210, iwl9260_2ac_cfg)},
595
- {IWL_PCI_DEVICE(0x2526, 0x1410, iwl9270_2ac_cfg)},
596
- {IWL_PCI_DEVICE(0x2526, 0x1420, iwl9460_2ac_cfg_soc)},
597
- {IWL_PCI_DEVICE(0x2526, 0x1550, iwl9260_killer_2ac_cfg)},
598
- {IWL_PCI_DEVICE(0x2526, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
599
- {IWL_PCI_DEVICE(0x2526, 0x1552, iwl9560_killer_2ac_cfg_soc)},
600
- {IWL_PCI_DEVICE(0x2526, 0x1610, iwl9270_2ac_cfg)},
601
- {IWL_PCI_DEVICE(0x2526, 0x2030, iwl9560_2ac_cfg_soc)},
602
- {IWL_PCI_DEVICE(0x2526, 0x2034, iwl9560_2ac_cfg_soc)},
603
- {IWL_PCI_DEVICE(0x2526, 0x4010, iwl9260_2ac_cfg)},
604
- {IWL_PCI_DEVICE(0x2526, 0x4018, iwl9260_2ac_cfg)},
605
- {IWL_PCI_DEVICE(0x2526, 0x4030, iwl9560_2ac_cfg)},
606
- {IWL_PCI_DEVICE(0x2526, 0x4034, iwl9560_2ac_cfg_soc)},
607
- {IWL_PCI_DEVICE(0x2526, 0x40A4, iwl9460_2ac_cfg)},
608
- {IWL_PCI_DEVICE(0x2526, 0x4234, iwl9560_2ac_cfg_soc)},
609
- {IWL_PCI_DEVICE(0x2526, 0x42A4, iwl9462_2ac_cfg_soc)},
610
- {IWL_PCI_DEVICE(0x2526, 0x8014, iwl9260_2ac_cfg)},
611
- {IWL_PCI_DEVICE(0x2526, 0xA014, iwl9260_2ac_cfg)},
612
- {IWL_PCI_DEVICE(0x271B, 0x0010, iwl9160_2ac_cfg)},
613
- {IWL_PCI_DEVICE(0x271B, 0x0014, iwl9160_2ac_cfg)},
614
- {IWL_PCI_DEVICE(0x271B, 0x0210, iwl9160_2ac_cfg)},
615
- {IWL_PCI_DEVICE(0x271B, 0x0214, iwl9260_2ac_cfg)},
616
- {IWL_PCI_DEVICE(0x271C, 0x0214, iwl9260_2ac_cfg)},
617
- {IWL_PCI_DEVICE(0x2720, 0x0034, iwl9560_2ac_cfg)},
618
- {IWL_PCI_DEVICE(0x2720, 0x0038, iwl9560_2ac_cfg)},
619
- {IWL_PCI_DEVICE(0x2720, 0x003C, iwl9560_2ac_cfg)},
620
- {IWL_PCI_DEVICE(0x2720, 0x0060, iwl9461_2ac_cfg_soc)},
621
- {IWL_PCI_DEVICE(0x2720, 0x0064, iwl9461_2ac_cfg_soc)},
622
- {IWL_PCI_DEVICE(0x2720, 0x00A0, iwl9462_2ac_cfg_soc)},
623
- {IWL_PCI_DEVICE(0x2720, 0x00A4, iwl9462_2ac_cfg_soc)},
624
- {IWL_PCI_DEVICE(0x2720, 0x0230, iwl9560_2ac_cfg)},
625
- {IWL_PCI_DEVICE(0x2720, 0x0234, iwl9560_2ac_cfg)},
626
- {IWL_PCI_DEVICE(0x2720, 0x0238, iwl9560_2ac_cfg)},
627
- {IWL_PCI_DEVICE(0x2720, 0x023C, iwl9560_2ac_cfg)},
628
- {IWL_PCI_DEVICE(0x2720, 0x0260, iwl9461_2ac_cfg_soc)},
629
- {IWL_PCI_DEVICE(0x2720, 0x0264, iwl9461_2ac_cfg_soc)},
630
- {IWL_PCI_DEVICE(0x2720, 0x02A0, iwl9462_2ac_cfg_soc)},
631
- {IWL_PCI_DEVICE(0x2720, 0x02A4, iwl9462_2ac_cfg_soc)},
632
- {IWL_PCI_DEVICE(0x2720, 0x1010, iwl9260_2ac_cfg)},
633
- {IWL_PCI_DEVICE(0x2720, 0x1030, iwl9560_2ac_cfg_soc)},
634
- {IWL_PCI_DEVICE(0x2720, 0x1210, iwl9260_2ac_cfg)},
635
- {IWL_PCI_DEVICE(0x2720, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
636
- {IWL_PCI_DEVICE(0x2720, 0x1552, iwl9560_killer_2ac_cfg_soc)},
637
- {IWL_PCI_DEVICE(0x2720, 0x2030, iwl9560_2ac_cfg_soc)},
638
- {IWL_PCI_DEVICE(0x2720, 0x2034, iwl9560_2ac_cfg_soc)},
639
- {IWL_PCI_DEVICE(0x2720, 0x4030, iwl9560_2ac_cfg)},
640
- {IWL_PCI_DEVICE(0x2720, 0x4034, iwl9560_2ac_cfg_soc)},
641
- {IWL_PCI_DEVICE(0x2720, 0x40A4, iwl9462_2ac_cfg_soc)},
642
- {IWL_PCI_DEVICE(0x2720, 0x4234, iwl9560_2ac_cfg_soc)},
643
- {IWL_PCI_DEVICE(0x2720, 0x42A4, iwl9462_2ac_cfg_soc)},
644
- {IWL_PCI_DEVICE(0x30DC, 0x0030, iwl9560_2ac_cfg_soc)},
645
- {IWL_PCI_DEVICE(0x30DC, 0x0034, iwl9560_2ac_cfg_soc)},
646
- {IWL_PCI_DEVICE(0x30DC, 0x0038, iwl9560_2ac_cfg_soc)},
647
- {IWL_PCI_DEVICE(0x30DC, 0x003C, iwl9560_2ac_cfg_soc)},
648
- {IWL_PCI_DEVICE(0x30DC, 0x0060, iwl9460_2ac_cfg_soc)},
649
- {IWL_PCI_DEVICE(0x30DC, 0x0064, iwl9461_2ac_cfg_soc)},
650
- {IWL_PCI_DEVICE(0x30DC, 0x00A0, iwl9462_2ac_cfg_soc)},
651
- {IWL_PCI_DEVICE(0x30DC, 0x00A4, iwl9462_2ac_cfg_soc)},
652
- {IWL_PCI_DEVICE(0x30DC, 0x0230, iwl9560_2ac_cfg_soc)},
653
- {IWL_PCI_DEVICE(0x30DC, 0x0234, iwl9560_2ac_cfg_soc)},
654
- {IWL_PCI_DEVICE(0x30DC, 0x0238, iwl9560_2ac_cfg_soc)},
655
- {IWL_PCI_DEVICE(0x30DC, 0x023C, iwl9560_2ac_cfg_soc)},
656
- {IWL_PCI_DEVICE(0x30DC, 0x0260, iwl9461_2ac_cfg_soc)},
657
- {IWL_PCI_DEVICE(0x30DC, 0x0264, iwl9461_2ac_cfg_soc)},
658
- {IWL_PCI_DEVICE(0x30DC, 0x02A0, iwl9462_2ac_cfg_soc)},
659
- {IWL_PCI_DEVICE(0x30DC, 0x02A4, iwl9462_2ac_cfg_soc)},
660
- {IWL_PCI_DEVICE(0x30DC, 0x1010, iwl9260_2ac_cfg)},
661
- {IWL_PCI_DEVICE(0x30DC, 0x1030, iwl9560_2ac_cfg_soc)},
662
- {IWL_PCI_DEVICE(0x30DC, 0x1210, iwl9260_2ac_cfg)},
663
- {IWL_PCI_DEVICE(0x30DC, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
664
- {IWL_PCI_DEVICE(0x30DC, 0x1552, iwl9560_killer_2ac_cfg_soc)},
665
- {IWL_PCI_DEVICE(0x30DC, 0x2030, iwl9560_2ac_cfg_soc)},
666
- {IWL_PCI_DEVICE(0x30DC, 0x2034, iwl9560_2ac_cfg_soc)},
667
- {IWL_PCI_DEVICE(0x30DC, 0x4030, iwl9560_2ac_cfg_soc)},
668
- {IWL_PCI_DEVICE(0x30DC, 0x4034, iwl9560_2ac_cfg_soc)},
669
- {IWL_PCI_DEVICE(0x30DC, 0x40A4, iwl9462_2ac_cfg_soc)},
670
- {IWL_PCI_DEVICE(0x30DC, 0x4234, iwl9560_2ac_cfg_soc)},
671
- {IWL_PCI_DEVICE(0x30DC, 0x42A4, iwl9462_2ac_cfg_soc)},
672
- {IWL_PCI_DEVICE(0x31DC, 0x0030, iwl9560_2ac_cfg_shared_clk)},
673
- {IWL_PCI_DEVICE(0x31DC, 0x0034, iwl9560_2ac_cfg_shared_clk)},
674
- {IWL_PCI_DEVICE(0x31DC, 0x0038, iwl9560_2ac_cfg_shared_clk)},
675
- {IWL_PCI_DEVICE(0x31DC, 0x003C, iwl9560_2ac_cfg_shared_clk)},
676
- {IWL_PCI_DEVICE(0x31DC, 0x0060, iwl9460_2ac_cfg_shared_clk)},
677
- {IWL_PCI_DEVICE(0x31DC, 0x0064, iwl9461_2ac_cfg_shared_clk)},
678
- {IWL_PCI_DEVICE(0x31DC, 0x00A0, iwl9462_2ac_cfg_shared_clk)},
679
- {IWL_PCI_DEVICE(0x31DC, 0x00A4, iwl9462_2ac_cfg_shared_clk)},
680
- {IWL_PCI_DEVICE(0x31DC, 0x0230, iwl9560_2ac_cfg_shared_clk)},
681
- {IWL_PCI_DEVICE(0x31DC, 0x0234, iwl9560_2ac_cfg_shared_clk)},
682
- {IWL_PCI_DEVICE(0x31DC, 0x0238, iwl9560_2ac_cfg_shared_clk)},
683
- {IWL_PCI_DEVICE(0x31DC, 0x023C, iwl9560_2ac_cfg_shared_clk)},
684
- {IWL_PCI_DEVICE(0x31DC, 0x0260, iwl9461_2ac_cfg_shared_clk)},
685
- {IWL_PCI_DEVICE(0x31DC, 0x0264, iwl9461_2ac_cfg_shared_clk)},
686
- {IWL_PCI_DEVICE(0x31DC, 0x02A0, iwl9462_2ac_cfg_shared_clk)},
687
- {IWL_PCI_DEVICE(0x31DC, 0x02A4, iwl9462_2ac_cfg_shared_clk)},
688
- {IWL_PCI_DEVICE(0x31DC, 0x1010, iwl9260_2ac_cfg)},
689
- {IWL_PCI_DEVICE(0x31DC, 0x1030, iwl9560_2ac_cfg_shared_clk)},
690
- {IWL_PCI_DEVICE(0x31DC, 0x1210, iwl9260_2ac_cfg)},
691
- {IWL_PCI_DEVICE(0x31DC, 0x1551, iwl9560_killer_s_2ac_cfg_shared_clk)},
692
- {IWL_PCI_DEVICE(0x31DC, 0x1552, iwl9560_killer_2ac_cfg_shared_clk)},
693
- {IWL_PCI_DEVICE(0x31DC, 0x2030, iwl9560_2ac_cfg_shared_clk)},
694
- {IWL_PCI_DEVICE(0x31DC, 0x2034, iwl9560_2ac_cfg_shared_clk)},
695
- {IWL_PCI_DEVICE(0x31DC, 0x4030, iwl9560_2ac_cfg_shared_clk)},
696
- {IWL_PCI_DEVICE(0x31DC, 0x4034, iwl9560_2ac_cfg_shared_clk)},
697
- {IWL_PCI_DEVICE(0x31DC, 0x40A4, iwl9462_2ac_cfg_shared_clk)},
698
- {IWL_PCI_DEVICE(0x31DC, 0x4234, iwl9560_2ac_cfg_shared_clk)},
699
- {IWL_PCI_DEVICE(0x31DC, 0x42A4, iwl9462_2ac_cfg_shared_clk)},
524
+ {IWL_PCI_DEVICE(0x2526, PCI_ANY_ID, iwl9000_trans_cfg)},
525
+ {IWL_PCI_DEVICE(0x271B, PCI_ANY_ID, iwl9000_trans_cfg)},
526
+ {IWL_PCI_DEVICE(0x271C, PCI_ANY_ID, iwl9000_trans_cfg)},
527
+ {IWL_PCI_DEVICE(0x30DC, PCI_ANY_ID, iwl9560_long_latency_trans_cfg)},
528
+ {IWL_PCI_DEVICE(0x31DC, PCI_ANY_ID, iwl9560_shared_clk_trans_cfg)},
529
+ {IWL_PCI_DEVICE(0x9DF0, PCI_ANY_ID, iwl9560_trans_cfg)},
530
+ {IWL_PCI_DEVICE(0xA370, PCI_ANY_ID, iwl9560_trans_cfg)},
700531
701
- {IWL_PCI_DEVICE(0x34F0, 0x0030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
702
- {IWL_PCI_DEVICE(0x34F0, 0x0034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
703
- {IWL_PCI_DEVICE(0x34F0, 0x0038, iwl9560_2ac_cfg_qu_b0_jf_b0)},
704
- {IWL_PCI_DEVICE(0x34F0, 0x003C, iwl9560_2ac_cfg_qu_b0_jf_b0)},
705
- {IWL_PCI_DEVICE(0x34F0, 0x0060, iwl9461_2ac_cfg_qu_b0_jf_b0)},
706
- {IWL_PCI_DEVICE(0x34F0, 0x0064, iwl9461_2ac_cfg_qu_b0_jf_b0)},
707
- {IWL_PCI_DEVICE(0x34F0, 0x00A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
708
- {IWL_PCI_DEVICE(0x34F0, 0x00A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
709
- {IWL_PCI_DEVICE(0x34F0, 0x0230, iwl9560_2ac_cfg_qu_b0_jf_b0)},
710
- {IWL_PCI_DEVICE(0x34F0, 0x0234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
711
- {IWL_PCI_DEVICE(0x34F0, 0x0238, iwl9560_2ac_cfg_qu_b0_jf_b0)},
712
- {IWL_PCI_DEVICE(0x34F0, 0x023C, iwl9560_2ac_cfg_qu_b0_jf_b0)},
713
- {IWL_PCI_DEVICE(0x34F0, 0x0260, iwl9461_2ac_cfg_qu_b0_jf_b0)},
714
- {IWL_PCI_DEVICE(0x34F0, 0x0264, iwl9461_2ac_cfg_qu_b0_jf_b0)},
715
- {IWL_PCI_DEVICE(0x34F0, 0x02A0, iwl9462_2ac_cfg_qu_b0_jf_b0)},
716
- {IWL_PCI_DEVICE(0x34F0, 0x02A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
717
- {IWL_PCI_DEVICE(0x34F0, 0x1551, killer1550s_2ac_cfg_qu_b0_jf_b0)},
718
- {IWL_PCI_DEVICE(0x34F0, 0x1552, killer1550i_2ac_cfg_qu_b0_jf_b0)},
719
- {IWL_PCI_DEVICE(0x34F0, 0x2030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
720
- {IWL_PCI_DEVICE(0x34F0, 0x2034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
721
- {IWL_PCI_DEVICE(0x34F0, 0x4030, iwl9560_2ac_cfg_qu_b0_jf_b0)},
722
- {IWL_PCI_DEVICE(0x34F0, 0x4034, iwl9560_2ac_cfg_qu_b0_jf_b0)},
723
- {IWL_PCI_DEVICE(0x34F0, 0x40A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
724
- {IWL_PCI_DEVICE(0x34F0, 0x4234, iwl9560_2ac_cfg_qu_b0_jf_b0)},
725
- {IWL_PCI_DEVICE(0x34F0, 0x42A4, iwl9462_2ac_cfg_qu_b0_jf_b0)},
532
+/* Qu devices */
533
+ {IWL_PCI_DEVICE(0x02F0, PCI_ANY_ID, iwl_qu_trans_cfg)},
534
+ {IWL_PCI_DEVICE(0x06F0, PCI_ANY_ID, iwl_qu_trans_cfg)},
726535
727
- {IWL_PCI_DEVICE(0x3DF0, 0x0030, iwl9560_2ac_cfg_soc)},
728
- {IWL_PCI_DEVICE(0x3DF0, 0x0034, iwl9560_2ac_cfg_soc)},
729
- {IWL_PCI_DEVICE(0x3DF0, 0x0038, iwl9560_2ac_cfg_soc)},
730
- {IWL_PCI_DEVICE(0x3DF0, 0x003C, iwl9560_2ac_cfg_soc)},
731
- {IWL_PCI_DEVICE(0x3DF0, 0x0060, iwl9461_2ac_cfg_soc)},
732
- {IWL_PCI_DEVICE(0x3DF0, 0x0064, iwl9461_2ac_cfg_soc)},
733
- {IWL_PCI_DEVICE(0x3DF0, 0x00A0, iwl9462_2ac_cfg_soc)},
734
- {IWL_PCI_DEVICE(0x3DF0, 0x00A4, iwl9462_2ac_cfg_soc)},
735
- {IWL_PCI_DEVICE(0x3DF0, 0x0230, iwl9560_2ac_cfg_soc)},
736
- {IWL_PCI_DEVICE(0x3DF0, 0x0234, iwl9560_2ac_cfg_soc)},
737
- {IWL_PCI_DEVICE(0x3DF0, 0x0238, iwl9560_2ac_cfg_soc)},
738
- {IWL_PCI_DEVICE(0x3DF0, 0x023C, iwl9560_2ac_cfg_soc)},
739
- {IWL_PCI_DEVICE(0x3DF0, 0x0260, iwl9461_2ac_cfg_soc)},
740
- {IWL_PCI_DEVICE(0x3DF0, 0x0264, iwl9461_2ac_cfg_soc)},
741
- {IWL_PCI_DEVICE(0x3DF0, 0x02A0, iwl9462_2ac_cfg_soc)},
742
- {IWL_PCI_DEVICE(0x3DF0, 0x02A4, iwl9462_2ac_cfg_soc)},
743
- {IWL_PCI_DEVICE(0x3DF0, 0x1010, iwl9260_2ac_cfg)},
744
- {IWL_PCI_DEVICE(0x3DF0, 0x1030, iwl9560_2ac_cfg_soc)},
745
- {IWL_PCI_DEVICE(0x3DF0, 0x1210, iwl9260_2ac_cfg)},
746
- {IWL_PCI_DEVICE(0x3DF0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
747
- {IWL_PCI_DEVICE(0x3DF0, 0x1552, iwl9560_killer_2ac_cfg_soc)},
748
- {IWL_PCI_DEVICE(0x3DF0, 0x2030, iwl9560_2ac_cfg_soc)},
749
- {IWL_PCI_DEVICE(0x3DF0, 0x2034, iwl9560_2ac_cfg_soc)},
750
- {IWL_PCI_DEVICE(0x3DF0, 0x4030, iwl9560_2ac_cfg_soc)},
751
- {IWL_PCI_DEVICE(0x3DF0, 0x4034, iwl9560_2ac_cfg_soc)},
752
- {IWL_PCI_DEVICE(0x3DF0, 0x40A4, iwl9462_2ac_cfg_soc)},
753
- {IWL_PCI_DEVICE(0x3DF0, 0x4234, iwl9560_2ac_cfg_soc)},
754
- {IWL_PCI_DEVICE(0x3DF0, 0x42A4, iwl9462_2ac_cfg_soc)},
755
- {IWL_PCI_DEVICE(0x43F0, 0x0030, iwl9560_2ac_cfg_soc)},
756
- {IWL_PCI_DEVICE(0x43F0, 0x0034, iwl9560_2ac_cfg_soc)},
757
- {IWL_PCI_DEVICE(0x43F0, 0x0038, iwl9560_2ac_cfg_soc)},
758
- {IWL_PCI_DEVICE(0x43F0, 0x003C, iwl9560_2ac_cfg_soc)},
759
- {IWL_PCI_DEVICE(0x43F0, 0x0060, iwl9461_2ac_cfg_soc)},
760
- {IWL_PCI_DEVICE(0x43F0, 0x0064, iwl9461_2ac_cfg_soc)},
761
- {IWL_PCI_DEVICE(0x43F0, 0x00A0, iwl9462_2ac_cfg_soc)},
762
- {IWL_PCI_DEVICE(0x43F0, 0x00A4, iwl9462_2ac_cfg_soc)},
763
- {IWL_PCI_DEVICE(0x43F0, 0x0230, iwl9560_2ac_cfg_soc)},
764
- {IWL_PCI_DEVICE(0x43F0, 0x0234, iwl9560_2ac_cfg_soc)},
765
- {IWL_PCI_DEVICE(0x43F0, 0x0238, iwl9560_2ac_cfg_soc)},
766
- {IWL_PCI_DEVICE(0x43F0, 0x023C, iwl9560_2ac_cfg_soc)},
767
- {IWL_PCI_DEVICE(0x43F0, 0x0260, iwl9461_2ac_cfg_soc)},
768
- {IWL_PCI_DEVICE(0x43F0, 0x0264, iwl9461_2ac_cfg_soc)},
769
- {IWL_PCI_DEVICE(0x43F0, 0x02A0, iwl9462_2ac_cfg_soc)},
770
- {IWL_PCI_DEVICE(0x43F0, 0x02A4, iwl9462_2ac_cfg_soc)},
771
- {IWL_PCI_DEVICE(0x43F0, 0x1010, iwl9260_2ac_cfg)},
772
- {IWL_PCI_DEVICE(0x43F0, 0x1030, iwl9560_2ac_cfg_soc)},
773
- {IWL_PCI_DEVICE(0x43F0, 0x1210, iwl9260_2ac_cfg)},
774
- {IWL_PCI_DEVICE(0x43F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
775
- {IWL_PCI_DEVICE(0x43F0, 0x1552, iwl9560_killer_2ac_cfg_soc)},
776
- {IWL_PCI_DEVICE(0x43F0, 0x2030, iwl9560_2ac_cfg_soc)},
777
- {IWL_PCI_DEVICE(0x43F0, 0x2034, iwl9560_2ac_cfg_soc)},
778
- {IWL_PCI_DEVICE(0x43F0, 0x4030, iwl9560_2ac_cfg_soc)},
779
- {IWL_PCI_DEVICE(0x43F0, 0x4034, iwl9560_2ac_cfg_soc)},
780
- {IWL_PCI_DEVICE(0x43F0, 0x40A4, iwl9462_2ac_cfg_soc)},
781
- {IWL_PCI_DEVICE(0x43F0, 0x4234, iwl9560_2ac_cfg_soc)},
782
- {IWL_PCI_DEVICE(0x43F0, 0x42A4, iwl9462_2ac_cfg_soc)},
783
- {IWL_PCI_DEVICE(0x9DF0, 0x0000, iwl9460_2ac_cfg_soc)},
784
- {IWL_PCI_DEVICE(0x9DF0, 0x0010, iwl9460_2ac_cfg_soc)},
785
- {IWL_PCI_DEVICE(0x9DF0, 0x0030, iwl9560_2ac_cfg_soc)},
786
- {IWL_PCI_DEVICE(0x9DF0, 0x0034, iwl9560_2ac_cfg_soc)},
787
- {IWL_PCI_DEVICE(0x9DF0, 0x0038, iwl9560_2ac_cfg_soc)},
788
- {IWL_PCI_DEVICE(0x9DF0, 0x003C, iwl9560_2ac_cfg_soc)},
789
- {IWL_PCI_DEVICE(0x9DF0, 0x0060, iwl9460_2ac_cfg_soc)},
790
- {IWL_PCI_DEVICE(0x9DF0, 0x0064, iwl9461_2ac_cfg_soc)},
791
- {IWL_PCI_DEVICE(0x9DF0, 0x00A0, iwl9462_2ac_cfg_soc)},
792
- {IWL_PCI_DEVICE(0x9DF0, 0x00A4, iwl9462_2ac_cfg_soc)},
793
- {IWL_PCI_DEVICE(0x9DF0, 0x0210, iwl9460_2ac_cfg_soc)},
794
- {IWL_PCI_DEVICE(0x9DF0, 0x0230, iwl9560_2ac_cfg_soc)},
795
- {IWL_PCI_DEVICE(0x9DF0, 0x0234, iwl9560_2ac_cfg_soc)},
796
- {IWL_PCI_DEVICE(0x9DF0, 0x0238, iwl9560_2ac_cfg_soc)},
797
- {IWL_PCI_DEVICE(0x9DF0, 0x023C, iwl9560_2ac_cfg_soc)},
798
- {IWL_PCI_DEVICE(0x9DF0, 0x0260, iwl9461_2ac_cfg_soc)},
799
- {IWL_PCI_DEVICE(0x9DF0, 0x0264, iwl9461_2ac_cfg_soc)},
800
- {IWL_PCI_DEVICE(0x9DF0, 0x02A0, iwl9462_2ac_cfg_soc)},
801
- {IWL_PCI_DEVICE(0x9DF0, 0x02A4, iwl9462_2ac_cfg_soc)},
802
- {IWL_PCI_DEVICE(0x9DF0, 0x0310, iwl9460_2ac_cfg_soc)},
803
- {IWL_PCI_DEVICE(0x9DF0, 0x0410, iwl9460_2ac_cfg_soc)},
804
- {IWL_PCI_DEVICE(0x9DF0, 0x0510, iwl9460_2ac_cfg_soc)},
805
- {IWL_PCI_DEVICE(0x9DF0, 0x0610, iwl9460_2ac_cfg_soc)},
806
- {IWL_PCI_DEVICE(0x9DF0, 0x0710, iwl9460_2ac_cfg_soc)},
807
- {IWL_PCI_DEVICE(0x9DF0, 0x0A10, iwl9460_2ac_cfg_soc)},
808
- {IWL_PCI_DEVICE(0x9DF0, 0x1010, iwl9260_2ac_cfg)},
809
- {IWL_PCI_DEVICE(0x9DF0, 0x1030, iwl9560_2ac_cfg_soc)},
810
- {IWL_PCI_DEVICE(0x9DF0, 0x1210, iwl9260_2ac_cfg)},
811
- {IWL_PCI_DEVICE(0x9DF0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
812
- {IWL_PCI_DEVICE(0x9DF0, 0x1552, iwl9560_killer_2ac_cfg_soc)},
813
- {IWL_PCI_DEVICE(0x9DF0, 0x2010, iwl9460_2ac_cfg_soc)},
814
- {IWL_PCI_DEVICE(0x9DF0, 0x2030, iwl9560_2ac_cfg_soc)},
815
- {IWL_PCI_DEVICE(0x9DF0, 0x2034, iwl9560_2ac_cfg_soc)},
816
- {IWL_PCI_DEVICE(0x9DF0, 0x2A10, iwl9460_2ac_cfg_soc)},
817
- {IWL_PCI_DEVICE(0x9DF0, 0x4030, iwl9560_2ac_cfg_soc)},
818
- {IWL_PCI_DEVICE(0x9DF0, 0x4034, iwl9560_2ac_cfg_soc)},
819
- {IWL_PCI_DEVICE(0x9DF0, 0x40A4, iwl9462_2ac_cfg_soc)},
820
- {IWL_PCI_DEVICE(0x9DF0, 0x4234, iwl9560_2ac_cfg_soc)},
821
- {IWL_PCI_DEVICE(0x9DF0, 0x42A4, iwl9462_2ac_cfg_soc)},
822
- {IWL_PCI_DEVICE(0xA0F0, 0x0030, iwl9560_2ac_cfg_soc)},
823
- {IWL_PCI_DEVICE(0xA0F0, 0x0034, iwl9560_2ac_cfg_soc)},
824
- {IWL_PCI_DEVICE(0xA0F0, 0x0038, iwl9560_2ac_cfg_soc)},
825
- {IWL_PCI_DEVICE(0xA0F0, 0x003C, iwl9560_2ac_cfg_soc)},
826
- {IWL_PCI_DEVICE(0xA0F0, 0x0060, iwl9461_2ac_cfg_soc)},
827
- {IWL_PCI_DEVICE(0xA0F0, 0x0064, iwl9461_2ac_cfg_soc)},
828
- {IWL_PCI_DEVICE(0xA0F0, 0x00A0, iwl9462_2ac_cfg_soc)},
829
- {IWL_PCI_DEVICE(0xA0F0, 0x00A4, iwl9462_2ac_cfg_soc)},
830
- {IWL_PCI_DEVICE(0xA0F0, 0x0230, iwl9560_2ac_cfg_soc)},
831
- {IWL_PCI_DEVICE(0xA0F0, 0x0234, iwl9560_2ac_cfg_soc)},
832
- {IWL_PCI_DEVICE(0xA0F0, 0x0238, iwl9560_2ac_cfg_soc)},
833
- {IWL_PCI_DEVICE(0xA0F0, 0x023C, iwl9560_2ac_cfg_soc)},
834
- {IWL_PCI_DEVICE(0xA0F0, 0x0260, iwl9461_2ac_cfg_soc)},
835
- {IWL_PCI_DEVICE(0xA0F0, 0x0264, iwl9461_2ac_cfg_soc)},
836
- {IWL_PCI_DEVICE(0xA0F0, 0x02A0, iwl9462_2ac_cfg_soc)},
837
- {IWL_PCI_DEVICE(0xA0F0, 0x02A4, iwl9462_2ac_cfg_soc)},
838
- {IWL_PCI_DEVICE(0xA0F0, 0x1010, iwl9260_2ac_cfg)},
839
- {IWL_PCI_DEVICE(0xA0F0, 0x1030, iwl9560_2ac_cfg_soc)},
840
- {IWL_PCI_DEVICE(0xA0F0, 0x1210, iwl9260_2ac_cfg)},
841
- {IWL_PCI_DEVICE(0xA0F0, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
842
- {IWL_PCI_DEVICE(0xA0F0, 0x1552, iwl9560_killer_2ac_cfg_soc)},
843
- {IWL_PCI_DEVICE(0xA0F0, 0x2030, iwl9560_2ac_cfg_soc)},
844
- {IWL_PCI_DEVICE(0xA0F0, 0x2034, iwl9560_2ac_cfg_soc)},
845
- {IWL_PCI_DEVICE(0xA0F0, 0x4030, iwl9560_2ac_cfg_soc)},
846
- {IWL_PCI_DEVICE(0xA0F0, 0x4034, iwl9560_2ac_cfg_soc)},
847
- {IWL_PCI_DEVICE(0xA0F0, 0x40A4, iwl9462_2ac_cfg_soc)},
848
- {IWL_PCI_DEVICE(0xA0F0, 0x4234, iwl9560_2ac_cfg_soc)},
849
- {IWL_PCI_DEVICE(0xA0F0, 0x42A4, iwl9462_2ac_cfg_soc)},
850
- {IWL_PCI_DEVICE(0xA370, 0x0030, iwl9560_2ac_cfg_soc)},
851
- {IWL_PCI_DEVICE(0xA370, 0x0034, iwl9560_2ac_cfg_soc)},
852
- {IWL_PCI_DEVICE(0xA370, 0x0038, iwl9560_2ac_cfg_soc)},
853
- {IWL_PCI_DEVICE(0xA370, 0x003C, iwl9560_2ac_cfg_soc)},
854
- {IWL_PCI_DEVICE(0xA370, 0x0060, iwl9460_2ac_cfg_soc)},
855
- {IWL_PCI_DEVICE(0xA370, 0x0064, iwl9461_2ac_cfg_soc)},
856
- {IWL_PCI_DEVICE(0xA370, 0x00A0, iwl9462_2ac_cfg_soc)},
857
- {IWL_PCI_DEVICE(0xA370, 0x00A4, iwl9462_2ac_cfg_soc)},
858
- {IWL_PCI_DEVICE(0xA370, 0x0230, iwl9560_2ac_cfg_soc)},
859
- {IWL_PCI_DEVICE(0xA370, 0x0234, iwl9560_2ac_cfg_soc)},
860
- {IWL_PCI_DEVICE(0xA370, 0x0238, iwl9560_2ac_cfg_soc)},
861
- {IWL_PCI_DEVICE(0xA370, 0x023C, iwl9560_2ac_cfg_soc)},
862
- {IWL_PCI_DEVICE(0xA370, 0x0260, iwl9461_2ac_cfg_soc)},
863
- {IWL_PCI_DEVICE(0xA370, 0x0264, iwl9461_2ac_cfg_soc)},
864
- {IWL_PCI_DEVICE(0xA370, 0x02A0, iwl9462_2ac_cfg_soc)},
865
- {IWL_PCI_DEVICE(0xA370, 0x02A4, iwl9462_2ac_cfg_soc)},
866
- {IWL_PCI_DEVICE(0xA370, 0x1010, iwl9260_2ac_cfg)},
867
- {IWL_PCI_DEVICE(0xA370, 0x1030, iwl9560_2ac_cfg_soc)},
868
- {IWL_PCI_DEVICE(0xA370, 0x1210, iwl9260_2ac_cfg)},
869
- {IWL_PCI_DEVICE(0xA370, 0x1551, iwl9560_killer_s_2ac_cfg_soc)},
870
- {IWL_PCI_DEVICE(0xA370, 0x1552, iwl9560_killer_2ac_cfg_soc)},
871
- {IWL_PCI_DEVICE(0xA370, 0x2030, iwl9560_2ac_cfg_soc)},
872
- {IWL_PCI_DEVICE(0xA370, 0x2034, iwl9560_2ac_cfg_soc)},
873
- {IWL_PCI_DEVICE(0xA370, 0x4030, iwl9560_2ac_cfg_soc)},
874
- {IWL_PCI_DEVICE(0xA370, 0x4034, iwl9560_2ac_cfg_soc)},
875
- {IWL_PCI_DEVICE(0xA370, 0x40A4, iwl9462_2ac_cfg_soc)},
876
- {IWL_PCI_DEVICE(0xA370, 0x4234, iwl9560_2ac_cfg_soc)},
877
- {IWL_PCI_DEVICE(0xA370, 0x42A4, iwl9462_2ac_cfg_soc)},
536
+ {IWL_PCI_DEVICE(0x34F0, PCI_ANY_ID, iwl_qu_medium_latency_trans_cfg)},
537
+ {IWL_PCI_DEVICE(0x3DF0, PCI_ANY_ID, iwl_qu_medium_latency_trans_cfg)},
538
+ {IWL_PCI_DEVICE(0x4DF0, PCI_ANY_ID, iwl_qu_medium_latency_trans_cfg)},
878539
879
-/* 22000 Series */
880
- {IWL_PCI_DEVICE(0x2720, 0x0000, iwl22000_2ax_cfg_hr)},
881
- {IWL_PCI_DEVICE(0x2720, 0x0040, iwl22000_2ax_cfg_hr)},
882
- {IWL_PCI_DEVICE(0x2720, 0x0078, iwl22000_2ax_cfg_hr)},
883
- {IWL_PCI_DEVICE(0x2720, 0x0070, iwl22000_2ac_cfg_hr_cdb)},
884
- {IWL_PCI_DEVICE(0x2720, 0x0030, iwl22000_2ac_cfg_hr_cdb)},
885
- {IWL_PCI_DEVICE(0x2720, 0x1080, iwl22000_2ax_cfg_hr)},
886
- {IWL_PCI_DEVICE(0x2720, 0x0090, iwl22000_2ac_cfg_hr_cdb)},
887
- {IWL_PCI_DEVICE(0x2720, 0x0310, iwl22000_2ac_cfg_hr_cdb)},
888
- {IWL_PCI_DEVICE(0x34F0, 0x0040, iwl22000_2ax_cfg_hr)},
889
- {IWL_PCI_DEVICE(0x34F0, 0x0070, iwl22000_2ax_cfg_hr)},
890
- {IWL_PCI_DEVICE(0x34F0, 0x0078, iwl22000_2ax_cfg_hr)},
891
- {IWL_PCI_DEVICE(0x34F0, 0x0310, iwl22000_2ax_cfg_hr)},
892
- {IWL_PCI_DEVICE(0x40C0, 0x0000, iwl22560_2ax_cfg_su_cdb)},
893
- {IWL_PCI_DEVICE(0x40C0, 0x0010, iwl22560_2ax_cfg_su_cdb)},
894
- {IWL_PCI_DEVICE(0x40c0, 0x0090, iwl22560_2ax_cfg_su_cdb)},
895
- {IWL_PCI_DEVICE(0x40C0, 0x0310, iwl22560_2ax_cfg_su_cdb)},
896
- {IWL_PCI_DEVICE(0x40C0, 0x0A10, iwl22560_2ax_cfg_su_cdb)},
897
- {IWL_PCI_DEVICE(0x43F0, 0x0040, iwl22000_2ax_cfg_hr)},
898
- {IWL_PCI_DEVICE(0x43F0, 0x0070, iwl22000_2ax_cfg_hr)},
899
- {IWL_PCI_DEVICE(0x43F0, 0x0078, iwl22000_2ax_cfg_hr)},
900
- {IWL_PCI_DEVICE(0xA0F0, 0x0000, iwl22000_2ax_cfg_hr)},
901
- {IWL_PCI_DEVICE(0xA0F0, 0x0040, iwl22000_2ax_cfg_hr)},
902
- {IWL_PCI_DEVICE(0xA0F0, 0x0070, iwl22000_2ax_cfg_hr)},
903
- {IWL_PCI_DEVICE(0xA0F0, 0x0078, iwl22000_2ax_cfg_hr)},
904
- {IWL_PCI_DEVICE(0xA0F0, 0x00B0, iwl22000_2ax_cfg_hr)},
905
- {IWL_PCI_DEVICE(0xA0F0, 0x0A10, iwl22000_2ax_cfg_hr)},
540
+ {IWL_PCI_DEVICE(0x43F0, PCI_ANY_ID, iwl_qu_long_latency_trans_cfg)},
541
+ {IWL_PCI_DEVICE(0xA0F0, PCI_ANY_ID, iwl_qu_long_latency_trans_cfg)},
542
+
543
+ {IWL_PCI_DEVICE(0x2720, PCI_ANY_ID, iwl_qnj_trans_cfg)},
544
+
545
+ {IWL_PCI_DEVICE(0x2723, PCI_ANY_ID, iwl_ax200_trans_cfg)},
546
+
547
+ {IWL_PCI_DEVICE(0x2725, 0x0090, iwlax211_2ax_cfg_so_gf_a0)},
548
+ {IWL_PCI_DEVICE(0x2725, 0x0020, iwlax210_2ax_cfg_ty_gf_a0)},
549
+ {IWL_PCI_DEVICE(0x2725, 0x0024, iwlax210_2ax_cfg_ty_gf_a0)},
550
+ {IWL_PCI_DEVICE(0x2725, 0x0310, iwlax210_2ax_cfg_ty_gf_a0)},
551
+ {IWL_PCI_DEVICE(0x2725, 0x0510, iwlax210_2ax_cfg_ty_gf_a0)},
552
+ {IWL_PCI_DEVICE(0x2725, 0x0A10, iwlax210_2ax_cfg_ty_gf_a0)},
553
+ {IWL_PCI_DEVICE(0x2725, 0xE020, iwlax210_2ax_cfg_ty_gf_a0)},
554
+ {IWL_PCI_DEVICE(0x2725, 0xE024, iwlax210_2ax_cfg_ty_gf_a0)},
555
+ {IWL_PCI_DEVICE(0x2725, 0x4020, iwlax210_2ax_cfg_ty_gf_a0)},
556
+ {IWL_PCI_DEVICE(0x2725, 0x6020, iwlax210_2ax_cfg_ty_gf_a0)},
557
+ {IWL_PCI_DEVICE(0x2725, 0x6024, iwlax210_2ax_cfg_ty_gf_a0)},
558
+ {IWL_PCI_DEVICE(0x2725, 0x00B0, iwlax411_2ax_cfg_sosnj_gf4_a0)},
559
+ {IWL_PCI_DEVICE(0x2726, 0x0070, iwlax201_cfg_snj_hr_b0)},
560
+ {IWL_PCI_DEVICE(0x2726, 0x0074, iwlax201_cfg_snj_hr_b0)},
561
+ {IWL_PCI_DEVICE(0x2726, 0x0078, iwlax201_cfg_snj_hr_b0)},
562
+ {IWL_PCI_DEVICE(0x2726, 0x007C, iwlax201_cfg_snj_hr_b0)},
563
+ {IWL_PCI_DEVICE(0x2726, 0x0090, iwlax211_cfg_snj_gf_a0)},
564
+ {IWL_PCI_DEVICE(0x2726, 0x0098, iwlax211_cfg_snj_gf_a0)},
565
+ {IWL_PCI_DEVICE(0x2726, 0x00B0, iwlax411_2ax_cfg_sosnj_gf4_a0)},
566
+ {IWL_PCI_DEVICE(0x2726, 0x0510, iwlax211_cfg_snj_gf_a0)},
567
+ {IWL_PCI_DEVICE(0x2726, 0x2074, iwlax201_cfg_snj_hr_b0)},
568
+ {IWL_PCI_DEVICE(0x2726, 0x4070, iwlax201_cfg_snj_hr_b0)},
569
+ {IWL_PCI_DEVICE(0x7A70, 0x0090, iwlax211_2ax_cfg_so_gf_a0_long)},
570
+ {IWL_PCI_DEVICE(0x7A70, 0x0098, iwlax211_2ax_cfg_so_gf_a0_long)},
571
+ {IWL_PCI_DEVICE(0x7A70, 0x00B0, iwlax411_2ax_cfg_so_gf4_a0_long)},
572
+ {IWL_PCI_DEVICE(0x7A70, 0x0310, iwlax211_2ax_cfg_so_gf_a0_long)},
573
+ {IWL_PCI_DEVICE(0x7A70, 0x0510, iwlax211_2ax_cfg_so_gf_a0_long)},
574
+ {IWL_PCI_DEVICE(0x7A70, 0x0A10, iwlax211_2ax_cfg_so_gf_a0_long)},
575
+ {IWL_PCI_DEVICE(0x7AF0, 0x0090, iwlax211_2ax_cfg_so_gf_a0)},
576
+ {IWL_PCI_DEVICE(0x7AF0, 0x0098, iwlax211_2ax_cfg_so_gf_a0)},
577
+ {IWL_PCI_DEVICE(0x7AF0, 0x00B0, iwlax411_2ax_cfg_so_gf4_a0)},
578
+ {IWL_PCI_DEVICE(0x7AF0, 0x0310, iwlax211_2ax_cfg_so_gf_a0)},
579
+ {IWL_PCI_DEVICE(0x7AF0, 0x0510, iwlax211_2ax_cfg_so_gf_a0)},
580
+ {IWL_PCI_DEVICE(0x7AF0, 0x0A10, iwlax211_2ax_cfg_so_gf_a0)},
581
+
582
+/* Ma devices */
583
+ {IWL_PCI_DEVICE(0x2729, PCI_ANY_ID, iwl_ma_trans_cfg)},
584
+ {IWL_PCI_DEVICE(0x7E80, PCI_ANY_ID, iwl_ma_trans_cfg)},
906585
907586 #endif /* CONFIG_IWLMVM */
908587
....@@ -910,22 +589,505 @@
910589 };
911590 MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
912591
592
+#define _IWL_DEV_INFO(_device, _subdevice, _mac_type, _mac_step, _rf_type, \
593
+ _rf_id, _no_160, _cores, _cfg, _name) \
594
+ { .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \
595
+ .name = _name, .mac_type = _mac_type, .rf_type = _rf_type, \
596
+ .no_160 = _no_160, .cores = _cores, .rf_id = _rf_id, \
597
+ .mac_step = _mac_step }
598
+
599
+#define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \
600
+ _IWL_DEV_INFO(_device, _subdevice, IWL_CFG_ANY, IWL_CFG_ANY, \
601
+ IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, \
602
+ _cfg, _name)
603
+
604
+static const struct iwl_dev_info iwl_dev_info_table[] = {
605
+#if IS_ENABLED(CONFIG_IWLMVM)
606
+/* 9000 */
607
+ IWL_DEV_INFO(0x2526, 0x1550, iwl9260_2ac_cfg, iwl9260_killer_1550_name),
608
+ IWL_DEV_INFO(0x2526, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
609
+ IWL_DEV_INFO(0x2526, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
610
+ IWL_DEV_INFO(0x30DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
611
+ IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
612
+ IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
613
+ IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
614
+ IWL_DEV_INFO(0xA370, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
615
+ IWL_DEV_INFO(0xA370, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
616
+
617
+ IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name),
618
+
619
+/* AX200 */
620
+ IWL_DEV_INFO(0x2723, 0x1653, iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name),
621
+ IWL_DEV_INFO(0x2723, 0x1654, iwl_ax200_cfg_cc, iwl_ax200_killer_1650x_name),
622
+ IWL_DEV_INFO(0x2723, IWL_CFG_ANY, iwl_ax200_cfg_cc, iwl_ax200_name),
623
+
624
+ /* QnJ with Hr */
625
+ IWL_DEV_INFO(0x2720, IWL_CFG_ANY, iwl_qnj_b0_hr_b0_cfg, iwl_ax201_name),
626
+
627
+ /* SnJ with HR*/
628
+ IWL_DEV_INFO(0x2726, 0x0244, iwlax201_cfg_snj_hr_b0, iwl_ax101_name),
629
+ IWL_DEV_INFO(0x2726, 0x1651, iwlax201_cfg_snj_hr_b0, iwl_ax201_killer_1650s_name),
630
+ IWL_DEV_INFO(0x2726, 0x1652, iwlax201_cfg_snj_hr_b0, iwl_ax201_killer_1650i_name),
631
+ IWL_DEV_INFO(0x2726, 0x4244, iwlax201_cfg_snj_hr_b0, iwl_ax101_name),
632
+
633
+ /* Qu with Hr */
634
+ IWL_DEV_INFO(0x43F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
635
+ IWL_DEV_INFO(0x43F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
636
+ IWL_DEV_INFO(0x43F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
637
+ IWL_DEV_INFO(0x43F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
638
+ IWL_DEV_INFO(0x43F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650s_name),
639
+ IWL_DEV_INFO(0x43F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650i_name),
640
+ IWL_DEV_INFO(0x43F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
641
+ IWL_DEV_INFO(0x43F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
642
+ IWL_DEV_INFO(0xA0F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
643
+ IWL_DEV_INFO(0xA0F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
644
+ IWL_DEV_INFO(0xA0F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
645
+ IWL_DEV_INFO(0xA0F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
646
+ IWL_DEV_INFO(0xA0F0, 0x0A10, iwl_ax201_cfg_qu_hr, NULL),
647
+ IWL_DEV_INFO(0xA0F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
648
+ IWL_DEV_INFO(0xA0F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
649
+ IWL_DEV_INFO(0xA0F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
650
+ IWL_DEV_INFO(0xA0F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
651
+ IWL_DEV_INFO(0xA0F0, 0x6074, iwl_ax201_cfg_qu_hr, NULL),
652
+ IWL_DEV_INFO(0x02F0, 0x0070, iwl_ax201_cfg_quz_hr, NULL),
653
+ IWL_DEV_INFO(0x02F0, 0x0074, iwl_ax201_cfg_quz_hr, NULL),
654
+ IWL_DEV_INFO(0x02F0, 0x6074, iwl_ax201_cfg_quz_hr, NULL),
655
+ IWL_DEV_INFO(0x02F0, 0x0078, iwl_ax201_cfg_quz_hr, NULL),
656
+ IWL_DEV_INFO(0x02F0, 0x007C, iwl_ax201_cfg_quz_hr, NULL),
657
+ IWL_DEV_INFO(0x02F0, 0x0310, iwl_ax201_cfg_quz_hr, NULL),
658
+ IWL_DEV_INFO(0x02F0, 0x1651, iwl_ax1650s_cfg_quz_hr, NULL),
659
+ IWL_DEV_INFO(0x02F0, 0x1652, iwl_ax1650i_cfg_quz_hr, NULL),
660
+ IWL_DEV_INFO(0x02F0, 0x2074, iwl_ax201_cfg_quz_hr, NULL),
661
+ IWL_DEV_INFO(0x02F0, 0x4070, iwl_ax201_cfg_quz_hr, NULL),
662
+ IWL_DEV_INFO(0x06F0, 0x0070, iwl_ax201_cfg_quz_hr, NULL),
663
+ IWL_DEV_INFO(0x06F0, 0x0074, iwl_ax201_cfg_quz_hr, NULL),
664
+ IWL_DEV_INFO(0x06F0, 0x0078, iwl_ax201_cfg_quz_hr, NULL),
665
+ IWL_DEV_INFO(0x06F0, 0x007C, iwl_ax201_cfg_quz_hr, NULL),
666
+ IWL_DEV_INFO(0x06F0, 0x0310, iwl_ax201_cfg_quz_hr, NULL),
667
+ IWL_DEV_INFO(0x06F0, 0x1651, iwl_ax1650s_cfg_quz_hr, NULL),
668
+ IWL_DEV_INFO(0x06F0, 0x1652, iwl_ax1650i_cfg_quz_hr, NULL),
669
+ IWL_DEV_INFO(0x06F0, 0x2074, iwl_ax201_cfg_quz_hr, NULL),
670
+ IWL_DEV_INFO(0x06F0, 0x4070, iwl_ax201_cfg_quz_hr, NULL),
671
+ IWL_DEV_INFO(0x34F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
672
+ IWL_DEV_INFO(0x34F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
673
+ IWL_DEV_INFO(0x34F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
674
+ IWL_DEV_INFO(0x34F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
675
+ IWL_DEV_INFO(0x34F0, 0x0310, iwl_ax201_cfg_qu_hr, NULL),
676
+ IWL_DEV_INFO(0x34F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
677
+ IWL_DEV_INFO(0x34F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
678
+ IWL_DEV_INFO(0x34F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
679
+ IWL_DEV_INFO(0x34F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
680
+
681
+ IWL_DEV_INFO(0x3DF0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
682
+ IWL_DEV_INFO(0x3DF0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
683
+ IWL_DEV_INFO(0x3DF0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
684
+ IWL_DEV_INFO(0x3DF0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
685
+ IWL_DEV_INFO(0x3DF0, 0x0310, iwl_ax201_cfg_qu_hr, NULL),
686
+ IWL_DEV_INFO(0x3DF0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
687
+ IWL_DEV_INFO(0x3DF0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
688
+ IWL_DEV_INFO(0x3DF0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
689
+ IWL_DEV_INFO(0x3DF0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
690
+
691
+ IWL_DEV_INFO(0x4DF0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
692
+ IWL_DEV_INFO(0x4DF0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
693
+ IWL_DEV_INFO(0x4DF0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
694
+ IWL_DEV_INFO(0x4DF0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
695
+ IWL_DEV_INFO(0x4DF0, 0x0310, iwl_ax201_cfg_qu_hr, NULL),
696
+ IWL_DEV_INFO(0x4DF0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
697
+ IWL_DEV_INFO(0x4DF0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
698
+ IWL_DEV_INFO(0x4DF0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
699
+ IWL_DEV_INFO(0x4DF0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
700
+ IWL_DEV_INFO(0x4DF0, 0x6074, iwl_ax201_cfg_qu_hr, NULL),
701
+
702
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
703
+ IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
704
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
705
+ IWL_CFG_160, IWL_CFG_CORES_BT,
706
+ iwl9560_2ac_cfg_soc, iwl9461_160_name),
707
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
708
+ IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
709
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
710
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
711
+ iwl9560_2ac_cfg_soc, iwl9461_name),
712
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
713
+ IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
714
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
715
+ IWL_CFG_160, IWL_CFG_CORES_BT,
716
+ iwl9560_2ac_cfg_soc, iwl9462_160_name),
717
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
718
+ IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
719
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
720
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
721
+ iwl9560_2ac_cfg_soc, iwl9462_name),
722
+
723
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
724
+ IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
725
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
726
+ IWL_CFG_160, IWL_CFG_CORES_BT,
727
+ iwl9560_2ac_cfg_soc, iwl9560_160_name),
728
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
729
+ IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
730
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
731
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
732
+ iwl9560_2ac_cfg_soc, iwl9560_name),
733
+
734
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
735
+ IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
736
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
737
+ IWL_CFG_160, IWL_CFG_CORES_BT,
738
+ iwl9260_2ac_cfg, iwl9461_160_name),
739
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
740
+ IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
741
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
742
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
743
+ iwl9260_2ac_cfg, iwl9461_name),
744
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
745
+ IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
746
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
747
+ IWL_CFG_160, IWL_CFG_CORES_BT,
748
+ iwl9260_2ac_cfg, iwl9462_160_name),
749
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
750
+ IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
751
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
752
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
753
+ iwl9260_2ac_cfg, iwl9462_name),
754
+
755
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
756
+ IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
757
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
758
+ IWL_CFG_160, IWL_CFG_CORES_BT,
759
+ iwl9260_2ac_cfg, iwl9560_160_name),
760
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
761
+ IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
762
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
763
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
764
+ iwl9260_2ac_cfg, iwl9560_name),
765
+
766
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
767
+ IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
768
+ IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
769
+ IWL_CFG_160, IWL_CFG_CORES_BT_GNSS,
770
+ iwl9260_2ac_cfg, iwl9270_160_name),
771
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
772
+ IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
773
+ IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
774
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT_GNSS,
775
+ iwl9260_2ac_cfg, iwl9270_name),
776
+
777
+ _IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
778
+ IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
779
+ IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
780
+ IWL_CFG_160, IWL_CFG_CORES_BT,
781
+ iwl9260_2ac_cfg, iwl9162_160_name),
782
+ _IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
783
+ IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
784
+ IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
785
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
786
+ iwl9260_2ac_cfg, iwl9162_name),
787
+
788
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
789
+ IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
790
+ IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
791
+ IWL_CFG_160, IWL_CFG_CORES_BT,
792
+ iwl9260_2ac_cfg, iwl9260_160_name),
793
+ _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
794
+ IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
795
+ IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
796
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
797
+ iwl9260_2ac_cfg, iwl9260_name),
798
+
799
+/* Qu with Jf */
800
+ /* Qu B step */
801
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
802
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
803
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
804
+ IWL_CFG_160, IWL_CFG_CORES_BT,
805
+ iwl9560_qu_b0_jf_b0_cfg, iwl9461_160_name),
806
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
807
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
808
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
809
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
810
+ iwl9560_qu_b0_jf_b0_cfg, iwl9461_name),
811
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
812
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
813
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
814
+ IWL_CFG_160, IWL_CFG_CORES_BT,
815
+ iwl9560_qu_b0_jf_b0_cfg, iwl9462_160_name),
816
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
817
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
818
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
819
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
820
+ iwl9560_qu_b0_jf_b0_cfg, iwl9462_name),
821
+
822
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
823
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
824
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
825
+ IWL_CFG_160, IWL_CFG_CORES_BT,
826
+ iwl9560_qu_b0_jf_b0_cfg, iwl9560_160_name),
827
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
828
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
829
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
830
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
831
+ iwl9560_qu_b0_jf_b0_cfg, iwl9560_name),
832
+
833
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
834
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
835
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
836
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
837
+ iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550s_name),
838
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
839
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
840
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
841
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
842
+ iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550i_name),
843
+
844
+ /* Qu C step */
845
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
846
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
847
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
848
+ IWL_CFG_160, IWL_CFG_CORES_BT,
849
+ iwl9560_qu_c0_jf_b0_cfg, iwl9461_160_name),
850
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
851
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
852
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
853
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
854
+ iwl9560_qu_c0_jf_b0_cfg, iwl9461_name),
855
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
856
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
857
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
858
+ IWL_CFG_160, IWL_CFG_CORES_BT,
859
+ iwl9560_qu_c0_jf_b0_cfg, iwl9462_160_name),
860
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
861
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
862
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
863
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
864
+ iwl9560_qu_c0_jf_b0_cfg, iwl9462_name),
865
+
866
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
867
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
868
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
869
+ IWL_CFG_160, IWL_CFG_CORES_BT,
870
+ iwl9560_qu_c0_jf_b0_cfg, iwl9560_160_name),
871
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
872
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
873
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
874
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
875
+ iwl9560_qu_c0_jf_b0_cfg, iwl9560_name),
876
+
877
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
878
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
879
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
880
+ IWL_CFG_160, IWL_CFG_CORES_BT,
881
+ iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550s_name),
882
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
883
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
884
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
885
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
886
+ iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550i_name),
887
+
888
+ /* QuZ */
889
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
890
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
891
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
892
+ IWL_CFG_160, IWL_CFG_CORES_BT,
893
+ iwl9560_quz_a0_jf_b0_cfg, iwl9461_160_name),
894
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
895
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
896
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
897
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
898
+ iwl9560_quz_a0_jf_b0_cfg, iwl9461_name),
899
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
900
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
901
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
902
+ IWL_CFG_160, IWL_CFG_CORES_BT,
903
+ iwl9560_quz_a0_jf_b0_cfg, iwl9462_160_name),
904
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
905
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
906
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
907
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
908
+ iwl9560_quz_a0_jf_b0_cfg, iwl9462_name),
909
+
910
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
911
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
912
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
913
+ IWL_CFG_160, IWL_CFG_CORES_BT,
914
+ iwl9560_quz_a0_jf_b0_cfg, iwl9560_160_name),
915
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
916
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
917
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
918
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
919
+ iwl9560_quz_a0_jf_b0_cfg, iwl9560_name),
920
+
921
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
922
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
923
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
924
+ IWL_CFG_160, IWL_CFG_CORES_BT,
925
+ iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550s_name),
926
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
927
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
928
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
929
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
930
+ iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550i_name),
931
+
932
+ /* QnJ */
933
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
934
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
935
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
936
+ IWL_CFG_160, IWL_CFG_CORES_BT,
937
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9461_160_name),
938
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
939
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
940
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
941
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
942
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9461_name),
943
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
944
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
945
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
946
+ IWL_CFG_160, IWL_CFG_CORES_BT,
947
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9462_160_name),
948
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
949
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
950
+ IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
951
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
952
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9462_name),
953
+
954
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
955
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
956
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
957
+ IWL_CFG_160, IWL_CFG_CORES_BT,
958
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9560_160_name),
959
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
960
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
961
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
962
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
963
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9560_name),
964
+
965
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
966
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
967
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
968
+ IWL_CFG_160, IWL_CFG_CORES_BT,
969
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9560_killer_1550s_name),
970
+ _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
971
+ IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
972
+ IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
973
+ IWL_CFG_NO_160, IWL_CFG_CORES_BT,
974
+ iwl9560_qnj_b0_jf_b0_cfg, iwl9560_killer_1550i_name),
975
+
976
+/* Qu with Hr */
977
+ /* Qu B step */
978
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
979
+ IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
980
+ IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
981
+ IWL_CFG_ANY, IWL_CFG_ANY,
982
+ iwl_qu_b0_hr1_b0, iwl_ax101_name),
983
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
984
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
985
+ IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
986
+ IWL_CFG_ANY, IWL_CFG_ANY,
987
+ iwl_qu_b0_hr_b0, iwl_ax203_name),
988
+
989
+ /* Qu C step */
990
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
991
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
992
+ IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
993
+ IWL_CFG_ANY, IWL_CFG_ANY,
994
+ iwl_qu_c0_hr1_b0, iwl_ax101_name),
995
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
996
+ IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
997
+ IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
998
+ IWL_CFG_ANY, IWL_CFG_ANY,
999
+ iwl_qu_c0_hr_b0, iwl_ax203_name),
1000
+
1001
+ /* QuZ */
1002
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1003
+ IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
1004
+ IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
1005
+ IWL_CFG_ANY, IWL_CFG_ANY,
1006
+ iwl_quz_a0_hr1_b0, iwl_ax101_name),
1007
+
1008
+/* Ma */
1009
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1010
+ IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
1011
+ IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
1012
+ IWL_CFG_ANY, IWL_CFG_ANY,
1013
+ iwl_cfg_ma_a0_gf_a0, iwl_ax211_name),
1014
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1015
+ IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
1016
+ IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
1017
+ IWL_CFG_ANY, IWL_CFG_ANY,
1018
+ iwl_cfg_ma_a0_mr_a0, iwl_ma_name),
1019
+ _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1020
+ IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
1021
+ IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
1022
+ IWL_CFG_ANY, IWL_CFG_ANY,
1023
+ iwl_cfg_snj_a0_mr_a0, iwl_ma_name),
1024
+
1025
+
1026
+#endif /* CONFIG_IWLMVM */
1027
+};
1028
+
9131029 /* PCI registers */
9141030 #define PCI_CFG_RETRY_TIMEOUT 0x041
9151031
9161032 static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
9171033 {
918
- const struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
1034
+ const struct iwl_cfg_trans_params *trans;
9191035 const struct iwl_cfg *cfg_7265d __maybe_unused = NULL;
9201036 struct iwl_trans *iwl_trans;
921
- int ret;
1037
+ struct iwl_trans_pcie *trans_pcie;
1038
+ unsigned long flags;
1039
+ int i, ret;
1040
+ const struct iwl_cfg *cfg;
9221041
923
- if (WARN_ONCE(!cfg->csr, "CSR addresses aren't configured\n"))
924
- return -EINVAL;
1042
+ trans = (void *)(ent->driver_data & ~TRANS_CFG_MARKER);
9251043
926
- iwl_trans = iwl_trans_pcie_alloc(pdev, ent, cfg);
1044
+ /*
1045
+ * This is needed for backwards compatibility with the old
1046
+ * tables, so we don't need to change all the config structs
1047
+ * at the same time. The cfg is used to compare with the old
1048
+ * full cfg structs.
1049
+ */
1050
+ cfg = (void *)(ent->driver_data & ~TRANS_CFG_MARKER);
1051
+
1052
+ /* make sure trans is the first element in iwl_cfg */
1053
+ BUILD_BUG_ON(offsetof(struct iwl_cfg, trans));
1054
+
1055
+ iwl_trans = iwl_trans_pcie_alloc(pdev, ent, trans);
9271056 if (IS_ERR(iwl_trans))
9281057 return PTR_ERR(iwl_trans);
1058
+
1059
+ trans_pcie = IWL_TRANS_GET_PCIE_TRANS(iwl_trans);
1060
+
1061
+ iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
1062
+
1063
+ for (i = 0; i < ARRAY_SIZE(iwl_dev_info_table); i++) {
1064
+ const struct iwl_dev_info *dev_info = &iwl_dev_info_table[i];
1065
+ if ((dev_info->device == (u16)IWL_CFG_ANY ||
1066
+ dev_info->device == pdev->device) &&
1067
+ (dev_info->subdevice == (u16)IWL_CFG_ANY ||
1068
+ dev_info->subdevice == pdev->subsystem_device) &&
1069
+ (dev_info->mac_type == (u16)IWL_CFG_ANY ||
1070
+ dev_info->mac_type ==
1071
+ CSR_HW_REV_TYPE(iwl_trans->hw_rev)) &&
1072
+ (dev_info->mac_step == (u8)IWL_CFG_ANY ||
1073
+ dev_info->mac_step ==
1074
+ CSR_HW_REV_STEP(iwl_trans->hw_rev)) &&
1075
+ (dev_info->rf_type == (u16)IWL_CFG_ANY ||
1076
+ dev_info->rf_type ==
1077
+ CSR_HW_RFID_TYPE(iwl_trans->hw_rf_id)) &&
1078
+ (dev_info->rf_id == (u8)IWL_CFG_ANY ||
1079
+ dev_info->rf_id ==
1080
+ IWL_SUBDEVICE_RF_ID(pdev->subsystem_device)) &&
1081
+ (dev_info->no_160 == (u8)IWL_CFG_ANY ||
1082
+ dev_info->no_160 ==
1083
+ IWL_SUBDEVICE_NO_160(pdev->subsystem_device)) &&
1084
+ (dev_info->cores == (u8)IWL_CFG_ANY ||
1085
+ dev_info->cores ==
1086
+ IWL_SUBDEVICE_CORES(pdev->subsystem_device))) {
1087
+ iwl_trans->cfg = dev_info->cfg;
1088
+ iwl_trans->name = dev_info->name;
1089
+ }
1090
+ }
9291091
9301092 #if IS_ENABLED(CONFIG_IWLMVM)
9311093 /*
....@@ -942,31 +1104,93 @@
9421104 else if (cfg == &iwl7265_n_cfg)
9431105 cfg_7265d = &iwl7265d_n_cfg;
9441106 if (cfg_7265d &&
945
- (iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D) {
946
- cfg = cfg_7265d;
1107
+ (iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
9471108 iwl_trans->cfg = cfg_7265d;
1109
+
1110
+ if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
1111
+ if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_TY) {
1112
+ iwl_trans->cfg = &iwlax210_2ax_cfg_ty_gf_a0;
1113
+ } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1114
+ CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
1115
+ iwl_trans->cfg = &iwlax210_2ax_cfg_so_jf_a0;
1116
+ } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1117
+ CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
1118
+ iwl_trans->cfg = &iwlax211_2ax_cfg_so_gf_a0;
1119
+ } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1120
+ CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
1121
+ iwl_trans->cfg = &iwlax411_2ax_cfg_so_gf4_a0;
1122
+ }
9481123 }
9491124
950
- if (iwl_trans->cfg->rf_id && cfg == &iwl22000_2ac_cfg_hr_cdb &&
951
- iwl_trans->hw_rev != CSR_HW_REV_TYPE_HR_CDB) {
952
- u32 rf_id_chp = CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id);
953
- u32 jf_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF);
954
- u32 hr_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR);
1125
+ /*
1126
+ * This is a hack to switch from Qu B0 to Qu C0. We need to
1127
+ * do this for all cfgs that use Qu B0, except for those using
1128
+ * Jf, which have already been moved to the new table. The
1129
+ * rest must be removed once we convert Qu with Hr as well.
1130
+ */
1131
+ if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QU_C0) {
1132
+ if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
1133
+ iwl_trans->cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
1134
+ else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
1135
+ iwl_trans->cfg = &killer1650s_2ax_cfg_qu_c0_hr_b0;
1136
+ else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
1137
+ iwl_trans->cfg = &killer1650i_2ax_cfg_qu_c0_hr_b0;
1138
+ }
9551139
956
- if (rf_id_chp == jf_chp_id) {
957
- if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
958
- cfg = &iwl22000_2ax_cfg_qnj_jf_b0;
959
- else
960
- cfg = &iwl22000_2ac_cfg_jf;
961
- } else if (rf_id_chp == hr_chp_id) {
962
- if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
963
- cfg = &iwl22000_2ax_cfg_qnj_hr_a0;
964
- else
965
- cfg = &iwl22000_2ac_cfg_hr;
1140
+ /* same thing for QuZ... */
1141
+ if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QUZ) {
1142
+ if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
1143
+ iwl_trans->cfg = &iwl_ax201_cfg_quz_hr;
1144
+ else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
1145
+ iwl_trans->cfg = &iwl_ax1650s_cfg_quz_hr;
1146
+ else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
1147
+ iwl_trans->cfg = &iwl_ax1650i_cfg_quz_hr;
1148
+ }
1149
+
1150
+#endif
1151
+ /*
1152
+ * If we didn't set the cfg yet, the PCI ID table entry should have
1153
+ * been a full config - if yes, use it, otherwise fail.
1154
+ */
1155
+ if (!iwl_trans->cfg) {
1156
+ if (ent->driver_data & TRANS_CFG_MARKER) {
1157
+ pr_err("No config found for PCI dev %04x/%04x, rev=0x%x, rfid=0x%x\n",
1158
+ pdev->device, pdev->subsystem_device,
1159
+ iwl_trans->hw_rev, iwl_trans->hw_rf_id);
1160
+ ret = -EINVAL;
1161
+ goto out_free_trans;
9661162 }
9671163 iwl_trans->cfg = cfg;
9681164 }
969
-#endif
1165
+
1166
+ /* if we don't have a name yet, copy name from the old cfg */
1167
+ if (!iwl_trans->name)
1168
+ iwl_trans->name = iwl_trans->cfg->name;
1169
+
1170
+ if (iwl_trans->trans_cfg->mq_rx_supported) {
1171
+ if (WARN_ON(!iwl_trans->cfg->num_rbds)) {
1172
+ ret = -EINVAL;
1173
+ goto out_free_trans;
1174
+ }
1175
+ trans_pcie->num_rx_bufs = iwl_trans->cfg->num_rbds;
1176
+ } else {
1177
+ trans_pcie->num_rx_bufs = RX_QUEUE_SIZE;
1178
+ }
1179
+
1180
+ if (iwl_trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_8000 &&
1181
+ iwl_trans_grab_nic_access(iwl_trans, &flags)) {
1182
+ u32 hw_step;
1183
+
1184
+ hw_step = iwl_read_umac_prph_no_grab(iwl_trans, WFPM_CTRL_REG);
1185
+ hw_step |= ENABLE_WFPM;
1186
+ iwl_write_umac_prph_no_grab(iwl_trans, WFPM_CTRL_REG, hw_step);
1187
+ hw_step = iwl_read_prph_no_grab(iwl_trans, CNVI_AUX_MISC_CHIP);
1188
+ hw_step = (hw_step >> HW_STEP_LOCATION_BITS) & 0xF;
1189
+ if (hw_step == 0x3)
1190
+ iwl_trans->hw_rev = (iwl_trans->hw_rev & 0xFFFFFFF3) |
1191
+ (SILICON_C_STEP << 2);
1192
+ iwl_trans_release_nic_access(iwl_trans, &flags);
1193
+ }
9701194
9711195 pci_set_drvdata(pdev, iwl_trans);
9721196 iwl_trans->drv = iwl_drv_start(iwl_trans);
....@@ -977,39 +1201,10 @@
9771201 }
9781202
9791203 /* register transport layer debugfs here */
980
- ret = iwl_trans_pcie_dbgfs_register(iwl_trans);
981
- if (ret)
982
- goto out_free_drv;
983
-
984
- /* if RTPM is in use, enable it in our device */
985
- if (iwl_trans->runtime_pm_mode != IWL_PLAT_PM_MODE_DISABLED) {
986
- /* We explicitly set the device to active here to
987
- * clear contingent errors.
988
- */
989
- pm_runtime_set_active(&pdev->dev);
990
-
991
- pm_runtime_set_autosuspend_delay(&pdev->dev,
992
- iwlwifi_mod_params.d0i3_timeout);
993
- pm_runtime_use_autosuspend(&pdev->dev);
994
-
995
- /* We are not supposed to call pm_runtime_allow() by
996
- * ourselves, but let userspace enable runtime PM via
997
- * sysfs. However, since we don't enable this from
998
- * userspace yet, we need to allow/forbid() ourselves.
999
- */
1000
- pm_runtime_allow(&pdev->dev);
1001
- }
1002
-
1003
- /* The PCI device starts with a reference taken and we are
1004
- * supposed to release it here. But to simplify the
1005
- * interaction with the opmode, we don't do it now, but let
1006
- * the opmode release it when it's ready.
1007
- */
1204
+ iwl_trans_pcie_dbgfs_register(iwl_trans);
10081205
10091206 return 0;
10101207
1011
-out_free_drv:
1012
- iwl_drv_stop(iwl_trans->drv);
10131208 out_free_trans:
10141209 iwl_trans_pcie_free(iwl_trans);
10151210 return ret;
....@@ -1019,14 +1214,8 @@
10191214 {
10201215 struct iwl_trans *trans = pci_get_drvdata(pdev);
10211216
1022
- /* if RTPM was in use, restore it to the state before probe */
1023
- if (trans->runtime_pm_mode != IWL_PLAT_PM_MODE_DISABLED) {
1024
- /* We should not call forbid here, but we do for now.
1025
- * Check the comment to pm_runtime_allow() in
1026
- * iwl_pci_probe().
1027
- */
1028
- pm_runtime_forbid(trans->dev);
1029
- }
1217
+ if (!trans)
1218
+ return;
10301219
10311220 iwl_drv_stop(trans->drv);
10321221
....@@ -1085,164 +1274,9 @@
10851274 return 0;
10861275 }
10871276
1088
-int iwl_pci_fw_enter_d0i3(struct iwl_trans *trans)
1089
-{
1090
- struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1091
- int ret;
1092
-
1093
- if (test_bit(STATUS_FW_ERROR, &trans->status))
1094
- return 0;
1095
-
1096
- set_bit(STATUS_TRANS_GOING_IDLE, &trans->status);
1097
-
1098
- /* config the fw */
1099
- ret = iwl_op_mode_enter_d0i3(trans->op_mode);
1100
- if (ret == 1) {
1101
- IWL_DEBUG_RPM(trans, "aborting d0i3 entrance\n");
1102
- clear_bit(STATUS_TRANS_GOING_IDLE, &trans->status);
1103
- return -EBUSY;
1104
- }
1105
- if (ret)
1106
- goto err;
1107
-
1108
- ret = wait_event_timeout(trans_pcie->d0i3_waitq,
1109
- test_bit(STATUS_TRANS_IDLE, &trans->status),
1110
- msecs_to_jiffies(IWL_TRANS_IDLE_TIMEOUT));
1111
- if (!ret) {
1112
- IWL_ERR(trans, "Timeout entering D0i3\n");
1113
- ret = -ETIMEDOUT;
1114
- goto err;
1115
- }
1116
-
1117
- clear_bit(STATUS_TRANS_GOING_IDLE, &trans->status);
1118
-
1119
- return 0;
1120
-err:
1121
- clear_bit(STATUS_TRANS_GOING_IDLE, &trans->status);
1122
- iwl_trans_fw_error(trans);
1123
- return ret;
1124
-}
1125
-
1126
-int iwl_pci_fw_exit_d0i3(struct iwl_trans *trans)
1127
-{
1128
- struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1129
- int ret;
1130
-
1131
- /* sometimes a D0i3 entry is not followed through */
1132
- if (!test_bit(STATUS_TRANS_IDLE, &trans->status))
1133
- return 0;
1134
-
1135
- /* config the fw */
1136
- ret = iwl_op_mode_exit_d0i3(trans->op_mode);
1137
- if (ret)
1138
- goto err;
1139
-
1140
- /* we clear STATUS_TRANS_IDLE only when D0I3_END command is completed */
1141
-
1142
- ret = wait_event_timeout(trans_pcie->d0i3_waitq,
1143
- !test_bit(STATUS_TRANS_IDLE, &trans->status),
1144
- msecs_to_jiffies(IWL_TRANS_IDLE_TIMEOUT));
1145
- if (!ret) {
1146
- IWL_ERR(trans, "Timeout exiting D0i3\n");
1147
- ret = -ETIMEDOUT;
1148
- goto err;
1149
- }
1150
-
1151
- return 0;
1152
-err:
1153
- clear_bit(STATUS_TRANS_IDLE, &trans->status);
1154
- iwl_trans_fw_error(trans);
1155
- return ret;
1156
-}
1157
-
1158
-#ifdef CONFIG_IWLWIFI_PCIE_RTPM
1159
-static int iwl_pci_runtime_suspend(struct device *device)
1160
-{
1161
- struct pci_dev *pdev = to_pci_dev(device);
1162
- struct iwl_trans *trans = pci_get_drvdata(pdev);
1163
- int ret;
1164
-
1165
- IWL_DEBUG_RPM(trans, "entering runtime suspend\n");
1166
-
1167
- if (test_bit(STATUS_DEVICE_ENABLED, &trans->status)) {
1168
- ret = iwl_pci_fw_enter_d0i3(trans);
1169
- if (ret < 0)
1170
- return ret;
1171
- }
1172
-
1173
- trans->system_pm_mode = IWL_PLAT_PM_MODE_D0I3;
1174
-
1175
- iwl_trans_d3_suspend(trans, false, false);
1176
-
1177
- return 0;
1178
-}
1179
-
1180
-static int iwl_pci_runtime_resume(struct device *device)
1181
-{
1182
- struct pci_dev *pdev = to_pci_dev(device);
1183
- struct iwl_trans *trans = pci_get_drvdata(pdev);
1184
- enum iwl_d3_status d3_status;
1185
-
1186
- IWL_DEBUG_RPM(trans, "exiting runtime suspend (resume)\n");
1187
-
1188
- iwl_trans_d3_resume(trans, &d3_status, false, false);
1189
-
1190
- if (test_bit(STATUS_DEVICE_ENABLED, &trans->status))
1191
- return iwl_pci_fw_exit_d0i3(trans);
1192
-
1193
- return 0;
1194
-}
1195
-
1196
-static int iwl_pci_system_prepare(struct device *device)
1197
-{
1198
- struct pci_dev *pdev = to_pci_dev(device);
1199
- struct iwl_trans *trans = pci_get_drvdata(pdev);
1200
-
1201
- IWL_DEBUG_RPM(trans, "preparing for system suspend\n");
1202
-
1203
- /* This is called before entering system suspend and before
1204
- * the runtime resume is called. Set the suspending flag to
1205
- * prevent the wakelock from being taken.
1206
- */
1207
- trans->suspending = true;
1208
-
1209
- /* Wake the device up from runtime suspend before going to
1210
- * platform suspend. This is needed because we don't know
1211
- * whether wowlan any is set and, if it's not, mac80211 will
1212
- * disconnect (in which case, we can't be in D0i3).
1213
- */
1214
- pm_runtime_resume(device);
1215
-
1216
- return 0;
1217
-}
1218
-
1219
-static void iwl_pci_system_complete(struct device *device)
1220
-{
1221
- struct pci_dev *pdev = to_pci_dev(device);
1222
- struct iwl_trans *trans = pci_get_drvdata(pdev);
1223
-
1224
- IWL_DEBUG_RPM(trans, "completing system suspend\n");
1225
-
1226
- /* This is called as a counterpart to the prepare op. It is
1227
- * called either when suspending fails or when suspend
1228
- * completed successfully. Now there's no risk of grabbing
1229
- * the wakelock anymore, so we can release the suspending
1230
- * flag.
1231
- */
1232
- trans->suspending = false;
1233
-}
1234
-#endif /* CONFIG_IWLWIFI_PCIE_RTPM */
1235
-
12361277 static const struct dev_pm_ops iwl_dev_pm_ops = {
12371278 SET_SYSTEM_SLEEP_PM_OPS(iwl_pci_suspend,
12381279 iwl_pci_resume)
1239
-#ifdef CONFIG_IWLWIFI_PCIE_RTPM
1240
- SET_RUNTIME_PM_OPS(iwl_pci_runtime_suspend,
1241
- iwl_pci_runtime_resume,
1242
- NULL)
1243
- .prepare = iwl_pci_system_prepare,
1244
- .complete = iwl_pci_system_complete,
1245
-#endif /* CONFIG_IWLWIFI_PCIE_RTPM */
12461280 };
12471281
12481282 #define IWL_PM_OPS (&iwl_dev_pm_ops)