.. | .. |
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5 | 5 | * |
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6 | 6 | * GPL LICENSE SUMMARY |
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7 | 7 | * |
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8 | | - * Copyright(c) 2007 - 2014 Intel Corporation. All rights reserved. |
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9 | 8 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
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10 | 9 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
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| 10 | + * Copyright(c) 2007 - 2014, 2018 - 2020 Intel Corporation |
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11 | 11 | * |
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12 | 12 | * This program is free software; you can redistribute it and/or modify |
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13 | 13 | * it under the terms of version 2 of the GNU General Public License as |
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.. | .. |
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27 | 27 | * |
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28 | 28 | * BSD LICENSE |
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29 | 29 | * |
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30 | | - * Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved. |
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31 | 30 | * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH |
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32 | 31 | * Copyright(c) 2016 - 2017 Intel Deutschland GmbH |
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| 32 | + * Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation |
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33 | 33 | * All rights reserved. |
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34 | 34 | * |
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35 | 35 | * Redistribution and use in source and binary forms, with or without |
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.. | .. |
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79 | 79 | */ |
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80 | 80 | UMAC_RD_WR = 0x1, |
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81 | 81 | /** |
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| 82 | + * @DBGC_SUSPEND_RESUME: |
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| 83 | + * DBGC suspend/resume commad. Uses a single dword as data: |
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| 84 | + * 0 - resume DBGC recording |
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| 85 | + * 1 - suspend DBGC recording |
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| 86 | + */ |
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| 87 | + DBGC_SUSPEND_RESUME = 0x7, |
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| 88 | + /** |
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| 89 | + * @BUFFER_ALLOCATION: |
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| 90 | + * passes DRAM buffers to a DBGC |
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| 91 | + * &struct iwl_buf_alloc_cmd |
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| 92 | + */ |
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| 93 | + BUFFER_ALLOCATION = 0x8, |
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| 94 | + /** |
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82 | 95 | * @MFU_ASSERT_DUMP_NTF: |
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83 | 96 | * &struct iwl_mfu_assert_dump_notif |
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84 | 97 | */ |
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.. | .. |
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98 | 111 | FW_ERR_OBSOLETE_FUNC = 0x12, |
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99 | 112 | FW_ERR_UNEXPECTED = 0xFE, |
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100 | 113 | FW_ERR_FATAL = 0xFF |
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| 114 | +}; |
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| 115 | + |
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| 116 | +/** enum iwl_dbg_suspend_resume_cmds - dbgc suspend resume operations |
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| 117 | + * dbgc suspend resume command operations |
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| 118 | + * @DBGC_RESUME_CMD: resume dbgc recording |
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| 119 | + * @DBGC_SUSPEND_CMD: stop dbgc recording |
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| 120 | + */ |
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| 121 | +enum iwl_dbg_suspend_resume_cmds { |
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| 122 | + DBGC_RESUME_CMD, |
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| 123 | + DBGC_SUSPEND_CMD, |
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101 | 124 | }; |
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102 | 125 | |
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103 | 126 | /** |
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.. | .. |
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193 | 216 | * @page_buff_size: size of %page_buff_addr |
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194 | 217 | * @lmac_num: number of LMACs (1 or 2) |
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195 | 218 | * @lmac_smem: per - LMAC smem data |
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| 219 | + * @rxfifo2_control_addr: start addr of RXF2C |
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| 220 | + * @rxfifo2_control_size: size of RXF2C |
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196 | 221 | */ |
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197 | 222 | struct iwl_shared_mem_cfg { |
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198 | 223 | __le32 shared_mem_addr; |
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.. | .. |
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204 | 229 | __le32 page_buff_addr; |
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205 | 230 | __le32 page_buff_size; |
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206 | 231 | __le32 lmac_num; |
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207 | | - struct iwl_shared_mem_lmac_cfg lmac_smem[2]; |
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208 | | -} __packed; /* SHARED_MEM_ALLOC_API_S_VER_3 */ |
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| 232 | + struct iwl_shared_mem_lmac_cfg lmac_smem[3]; |
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| 233 | + __le32 rxfifo2_control_addr; |
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| 234 | + __le32 rxfifo2_control_size; |
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| 235 | +} __packed; /* SHARED_MEM_ALLOC_API_S_VER_4 */ |
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209 | 236 | |
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210 | 237 | /** |
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211 | 238 | * struct iwl_mfuart_load_notif - mfuart image version & status |
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.. | .. |
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333 | 360 | __le32 data[]; |
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334 | 361 | } __packed; /* DEBUG_(U|L)MAC_RD_WR_RSP_API_S_VER_1 */ |
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335 | 362 | |
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336 | | -#define CONT_REC_COMMAND_SIZE 80 |
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337 | | -#define ENABLE_CONT_RECORDING 0x15 |
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338 | | -#define DISABLE_CONT_RECORDING 0x16 |
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339 | | - |
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340 | | -/* |
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341 | | - * struct iwl_continuous_record_mode - recording mode |
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| 363 | +/** |
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| 364 | + * struct iwl_dbg_suspend_resume_cmd - dbgc suspend resume command |
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| 365 | + * @operation: suspend or resume operation, uses |
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| 366 | + * &enum iwl_dbg_suspend_resume_cmds |
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342 | 367 | */ |
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343 | | -struct iwl_continuous_record_mode { |
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344 | | - __le16 enable_recording; |
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| 368 | +struct iwl_dbg_suspend_resume_cmd { |
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| 369 | + __le32 operation; |
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345 | 370 | } __packed; |
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346 | 371 | |
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347 | | -/* |
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348 | | - * struct iwl_continuous_record_cmd - enable/disable continuous recording |
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| 372 | +#define BUF_ALLOC_MAX_NUM_FRAGS 16 |
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| 373 | + |
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| 374 | +/** |
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| 375 | + * struct iwl_buf_alloc_frag - a DBGC fragment |
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| 376 | + * @addr: base address of the fragment |
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| 377 | + * @size: size of the fragment |
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349 | 378 | */ |
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350 | | -struct iwl_continuous_record_cmd { |
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351 | | - struct iwl_continuous_record_mode record_mode; |
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352 | | - u8 pad[CONT_REC_COMMAND_SIZE - |
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353 | | - sizeof(struct iwl_continuous_record_mode)]; |
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354 | | -} __packed; |
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| 379 | +struct iwl_buf_alloc_frag { |
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| 380 | + __le64 addr; |
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| 381 | + __le32 size; |
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| 382 | +} __packed; /* FRAGMENT_STRUCTURE_API_S_VER_1 */ |
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| 383 | + |
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| 384 | +/** |
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| 385 | + * struct iwl_buf_alloc_cmd - buffer allocation command |
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| 386 | + * @alloc_id: &enum iwl_fw_ini_allocation_id |
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| 387 | + * @buf_location: &enum iwl_fw_ini_buffer_location |
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| 388 | + * @num_frags: number of fragments |
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| 389 | + * @frags: fragments array |
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| 390 | + */ |
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| 391 | +struct iwl_buf_alloc_cmd { |
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| 392 | + __le32 alloc_id; |
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| 393 | + __le32 buf_location; |
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| 394 | + __le32 num_frags; |
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| 395 | + struct iwl_buf_alloc_frag frags[BUF_ALLOC_MAX_NUM_FRAGS]; |
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| 396 | +} __packed; /* BUFFER_ALLOCATION_CMD_API_S_VER_2 */ |
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355 | 397 | |
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356 | 398 | #endif /* __iwl_fw_api_debug_h__ */ |
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