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2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/drivers/net/wireless/ath/ath10k/core.h
....@@ -1,19 +1,8 @@
1
+/* SPDX-License-Identifier: ISC */
12 /*
23  * Copyright (c) 2005-2011 Atheros Communications Inc.
34  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
4
- * Copyright (c) 2018, The Linux Foundation. All rights reserved.
5
- *
6
- * Permission to use, copy, modify, and/or distribute this software for any
7
- * purpose with or without fee is hereby granted, provided that the above
8
- * copyright notice and this permission notice appear in all copies.
9
- *
10
- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11
- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12
- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13
- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14
- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15
- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16
- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
5
+ * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
176  */
187 
198 #ifndef _CORE_H_
....@@ -90,15 +79,12 @@
9079 /* The magic used by QCA spec */
9180 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
9281 
93
-struct ath10k;
82
+/* Default Airtime weight multipler (Tuned for multiclient performance) */
83
+#define ATH10K_AIRTIME_WEIGHT_MULTIPLIER  4
9484 
95
-enum ath10k_bus {
96
-	ATH10K_BUS_PCI,
97
-	ATH10K_BUS_AHB,
98
-	ATH10K_BUS_SDIO,
99
-	ATH10K_BUS_USB,
100
-	ATH10K_BUS_SNOC,
101
-};
85
+#define ATH10K_MAX_RETRY_COUNT 30
86
+
87
+struct ath10k;
10288 
10389 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
10490 {
....@@ -124,6 +110,8 @@
124110 	ATH10K_SKB_F_DELIVER_CAB = BIT(2),
125111 	ATH10K_SKB_F_MGMT = BIT(3),
126112 	ATH10K_SKB_F_QOS = BIT(4),
113
+	ATH10K_SKB_F_RAW_TX = BIT(5),
114
+	ATH10K_SKB_F_NOACK_TID = BIT(6),
127115 };
128116 
129117 struct ath10k_skb_cb {
....@@ -131,13 +119,16 @@
131119 	u8 flags;
132120 	u8 eid;
133121 	u16 msdu_id;
122
+	u16 airtime_est;
134123 	struct ieee80211_vif *vif;
135124 	struct ieee80211_txq *txq;
125
+	u32 ucast_cipher;
136126 } __packed;
137127 
138128 struct ath10k_skb_rxcb {
139129 	dma_addr_t paddr;
140130 	struct hlist_node hlist;
131
+	u8 eid;
141132 };
142133 
143134 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
....@@ -161,6 +152,26 @@
161152 	return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
162153 }
163154 
155
+enum ath10k_phy_mode {
156
+	ATH10K_PHY_MODE_LEGACY = 0,
157
+	ATH10K_PHY_MODE_HT = 1,
158
+	ATH10K_PHY_MODE_VHT = 2,
159
+};
160
+
161
+/* Data rate 100KBPS based on IE Index */
162
+struct ath10k_index_ht_data_rate_type {
163
+	u8   beacon_rate_index;
164
+	u16  supported_rate[4];
165
+};
166
+
167
+/* Data rate 100KBPS based on IE Index */
168
+struct ath10k_index_vht_data_rate_type {
169
+	u8   beacon_rate_index;
170
+	u16  supported_VHT80_rate[2];
171
+	u16  supported_VHT40_rate[2];
172
+	u16  supported_VHT20_rate[2];
173
+};
174
+
164175 struct ath10k_bmi {
165176 	bool done_sent;
166177 };
....@@ -183,6 +194,7 @@
183194 	struct wmi_cmd_map *cmd;
184195 	struct wmi_vdev_param_map *vdev_param;
185196 	struct wmi_pdev_param_map *pdev_param;
197
+	struct wmi_peer_param_map *peer_param;
186198 	const struct wmi_ops *ops;
187199 	const struct wmi_peer_flags_map *peer_flags;
188200 
....@@ -203,14 +215,14 @@
203215 	u32 peer_rssi;
204216 	u32 peer_tx_rate;
205217 	u32 peer_rx_rate; /* 10x only */
206
-	u32 rx_duration;
218
+	u64 rx_duration;
207219 };
208220 
209221 struct ath10k_fw_extd_stats_peer {
210222 	struct list_head list;
211223 
212224 	u8 peer_macaddr[ETH_ALEN];
213
-	u32 rx_duration;
225
+	u64 rx_duration;
214226 };
215227 
216228 struct ath10k_fw_stats_vdev {
....@@ -414,6 +426,14 @@
414426 
415427 	/* protected by ar->data_lock */
416428 	struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
429
+	union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
430
+	bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS];
431
+	union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
432
+	u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS];
433
+	struct {
434
+		enum htt_security_types sec_type;
435
+		int pn_len;
436
+	} rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX];
417437 };
418438 
419439 struct ath10k_txq {
....@@ -451,15 +471,48 @@
451471 };
452472 
453473 struct ath10k_sta_tid_stats {
454
-	unsigned long int rx_pkt_from_fw;
455
-	unsigned long int rx_pkt_unchained;
456
-	unsigned long int rx_pkt_drop_chained;
457
-	unsigned long int rx_pkt_drop_filter;
458
-	unsigned long int rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
459
-	unsigned long int rx_pkt_queued_for_mac;
460
-	unsigned long int rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
461
-	unsigned long int rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
474
+	unsigned long rx_pkt_from_fw;
475
+	unsigned long rx_pkt_unchained;
476
+	unsigned long rx_pkt_drop_chained;
477
+	unsigned long rx_pkt_drop_filter;
478
+	unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
479
+	unsigned long rx_pkt_queued_for_mac;
480
+	unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
481
+	unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
462482 };
483
+
484
+enum ath10k_counter_type {
485
+	ATH10K_COUNTER_TYPE_BYTES,
486
+	ATH10K_COUNTER_TYPE_PKTS,
487
+	ATH10K_COUNTER_TYPE_MAX,
488
+};
489
+
490
+enum ath10k_stats_type {
491
+	ATH10K_STATS_TYPE_SUCC,
492
+	ATH10K_STATS_TYPE_FAIL,
493
+	ATH10K_STATS_TYPE_RETRY,
494
+	ATH10K_STATS_TYPE_AMPDU,
495
+	ATH10K_STATS_TYPE_MAX,
496
+};
497
+
498
+struct ath10k_htt_data_stats {
499
+	u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM];
500
+	u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM];
501
+	u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM];
502
+	u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM];
503
+	u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM];
504
+	u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM];
505
+	u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM];
506
+};
507
+
508
+struct ath10k_htt_tx_stats {
509
+	struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX];
510
+	u64 tx_duration;
511
+	u64 ba_fails;
512
+	u64 ack_fails;
513
+};
514
+
515
+#define ATH10K_TID_MAX	8
463516 
464517 struct ath10k_sta {
465518 	struct ath10k_vif *arvif;
....@@ -471,9 +524,19 @@
471524 	u32 smps;
472525 	u16 peer_id;
473526 	struct rate_info txrate;
527
+	struct ieee80211_tx_info tx_info;
528
+	u32 tx_retries;
529
+	u32 tx_failed;
530
+	u32 last_tx_bitrate;
474531 
532
+	u32 rx_rate_code;
533
+	u32 rx_bitrate_kbps;
534
+	u32 tx_rate_code;
535
+	u32 tx_bitrate_kbps;
475536 	struct work_struct update_wk;
476537 	u64 rx_duration;
538
+	struct ath10k_htt_tx_stats *tx_stats;
539
+	u32 ucast_cipher;
477540 
478541 #ifdef CONFIG_MAC80211_DEBUGFS
479542 	/* protected by conf_mutex */
....@@ -482,9 +545,19 @@
482545 	/* Protected with ar->data_lock */
483546 	struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
484547 #endif
548
+	/* Protected with ar->data_lock */
549
+	u32 peer_ps_state;
550
+	struct work_struct tid_config_wk;
551
+	int noack[ATH10K_TID_MAX];
552
+	int retry_long[ATH10K_TID_MAX];
553
+	int ampdu[ATH10K_TID_MAX];
554
+	u8 rate_ctrl[ATH10K_TID_MAX];
555
+	u32 rate_code[ATH10K_TID_MAX];
556
+	int rtscts[ATH10K_TID_MAX];
485557 };
486558 
487
-#define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ)
559
+#define ATH10K_VDEV_SETUP_TIMEOUT_HZ	(5 * HZ)
560
+#define ATH10K_VDEV_DELETE_TIMEOUT_HZ	(5 * HZ)
488561 
489562 enum ath10k_beacon_state {
490563 	ATH10K_BEACON_SCHEDULED = 0,
....@@ -544,10 +617,23 @@
544617 	bool nohwcrypt;
545618 	int num_legacy_stations;
546619 	int txpower;
620
+	bool ftm_responder;
547621 	struct wmi_wmm_params_all_arg wmm_params;
548622 	struct work_struct ap_csa_work;
549623 	struct delayed_work connection_loss_work;
550624 	struct cfg80211_bitrate_mask bitrate_mask;
625
+
626
+	/* For setting VHT peer fixed rate, protected by conf_mutex */
627
+	int vht_num_rates;
628
+	u8 vht_pfr;
629
+	u32 tid_conf_changed[ATH10K_TID_MAX];
630
+	int noack[ATH10K_TID_MAX];
631
+	int retry_long[ATH10K_TID_MAX];
632
+	int ampdu[ATH10K_TID_MAX];
633
+	u8 rate_ctrl[ATH10K_TID_MAX];
634
+	u32 rate_code[ATH10K_TID_MAX];
635
+	int rtscts[ATH10K_TID_MAX];
636
+	u32 tids_rst;
551637 };
552638 
553639 struct ath10k_vif_iter {
....@@ -591,6 +677,7 @@
591677 	bool fw_stats_done;
592678 
593679 	unsigned long htt_stats_mask;
680
+	unsigned long reset_htt_stats;
594681 	struct delayed_work htt_stats_dwork;
595682 	struct ath10k_dfs_stats dfs_stats;
596683 	struct ath_dfs_pool_stats dfs_pool_stats;
....@@ -607,6 +694,8 @@
607694 	u32 reg_addr;
608695 	u32 nf_cal_period;
609696 	void *cal_data;
697
+	u32 enable_extd_tx_stats;
698
+	u8 fw_dbglog_mode;
610699 };
611700 
612701 enum ath10k_state {
....@@ -733,6 +822,12 @@
733822 
734823 	/* Firmware load is done externally, not by bmi */
735824 	ATH10K_FW_FEATURE_NON_BMI = 19,
825
+
826
+	/* Firmware sends only one chan_info event per channel */
827
+	ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20,
828
+
829
+	/* Firmware allows setting peer fixed rate */
830
+	ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21,
736831 
737832 	/* keep last */
738833 	ATH10K_FW_FEATURE_COUNT,
....@@ -861,6 +956,9 @@
861956 	const struct firmware *board;
862957 	const void *board_data;
863958 	size_t board_len;
959
+	const struct firmware *ext_board;
960
+	const void *ext_board_data;
961
+	size_t ext_board_len;
864962 
865963 	struct ath10k_fw_file fw_file;
866964 };
....@@ -880,16 +978,34 @@
880978 	u32	reserved2;
881979 };
882980 
981
+enum ath10k_dev_type {
982
+	ATH10K_DEV_TYPE_LL,
983
+	ATH10K_DEV_TYPE_HL,
984
+};
985
+
986
+struct ath10k_bus_params {
987
+	u32 chip_id;
988
+	enum ath10k_dev_type dev_type;
989
+	bool link_can_suspend;
990
+	bool hl_msdu_ids;
991
+};
992
+
883993 struct ath10k {
884994 	struct ath_common ath_common;
885995 	struct ieee80211_hw *hw;
886996 	struct ieee80211_ops *ops;
887997 	struct device *dev;
998
+	struct msa_region {
999
+		dma_addr_t paddr;
1000
+		u32 mem_size;
1001
+		void *vaddr;
1002
+	} msa;
8881003 	u8 mac_addr[ETH_ALEN];
8891004 
8901005 	enum ath10k_hw_rev hw_rev;
8911006 	u16 dev_id;
8921007 	u32 chip_id;
1008
+	enum ath10k_dev_type dev_type;
8931009 	u32 target_version;
8941010 	u8 fw_version_major;
8951011 	u32 fw_version_minor;
....@@ -902,13 +1018,24 @@
9021018 	u32 hw_eeprom_rd;
9031019 	u32 ht_cap_info;
9041020 	u32 vht_cap_info;
1021
+	u32 vht_supp_mcs;
9051022 	u32 num_rf_chains;
9061023 	u32 max_spatial_stream;
9071024 	/* protected by conf_mutex */
1025
+	u32 low_2ghz_chan;
1026
+	u32 high_2ghz_chan;
9081027 	u32 low_5ghz_chan;
9091028 	u32 high_5ghz_chan;
9101029 	bool ani_enabled;
1030
+	u32 sys_cap_info;
9111031 
1032
+	/* protected by data_lock */
1033
+	bool hw_rfkill_on;
1034
+
1035
+	/* protected by conf_mutex */
1036
+	u8 ps_state_enable;
1037
+
1038
+	bool nlo_enabled;
9121039 	bool p2p;
9131040 
9141041 	struct {
....@@ -917,6 +1044,7 @@
9171044 	} hif;
9181045 
9191046 	struct completion target_suspend;
1047
+	struct completion driver_recovery;
9201048 
9211049 	const struct ath10k_hw_regs *regs;
9221050 	const struct ath10k_hw_ce_regs *hw_ce_regs;
....@@ -946,8 +1074,13 @@
9461074 		u32 subsystem_device;
9471075 
9481076 		bool bmi_ids_valid;
1077
+		bool qmi_ids_valid;
1078
+		u32 qmi_board_id;
1079
+		u32 qmi_chip_id;
9491080 		u8 bmi_board_id;
1081
+		u8 bmi_eboard_id;
9501082 		u8 bmi_chip_id;
1083
+		bool ext_bid_supported;
9511084 
9521085 		char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
9531086 	} id;
....@@ -1005,20 +1138,22 @@
10051138 
10061139 	int last_wmi_vdev_start_status;
10071140 	struct completion vdev_setup_done;
1141
+	struct completion vdev_delete_done;
1142
+	struct completion peer_stats_info_complete;
10081143 
10091144 	struct workqueue_struct *workqueue;
10101145 	/* Auxiliary workqueue */
10111146 	struct workqueue_struct *workqueue_aux;
1012
-
1147
+	struct workqueue_struct *workqueue_tx_complete;
10131148 	/* prevents concurrent FW reconfiguration */
10141149 	struct mutex conf_mutex;
10151150 
1151
+	/* protects coredump data */
1152
+	struct mutex dump_mutex;
1153
+
10161154 	/* protects shared structure data */
10171155 	spinlock_t data_lock;
1018
-	/* protects: ar->txqs, artxq->list */
1019
-	spinlock_t txqs_lock;
10201156 
1021
-	struct list_head txqs;
10221157 	struct list_head arvifs;
10231158 	struct list_head peers;
10241159 	struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
....@@ -1050,6 +1185,8 @@
10501185 
10511186 	struct work_struct register_work;
10521187 	struct work_struct restart_work;
1188
+	struct work_struct bundle_tx_work;
1189
+	struct work_struct tx_complete_work;
10531190 
10541191 	/* cycle count is reported twice for each visited channel during scan.
10551192 	 * access protected by data_lock
....@@ -1101,6 +1238,7 @@
11011238 
11021239 	struct {
11031240 		/* protected by data_lock */
1241
+		u32 rx_crc_err_drop;
11041242 		u32 fw_crash_counter;
11051243 		u32 fw_warm_reset_counter;
11061244 		u32 fw_cold_reset_counter;
....@@ -1129,6 +1267,7 @@
11291267 
11301268 	u32 ampdu_reference;
11311269 
1270
+	const u8 *wmi_key_cipher;
11321271 	void *ce_priv;
11331272 
11341273 	u32 sta_tid_stats_mask;
....@@ -1137,9 +1276,14 @@
11371276 	enum ath10k_radar_confirmation_state radar_conf_state;
11381277 	struct ath10k_radar_found_info last_radar_info;
11391278 	struct work_struct radar_confirmation_work;
1279
+	struct ath10k_bus_params bus_param;
1280
+	struct completion peer_delete_done;
1281
+
1282
+	bool coex_support;
1283
+	int coex_gpio_pin;
11401284 
11411285 	/* must be last */
1142
-	u8 drv_priv[0] __aligned(sizeof(void *));
1286
+	u8 drv_priv[] __aligned(sizeof(void *));
11431287 };
11441288 
11451289 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
....@@ -1168,7 +1312,11 @@
11681312 		      const struct ath10k_fw_components *fw_components);
11691313 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
11701314 void ath10k_core_stop(struct ath10k *ar);
1171
-int ath10k_core_register(struct ath10k *ar, u32 chip_id);
1315
+int ath10k_core_register(struct ath10k *ar,
1316
+			 const struct ath10k_bus_params *bus_params);
11721317 void ath10k_core_unregister(struct ath10k *ar);
1318
+int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type);
1319
+int ath10k_core_check_dt(struct ath10k *ar);
1320
+void ath10k_core_free_board_files(struct ath10k *ar);
11731321 
11741322 #endif /* _CORE_H_ */