hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390
kernel/drivers/net/ethernet/mellanox/mlx5/core/fpga/cmd.c
....@@ -31,7 +31,6 @@
3131 */
3232
3333 #include <linux/etherdevice.h>
34
-#include <linux/mlx5/cmd.h>
3534 #include <linux/mlx5/driver.h>
3635 #include <linux/mlx5/device.h>
3736
....@@ -143,15 +142,15 @@
143142 int mlx5_fpga_create_qp(struct mlx5_core_dev *dev, void *fpga_qpc,
144143 u32 *fpga_qpn)
145144 {
146
- u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {0};
147
- u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)];
145
+ u32 out[MLX5_ST_SZ_DW(fpga_create_qp_out)] = {};
146
+ u32 in[MLX5_ST_SZ_DW(fpga_create_qp_in)] = {};
148147 int ret;
149148
150149 MLX5_SET(fpga_create_qp_in, in, opcode, MLX5_CMD_OP_FPGA_CREATE_QP);
151150 memcpy(MLX5_ADDR_OF(fpga_create_qp_in, in, fpga_qpc), fpga_qpc,
152151 MLX5_FLD_SZ_BYTES(fpga_create_qp_in, fpga_qpc));
153152
154
- ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
153
+ ret = mlx5_cmd_exec_inout(dev, fpga_create_qp, in, out);
155154 if (ret)
156155 return ret;
157156
....@@ -165,8 +164,7 @@
165164 enum mlx5_fpga_qpc_field_select fields,
166165 void *fpga_qpc)
167166 {
168
- u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {0};
169
- u32 out[MLX5_ST_SZ_DW(fpga_modify_qp_out)];
167
+ u32 in[MLX5_ST_SZ_DW(fpga_modify_qp_in)] = {};
170168
171169 MLX5_SET(fpga_modify_qp_in, in, opcode, MLX5_CMD_OP_FPGA_MODIFY_QP);
172170 MLX5_SET(fpga_modify_qp_in, in, field_select, fields);
....@@ -174,20 +172,20 @@
174172 memcpy(MLX5_ADDR_OF(fpga_modify_qp_in, in, fpga_qpc), fpga_qpc,
175173 MLX5_FLD_SZ_BYTES(fpga_modify_qp_in, fpga_qpc));
176174
177
- return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
175
+ return mlx5_cmd_exec_in(dev, fpga_modify_qp, in);
178176 }
179177
180178 int mlx5_fpga_query_qp(struct mlx5_core_dev *dev,
181179 u32 fpga_qpn, void *fpga_qpc)
182180 {
183
- u32 in[MLX5_ST_SZ_DW(fpga_query_qp_in)] = {0};
184
- u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)];
181
+ u32 out[MLX5_ST_SZ_DW(fpga_query_qp_out)] = {};
182
+ u32 in[MLX5_ST_SZ_DW(fpga_query_qp_in)] = {};
185183 int ret;
186184
187185 MLX5_SET(fpga_query_qp_in, in, opcode, MLX5_CMD_OP_FPGA_QUERY_QP);
188186 MLX5_SET(fpga_query_qp_in, in, fpga_qpn, fpga_qpn);
189187
190
- ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
188
+ ret = mlx5_cmd_exec_inout(dev, fpga_query_qp, in, out);
191189 if (ret)
192190 return ret;
193191
....@@ -198,20 +196,19 @@
198196
199197 int mlx5_fpga_destroy_qp(struct mlx5_core_dev *dev, u32 fpga_qpn)
200198 {
201
- u32 in[MLX5_ST_SZ_DW(fpga_destroy_qp_in)] = {0};
202
- u32 out[MLX5_ST_SZ_DW(fpga_destroy_qp_out)];
199
+ u32 in[MLX5_ST_SZ_DW(fpga_destroy_qp_in)] = {};
203200
204201 MLX5_SET(fpga_destroy_qp_in, in, opcode, MLX5_CMD_OP_FPGA_DESTROY_QP);
205202 MLX5_SET(fpga_destroy_qp_in, in, fpga_qpn, fpga_qpn);
206203
207
- return mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
204
+ return mlx5_cmd_exec_in(dev, fpga_destroy_qp, in);
208205 }
209206
210207 int mlx5_fpga_query_qp_counters(struct mlx5_core_dev *dev, u32 fpga_qpn,
211208 bool clear, struct mlx5_fpga_qp_counters *data)
212209 {
213
- u32 in[MLX5_ST_SZ_DW(fpga_query_qp_counters_in)] = {0};
214
- u32 out[MLX5_ST_SZ_DW(fpga_query_qp_counters_out)];
210
+ u32 out[MLX5_ST_SZ_DW(fpga_query_qp_counters_out)] = {};
211
+ u32 in[MLX5_ST_SZ_DW(fpga_query_qp_counters_in)] = {};
215212 int ret;
216213
217214 MLX5_SET(fpga_query_qp_counters_in, in, opcode,
....@@ -219,7 +216,7 @@
219216 MLX5_SET(fpga_query_qp_counters_in, in, clear, clear);
220217 MLX5_SET(fpga_query_qp_counters_in, in, fpga_qpn, fpga_qpn);
221218
222
- ret = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out));
219
+ ret = mlx5_cmd_exec_inout(dev, fpga_query_qp_counters, in, out);
223220 if (ret)
224221 return ret;
225222