forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390
kernel/drivers/net/ethernet/hisilicon/hns3/hnae3.h
....@@ -1,4 +1,4 @@
1
-// SPDX-License-Identifier: GPL-2.0+
1
+/* SPDX-License-Identifier: GPL-2.0+ */
22 // Copyright (c) 2016-2017 Hisilicon Limited.
33
44 #ifndef __HNAE3_H
....@@ -32,6 +32,15 @@
3232
3333 #define HNAE3_MOD_VERSION "1.0"
3434
35
+#define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */
36
+
37
+/* Device version */
38
+#define HNAE3_DEVICE_VERSION_V1 0x00020
39
+#define HNAE3_DEVICE_VERSION_V2 0x00021
40
+#define HNAE3_DEVICE_VERSION_V3 0x00030
41
+
42
+#define HNAE3_PCI_REVISION_BIT_SIZE 8
43
+
3544 /* Device IDs */
3645 #define HNAE3_DEV_ID_GE 0xA220
3746 #define HNAE3_DEV_ID_25GE 0xA221
....@@ -40,8 +49,9 @@
4049 #define HNAE3_DEV_ID_50GE_RDMA 0xA224
4150 #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225
4251 #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226
43
-#define HNAE3_DEV_ID_100G_VF 0xA22E
44
-#define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F
52
+#define HNAE3_DEV_ID_200G_RDMA 0xA228
53
+#define HNAE3_DEV_ID_VF 0xA22E
54
+#define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F
4555
4656 #define HNAE3_CLASS_NAME_SIZE 16
4757
....@@ -56,10 +66,72 @@
5666 BIT(HNAE3_DEV_SUPPORT_ROCE_B))
5767
5868 #define hnae3_dev_roce_supported(hdev) \
59
- hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
69
+ hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B)
6070
6171 #define hnae3_dev_dcb_supported(hdev) \
62
- hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
72
+ hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B)
73
+
74
+enum HNAE3_DEV_CAP_BITS {
75
+ HNAE3_DEV_SUPPORT_FD_B,
76
+ HNAE3_DEV_SUPPORT_GRO_B,
77
+ HNAE3_DEV_SUPPORT_FEC_B,
78
+ HNAE3_DEV_SUPPORT_UDP_GSO_B,
79
+ HNAE3_DEV_SUPPORT_QB_B,
80
+ HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B,
81
+ HNAE3_DEV_SUPPORT_PTP_B,
82
+ HNAE3_DEV_SUPPORT_INT_QL_B,
83
+ HNAE3_DEV_SUPPORT_SIMPLE_BD_B,
84
+ HNAE3_DEV_SUPPORT_TX_PUSH_B,
85
+ HNAE3_DEV_SUPPORT_PHY_IMP_B,
86
+ HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B,
87
+ HNAE3_DEV_SUPPORT_HW_PAD_B,
88
+ HNAE3_DEV_SUPPORT_STASH_B,
89
+};
90
+
91
+#define hnae3_dev_fd_supported(hdev) \
92
+ test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps)
93
+
94
+#define hnae3_dev_gro_supported(hdev) \
95
+ test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps)
96
+
97
+#define hnae3_dev_fec_supported(hdev) \
98
+ test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps)
99
+
100
+#define hnae3_dev_udp_gso_supported(hdev) \
101
+ test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps)
102
+
103
+#define hnae3_dev_qb_supported(hdev) \
104
+ test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps)
105
+
106
+#define hnae3_dev_fd_forward_tc_supported(hdev) \
107
+ test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps)
108
+
109
+#define hnae3_dev_ptp_supported(hdev) \
110
+ test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps)
111
+
112
+#define hnae3_dev_int_ql_supported(hdev) \
113
+ test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps)
114
+
115
+#define hnae3_dev_simple_bd_supported(hdev) \
116
+ test_bit(HNAE3_DEV_SUPPORT_SIMPLE_BD_B, (hdev)->ae_dev->caps)
117
+
118
+#define hnae3_dev_tx_push_supported(hdev) \
119
+ test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps)
120
+
121
+#define hnae3_dev_phy_imp_supported(hdev) \
122
+ test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps)
123
+
124
+#define hnae3_dev_tqp_txrx_indep_supported(hdev) \
125
+ test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps)
126
+
127
+#define hnae3_dev_hw_pad_supported(hdev) \
128
+ test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps)
129
+
130
+#define hnae3_dev_stash_supported(hdev) \
131
+ test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps)
132
+
133
+#define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \
134
+ test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps)
63135
64136 #define ring_ptr_move_fw(ring, p) \
65137 ((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
....@@ -67,7 +139,9 @@
67139 ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
68140
69141 enum hns_desc_type {
142
+ DESC_TYPE_UNKNOWN,
70143 DESC_TYPE_SKB,
144
+ DESC_TYPE_FRAGLIST_SKB,
71145 DESC_TYPE_PAGE,
72146 };
73147
....@@ -77,28 +151,29 @@
77151 void __iomem *io_base;
78152 struct hnae3_ae_algo *ae_algo;
79153 struct hnae3_handle *handle;
80
- int tqp_index; /* index in a handle */
81
- u32 buf_size; /* size for hnae_desc->addr, preset by AE */
82
- u16 desc_num; /* total number of desc */
154
+ int tqp_index; /* index in a handle */
155
+ u32 buf_size; /* size for hnae_desc->addr, preset by AE */
156
+ u16 tx_desc_num; /* total number of tx desc */
157
+ u16 rx_desc_num; /* total number of rx desc */
83158 };
84159
85
-/*hnae3 loop mode*/
160
+struct hns3_mac_stats {
161
+ u64 tx_pause_cnt;
162
+ u64 rx_pause_cnt;
163
+};
164
+
165
+/* hnae3 loop mode */
86166 enum hnae3_loop {
87
- HNAE3_MAC_INTER_LOOP_MAC,
88
- HNAE3_MAC_INTER_LOOP_SERDES,
89
- HNAE3_MAC_INTER_LOOP_PHY,
90
- HNAE3_MAC_LOOP_NONE,
167
+ HNAE3_LOOP_APP,
168
+ HNAE3_LOOP_SERIAL_SERDES,
169
+ HNAE3_LOOP_PARALLEL_SERDES,
170
+ HNAE3_LOOP_PHY,
171
+ HNAE3_LOOP_NONE,
91172 };
92173
93174 enum hnae3_client_type {
94175 HNAE3_CLIENT_KNIC,
95
- HNAE3_CLIENT_UNIC,
96176 HNAE3_CLIENT_ROCE,
97
-};
98
-
99
-enum hnae3_dev_type {
100
- HNAE3_DEV_KNIC,
101
- HNAE3_DEV_UNIC,
102177 };
103178
104179 /* mac media type */
....@@ -107,6 +182,25 @@
107182 HNAE3_MEDIA_TYPE_FIBER,
108183 HNAE3_MEDIA_TYPE_COPPER,
109184 HNAE3_MEDIA_TYPE_BACKPLANE,
185
+ HNAE3_MEDIA_TYPE_NONE,
186
+};
187
+
188
+/* must be consistent with definition in firmware */
189
+enum hnae3_module_type {
190
+ HNAE3_MODULE_TYPE_UNKNOWN = 0x00,
191
+ HNAE3_MODULE_TYPE_FIBRE_LR = 0x01,
192
+ HNAE3_MODULE_TYPE_FIBRE_SR = 0x02,
193
+ HNAE3_MODULE_TYPE_AOC = 0x03,
194
+ HNAE3_MODULE_TYPE_CR = 0x04,
195
+ HNAE3_MODULE_TYPE_KR = 0x05,
196
+ HNAE3_MODULE_TYPE_TP = 0x06,
197
+};
198
+
199
+enum hnae3_fec_mode {
200
+ HNAE3_FEC_AUTO = 0,
201
+ HNAE3_FEC_BASER,
202
+ HNAE3_FEC_RS,
203
+ HNAE3_FEC_USER_DEF,
110204 };
111205
112206 enum hnae3_reset_notify_type {
....@@ -116,14 +210,32 @@
116210 HNAE3_UNINIT_CLIENT,
117211 };
118212
213
+enum hnae3_hw_error_type {
214
+ HNAE3_PPU_POISON_ERROR,
215
+ HNAE3_CMDQ_ECC_ERROR,
216
+ HNAE3_IMP_RD_POISON_ERROR,
217
+ HNAE3_ROCEE_AXI_RESP_ERROR,
218
+};
219
+
119220 enum hnae3_reset_type {
120221 HNAE3_VF_RESET,
222
+ HNAE3_VF_FUNC_RESET,
223
+ HNAE3_VF_PF_FUNC_RESET,
121224 HNAE3_VF_FULL_RESET,
225
+ HNAE3_FLR_RESET,
122226 HNAE3_FUNC_RESET,
123
- HNAE3_CORE_RESET,
124227 HNAE3_GLOBAL_RESET,
125228 HNAE3_IMP_RESET,
229
+ HNAE3_UNKNOWN_RESET,
126230 HNAE3_NONE_RESET,
231
+ HNAE3_MAX_RESET,
232
+};
233
+
234
+enum hnae3_port_base_vlan_state {
235
+ HNAE3_PORT_BASE_VLAN_DISABLE,
236
+ HNAE3_PORT_BASE_VLAN_ENABLE,
237
+ HNAE3_PORT_BASE_VLAN_MODIFY,
238
+ HNAE3_PORT_BASE_VLAN_NOCHANGE,
127239 };
128240
129241 struct hnae3_vector_info {
....@@ -139,6 +251,15 @@
139251 #define HNAE3_RING_GL_RX 0
140252 #define HNAE3_RING_GL_TX 1
141253
254
+#define HNAE3_FW_VERSION_BYTE3_SHIFT 24
255
+#define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24)
256
+#define HNAE3_FW_VERSION_BYTE2_SHIFT 16
257
+#define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16)
258
+#define HNAE3_FW_VERSION_BYTE1_SHIFT 8
259
+#define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8)
260
+#define HNAE3_FW_VERSION_BYTE0_SHIFT 0
261
+#define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0)
262
+
142263 struct hnae3_ring_chain_node {
143264 struct hnae3_ring_chain_node *next;
144265 u32 tqp_index;
....@@ -149,6 +270,17 @@
149270 #define HNAE3_IS_TX_RING(node) \
150271 (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX)
151272
273
+/* device specification info from firmware */
274
+struct hnae3_dev_specs {
275
+ u32 mac_entry_num; /* number of mac-vlan table entry */
276
+ u32 mng_entry_num; /* number of manager table entry */
277
+ u32 max_tm_rate;
278
+ u16 rss_ind_tbl_size;
279
+ u16 rss_key_size;
280
+ u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */
281
+ u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */
282
+};
283
+
152284 struct hnae3_client_ops {
153285 int (*init_instance)(struct hnae3_handle *handle);
154286 void (*uninit_instance)(struct hnae3_handle *handle, bool reset);
....@@ -156,6 +288,8 @@
156288 int (*setup_tc)(struct hnae3_handle *handle, u8 tc);
157289 int (*reset_notify)(struct hnae3_handle *handle,
158290 enum hnae3_reset_notify_type type);
291
+ void (*process_hw_error)(struct hnae3_handle *handle,
292
+ enum hnae3_hw_error_type);
159293 };
160294
161295 #define HNAE3_CLIENT_NAME_LENGTH 16
....@@ -167,12 +301,16 @@
167301 struct list_head node;
168302 };
169303
304
+#define HNAE3_DEV_CAPS_MAX_NUM 96
170305 struct hnae3_ae_dev {
171306 struct pci_dev *pdev;
172307 const struct hnae3_ae_ops *ops;
173308 struct list_head node;
174309 u32 flag;
175
- enum hnae3_dev_type dev_type;
310
+ unsigned long hw_err_reset_req;
311
+ struct hnae3_dev_specs dev_specs;
312
+ u32 dev_version;
313
+ unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)];
176314 void *priv;
177315 };
178316
....@@ -190,21 +328,27 @@
190328 * Enable the hardware
191329 * stop()
192330 * Disable the hardware
331
+ * start_client()
332
+ * Inform the hclge that client has been started
333
+ * stop_client()
334
+ * Inform the hclge that client has been stopped
193335 * get_status()
194336 * Get the carrier state of the back channel of the handle, 1 for ok, 0 for
195337 * non-ok
196338 * get_ksettings_an_result()
197339 * Get negotiation status,speed and duplex
198
- * update_speed_duplex_h()
199
- * Update hardware speed and duplex
200340 * get_media_type()
201341 * Get media type of MAC
342
+ * check_port_speed()
343
+ * Check target speed whether is supported
202344 * adjust_link()
203345 * Adjust link status
204346 * set_loopback()
205347 * Set loopback
206348 * set_promisc_mode
207349 * Set promisc mode
350
+ * request_update_promisc_mode
351
+ * request to hclge(vf) to update promisc mode
208352 * set_mtu()
209353 * set mtu
210354 * get_pauseparam()
....@@ -215,6 +359,10 @@
215359 * set auto autonegotiation of pause frame use
216360 * get_autoneg()
217361 * get auto autonegotiation of pause frame use
362
+ * restart_autoneg()
363
+ * restart autonegotiation
364
+ * halt_autoneg()
365
+ * halt/resume autonegotiation when autonegotiation on
218366 * get_coalesce_usecs()
219367 * get usecs to delay a TX interrupt after a packet is sent
220368 * get_rx_max_coalesced_frames()
....@@ -239,6 +387,8 @@
239387 * Remove multicast address from mac table
240388 * update_stats()
241389 * Update Old network device statistics
390
+ * get_mac_stats()
391
+ * get mac pause statistics including tx_cnt and rx_cnt
242392 * get_ethtool_stats()
243393 * Get ethtool network device statistics
244394 * get_strings()
....@@ -285,32 +435,59 @@
285435 * Set vlan filter config of vf
286436 * enable_hw_strip_rxvtag()
287437 * Enable/disable hardware strip vlan tag of packets received
438
+ * set_gro_en
439
+ * Enable/disable HW GRO
440
+ * add_arfs_entry
441
+ * Check the 5-tuples of flow, and create flow director rule
442
+ * get_vf_config
443
+ * Get the VF configuration setting by the host
444
+ * set_vf_link_state
445
+ * Set VF link status
446
+ * set_vf_spoofchk
447
+ * Enable/disable spoof check for specified vf
448
+ * set_vf_trust
449
+ * Enable/disable trust for specified vf, if the vf being trusted, then
450
+ * it can enable promisc mode
451
+ * set_vf_rate
452
+ * Set the max tx rate of specified vf.
453
+ * set_vf_mac
454
+ * Configure the default MAC for specified VF
455
+ * get_module_eeprom
456
+ * Get the optical module eeprom info.
288457 */
289458 struct hnae3_ae_ops {
290459 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev);
291460 void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev);
292
-
461
+ void (*flr_prepare)(struct hnae3_ae_dev *ae_dev);
462
+ void (*flr_done)(struct hnae3_ae_dev *ae_dev);
293463 int (*init_client_instance)(struct hnae3_client *client,
294464 struct hnae3_ae_dev *ae_dev);
295465 void (*uninit_client_instance)(struct hnae3_client *client,
296466 struct hnae3_ae_dev *ae_dev);
297467 int (*start)(struct hnae3_handle *handle);
298468 void (*stop)(struct hnae3_handle *handle);
469
+ int (*client_start)(struct hnae3_handle *handle);
470
+ void (*client_stop)(struct hnae3_handle *handle);
299471 int (*get_status)(struct hnae3_handle *handle);
300472 void (*get_ksettings_an_result)(struct hnae3_handle *handle,
301473 u8 *auto_neg, u32 *speed, u8 *duplex);
302474
303
- int (*update_speed_duplex_h)(struct hnae3_handle *handle);
304475 int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed,
305476 u8 duplex);
306477
307
- void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type);
478
+ void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type,
479
+ u8 *module_type);
480
+ int (*check_port_speed)(struct hnae3_handle *handle, u32 speed);
481
+ void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability,
482
+ u8 *fec_mode);
483
+ int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode);
308484 void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex);
309485 int (*set_loopback)(struct hnae3_handle *handle,
310486 enum hnae3_loop loop_mode, bool en);
311487
312
- void (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
313
- bool en_mc_pmc);
488
+ int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc,
489
+ bool en_mc_pmc);
490
+ void (*request_update_promisc_mode)(struct hnae3_handle *handle);
314491 int (*set_mtu)(struct hnae3_handle *handle, int new_mtu);
315492
316493 void (*get_pauseparam)(struct hnae3_handle *handle,
....@@ -320,6 +497,8 @@
320497
321498 int (*set_autoneg)(struct hnae3_handle *handle, bool enable);
322499 int (*get_autoneg)(struct hnae3_handle *handle);
500
+ int (*restart_autoneg)(struct hnae3_handle *handle);
501
+ int (*halt_autoneg)(struct hnae3_handle *handle, bool halt);
323502
324503 void (*get_coalesce_usecs)(struct hnae3_handle *handle,
325504 u32 *tx_usecs, u32 *rx_usecs);
....@@ -337,6 +516,8 @@
337516 void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p);
338517 int (*set_mac_addr)(struct hnae3_handle *handle, void *p,
339518 bool is_first);
519
+ int (*do_ioctl)(struct hnae3_handle *handle,
520
+ struct ifreq *ifr, int cmd);
340521 int (*add_uc_addr)(struct hnae3_handle *handle,
341522 const unsigned char *addr);
342523 int (*rm_uc_addr)(struct hnae3_handle *handle,
....@@ -346,13 +527,12 @@
346527 const unsigned char *addr);
347528 int (*rm_mc_addr)(struct hnae3_handle *handle,
348529 const unsigned char *addr);
349
- int (*update_mta_status)(struct hnae3_handle *handle);
350
-
351530 void (*set_tso_stats)(struct hnae3_handle *handle, int enable);
352531 void (*update_stats)(struct hnae3_handle *handle,
353532 struct net_device_stats *net_stats);
354533 void (*get_stats)(struct hnae3_handle *handle, u64 *data);
355
-
534
+ void (*get_mac_stats)(struct hnae3_handle *handle,
535
+ struct hns3_mac_stats *mac_stats);
356536 void (*get_strings)(struct hnae3_handle *handle,
357537 u32 stringset, u8 *data);
358538 int (*get_sset_count)(struct hnae3_handle *handle, int stringset);
....@@ -384,7 +564,7 @@
384564 int vector_num,
385565 struct hnae3_ring_chain_node *vr_chain);
386566
387
- void (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
567
+ int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id);
388568 u32 (*get_fw_version)(struct hnae3_handle *handle);
389569 void (*get_mdix_mode)(struct hnae3_handle *handle,
390570 u8 *tp_mdix_ctrl, u8 *tp_mdix);
....@@ -395,12 +575,17 @@
395575 int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid,
396576 u16 vlan, u8 qos, __be16 proto);
397577 int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable);
398
- void (*reset_event)(struct hnae3_handle *handle);
578
+ void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle);
579
+ enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev,
580
+ unsigned long *addr);
581
+ void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev,
582
+ enum hnae3_reset_type rst_type);
399583 void (*get_channels)(struct hnae3_handle *handle,
400584 struct ethtool_channels *ch);
401585 void (*get_tqps_and_rss_info)(struct hnae3_handle *h,
402
- u16 *free_tqps, u16 *max_rss_size);
403
- int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num);
586
+ u16 *alloc_tqps, u16 *max_rss_size);
587
+ int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num,
588
+ bool rxfh_configured);
404589 void (*get_flowctrl_adv)(struct hnae3_handle *handle,
405590 u32 *flowctrl_adv);
406591 int (*set_led_id)(struct hnae3_handle *handle,
....@@ -408,7 +593,44 @@
408593 void (*get_link_mode)(struct hnae3_handle *handle,
409594 unsigned long *supported,
410595 unsigned long *advertising);
411
- void (*get_port_type)(struct hnae3_handle *handle, u8 *port_type);
596
+ int (*add_fd_entry)(struct hnae3_handle *handle,
597
+ struct ethtool_rxnfc *cmd);
598
+ int (*del_fd_entry)(struct hnae3_handle *handle,
599
+ struct ethtool_rxnfc *cmd);
600
+ void (*del_all_fd_entries)(struct hnae3_handle *handle,
601
+ bool clear_list);
602
+ int (*get_fd_rule_cnt)(struct hnae3_handle *handle,
603
+ struct ethtool_rxnfc *cmd);
604
+ int (*get_fd_rule_info)(struct hnae3_handle *handle,
605
+ struct ethtool_rxnfc *cmd);
606
+ int (*get_fd_all_rules)(struct hnae3_handle *handle,
607
+ struct ethtool_rxnfc *cmd, u32 *rule_locs);
608
+ void (*enable_fd)(struct hnae3_handle *handle, bool enable);
609
+ int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id,
610
+ u16 flow_id, struct flow_keys *fkeys);
611
+ int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf);
612
+ pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev);
613
+ bool (*get_hw_reset_stat)(struct hnae3_handle *handle);
614
+ bool (*ae_dev_resetting)(struct hnae3_handle *handle);
615
+ unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle);
616
+ int (*set_gro_en)(struct hnae3_handle *handle, bool enable);
617
+ u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id);
618
+ void (*set_timer_task)(struct hnae3_handle *handle, bool enable);
619
+ int (*mac_connect_phy)(struct hnae3_handle *handle);
620
+ void (*mac_disconnect_phy)(struct hnae3_handle *handle);
621
+ int (*get_vf_config)(struct hnae3_handle *handle, int vf,
622
+ struct ifla_vf_info *ivf);
623
+ int (*set_vf_link_state)(struct hnae3_handle *handle, int vf,
624
+ int link_state);
625
+ int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf,
626
+ bool enable);
627
+ int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable);
628
+ int (*set_vf_rate)(struct hnae3_handle *handle, int vf,
629
+ int min_tx_rate, int max_tx_rate, bool force);
630
+ int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p);
631
+ int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset,
632
+ u32 len, u8 *data);
633
+ bool (*get_cmdq_stat)(struct hnae3_handle *handle);
412634 };
413635
414636 struct hnae3_dcb_ops {
....@@ -422,7 +644,6 @@
422644 u8 (*getdcbx)(struct hnae3_handle *);
423645 u8 (*setdcbx)(struct hnae3_handle *, u8);
424646
425
- int (*map_update)(struct hnae3_handle *);
426647 int (*setup_tc)(struct hnae3_handle *, u8, u8 *);
427648 };
428649
....@@ -432,7 +653,7 @@
432653 const struct pci_device_id *pdev_id_table;
433654 };
434655
435
-#define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16)
656
+#define HNAE3_INT_NAME_LEN 32
436657 #define HNAE3_ITR_COUNTDOWN_START 100
437658
438659 struct hnae3_tc_info {
....@@ -447,8 +668,10 @@
447668 struct hnae3_knic_private_info {
448669 struct net_device *netdev; /* Set by KNIC client when init instance */
449670 u16 rss_size; /* Allocated RSS queues */
671
+ u16 req_rss_size;
450672 u16 rx_buf_len;
451
- u16 num_desc;
673
+ u16 num_tx_desc;
674
+ u16 num_rx_desc;
452675
453676 u8 num_tc; /* Total number of enabled TCs */
454677 u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */
....@@ -459,6 +682,7 @@
459682 const struct hnae3_dcb_ops *dcb_ops;
460683
461684 u16 int_rl_setting;
685
+ enum pkt_hash_types rss_type;
462686 };
463687
464688 struct hnae3_roce_private_info {
....@@ -466,39 +690,53 @@
466690 void __iomem *roce_io_base;
467691 int base_vector;
468692 int num_vectors;
693
+
694
+ /* The below attributes defined for RoCE client, hnae3 gives
695
+ * initial values to them, and RoCE client can modify and use
696
+ * them.
697
+ */
698
+ unsigned long reset_state;
699
+ unsigned long instance_state;
700
+ unsigned long state;
469701 };
470702
471
-struct hnae3_unic_private_info {
472
- struct net_device *netdev;
473
- u16 rx_buf_len;
474
- u16 num_desc;
475
- u16 num_tqps; /* total number of tqps in this handle */
476
- struct hnae3_queue **tqp; /* array base of all TQPs of this instance */
477
-};
478
-
479
-#define HNAE3_SUPPORT_MAC_LOOPBACK BIT(0)
703
+#define HNAE3_SUPPORT_APP_LOOPBACK BIT(0)
480704 #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1)
481
-#define HNAE3_SUPPORT_SERDES_LOOPBACK BIT(2)
705
+#define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2)
482706 #define HNAE3_SUPPORT_VF BIT(3)
707
+#define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4)
708
+
709
+#define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */
710
+#define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */
711
+#define HNAE3_BPE BIT(2) /* broadcast promisc enable */
712
+#define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */
713
+#define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */
714
+#define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */
715
+#define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE)
716
+#define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE)
483717
484718 struct hnae3_handle {
485719 struct hnae3_client *client;
486720 struct pci_dev *pdev;
487721 void *priv;
488722 struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */
489
- u64 flags; /* Indicate the capabilities for this handle*/
490
-
491
- unsigned long last_reset_time;
492
- enum hnae3_reset_type reset_level;
723
+ u64 flags; /* Indicate the capabilities for this handle */
493724
494725 union {
495726 struct net_device *netdev; /* first member */
496727 struct hnae3_knic_private_info kinfo;
497
- struct hnae3_unic_private_info uinfo;
498728 struct hnae3_roce_private_info rinfo;
499729 };
500730
501731 u32 numa_node_mask; /* for multi-chip support */
732
+
733
+ enum hnae3_port_base_vlan_state port_base_vlan_state;
734
+
735
+ u8 netdev_flags;
736
+ struct dentry *hnae3_dbgfs;
737
+
738
+ /* Network interface message level enabled bits */
739
+ u32 msg_enable;
502740 };
503741
504742 #define hnae3_set_field(origin, mask, shift, val) \
....@@ -524,5 +762,6 @@
524762 int hnae3_register_client(struct hnae3_client *client);
525763
526764 void hnae3_set_client_init_flag(struct hnae3_client *client,
527
- struct hnae3_ae_dev *ae_dev, int inited);
765
+ struct hnae3_ae_dev *ae_dev,
766
+ unsigned int inited);
528767 #endif