.. | .. |
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1 | | -// SPDX-License-Identifier: GPL-2.0+ |
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| 1 | +/* SPDX-License-Identifier: GPL-2.0+ */ |
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2 | 2 | // Copyright (c) 2016-2017 Hisilicon Limited. |
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3 | 3 | |
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4 | 4 | #ifndef __HNAE3_H |
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.. | .. |
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32 | 32 | |
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33 | 33 | #define HNAE3_MOD_VERSION "1.0" |
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34 | 34 | |
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| 35 | +#define HNAE3_MIN_VECTOR_NUM 2 /* first one for misc, another for IO */ |
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| 36 | + |
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| 37 | +/* Device version */ |
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| 38 | +#define HNAE3_DEVICE_VERSION_V1 0x00020 |
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| 39 | +#define HNAE3_DEVICE_VERSION_V2 0x00021 |
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| 40 | +#define HNAE3_DEVICE_VERSION_V3 0x00030 |
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| 41 | + |
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| 42 | +#define HNAE3_PCI_REVISION_BIT_SIZE 8 |
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| 43 | + |
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35 | 44 | /* Device IDs */ |
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36 | 45 | #define HNAE3_DEV_ID_GE 0xA220 |
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37 | 46 | #define HNAE3_DEV_ID_25GE 0xA221 |
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.. | .. |
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40 | 49 | #define HNAE3_DEV_ID_50GE_RDMA 0xA224 |
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41 | 50 | #define HNAE3_DEV_ID_50GE_RDMA_MACSEC 0xA225 |
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42 | 51 | #define HNAE3_DEV_ID_100G_RDMA_MACSEC 0xA226 |
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43 | | -#define HNAE3_DEV_ID_100G_VF 0xA22E |
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44 | | -#define HNAE3_DEV_ID_100G_RDMA_DCB_PFC_VF 0xA22F |
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| 52 | +#define HNAE3_DEV_ID_200G_RDMA 0xA228 |
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| 53 | +#define HNAE3_DEV_ID_VF 0xA22E |
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| 54 | +#define HNAE3_DEV_ID_RDMA_DCB_PFC_VF 0xA22F |
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45 | 55 | |
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46 | 56 | #define HNAE3_CLASS_NAME_SIZE 16 |
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47 | 57 | |
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.. | .. |
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56 | 66 | BIT(HNAE3_DEV_SUPPORT_ROCE_B)) |
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57 | 67 | |
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58 | 68 | #define hnae3_dev_roce_supported(hdev) \ |
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59 | | - hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) |
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| 69 | + hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_ROCE_B) |
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60 | 70 | |
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61 | 71 | #define hnae3_dev_dcb_supported(hdev) \ |
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62 | | - hnae3_get_bit(hdev->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) |
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| 72 | + hnae3_get_bit((hdev)->ae_dev->flag, HNAE3_DEV_SUPPORT_DCB_B) |
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| 73 | + |
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| 74 | +enum HNAE3_DEV_CAP_BITS { |
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| 75 | + HNAE3_DEV_SUPPORT_FD_B, |
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| 76 | + HNAE3_DEV_SUPPORT_GRO_B, |
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| 77 | + HNAE3_DEV_SUPPORT_FEC_B, |
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| 78 | + HNAE3_DEV_SUPPORT_UDP_GSO_B, |
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| 79 | + HNAE3_DEV_SUPPORT_QB_B, |
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| 80 | + HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, |
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| 81 | + HNAE3_DEV_SUPPORT_PTP_B, |
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| 82 | + HNAE3_DEV_SUPPORT_INT_QL_B, |
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| 83 | + HNAE3_DEV_SUPPORT_SIMPLE_BD_B, |
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| 84 | + HNAE3_DEV_SUPPORT_TX_PUSH_B, |
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| 85 | + HNAE3_DEV_SUPPORT_PHY_IMP_B, |
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| 86 | + HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, |
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| 87 | + HNAE3_DEV_SUPPORT_HW_PAD_B, |
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| 88 | + HNAE3_DEV_SUPPORT_STASH_B, |
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| 89 | +}; |
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| 90 | + |
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| 91 | +#define hnae3_dev_fd_supported(hdev) \ |
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| 92 | + test_bit(HNAE3_DEV_SUPPORT_FD_B, (hdev)->ae_dev->caps) |
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| 93 | + |
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| 94 | +#define hnae3_dev_gro_supported(hdev) \ |
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| 95 | + test_bit(HNAE3_DEV_SUPPORT_GRO_B, (hdev)->ae_dev->caps) |
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| 96 | + |
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| 97 | +#define hnae3_dev_fec_supported(hdev) \ |
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| 98 | + test_bit(HNAE3_DEV_SUPPORT_FEC_B, (hdev)->ae_dev->caps) |
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| 99 | + |
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| 100 | +#define hnae3_dev_udp_gso_supported(hdev) \ |
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| 101 | + test_bit(HNAE3_DEV_SUPPORT_UDP_GSO_B, (hdev)->ae_dev->caps) |
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| 102 | + |
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| 103 | +#define hnae3_dev_qb_supported(hdev) \ |
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| 104 | + test_bit(HNAE3_DEV_SUPPORT_QB_B, (hdev)->ae_dev->caps) |
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| 105 | + |
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| 106 | +#define hnae3_dev_fd_forward_tc_supported(hdev) \ |
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| 107 | + test_bit(HNAE3_DEV_SUPPORT_FD_FORWARD_TC_B, (hdev)->ae_dev->caps) |
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| 108 | + |
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| 109 | +#define hnae3_dev_ptp_supported(hdev) \ |
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| 110 | + test_bit(HNAE3_DEV_SUPPORT_PTP_B, (hdev)->ae_dev->caps) |
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| 111 | + |
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| 112 | +#define hnae3_dev_int_ql_supported(hdev) \ |
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| 113 | + test_bit(HNAE3_DEV_SUPPORT_INT_QL_B, (hdev)->ae_dev->caps) |
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| 114 | + |
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| 115 | +#define hnae3_dev_simple_bd_supported(hdev) \ |
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| 116 | + test_bit(HNAE3_DEV_SUPPORT_SIMPLE_BD_B, (hdev)->ae_dev->caps) |
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| 117 | + |
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| 118 | +#define hnae3_dev_tx_push_supported(hdev) \ |
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| 119 | + test_bit(HNAE3_DEV_SUPPORT_TX_PUSH_B, (hdev)->ae_dev->caps) |
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| 120 | + |
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| 121 | +#define hnae3_dev_phy_imp_supported(hdev) \ |
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| 122 | + test_bit(HNAE3_DEV_SUPPORT_PHY_IMP_B, (hdev)->ae_dev->caps) |
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| 123 | + |
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| 124 | +#define hnae3_dev_tqp_txrx_indep_supported(hdev) \ |
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| 125 | + test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (hdev)->ae_dev->caps) |
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| 126 | + |
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| 127 | +#define hnae3_dev_hw_pad_supported(hdev) \ |
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| 128 | + test_bit(HNAE3_DEV_SUPPORT_HW_PAD_B, (hdev)->ae_dev->caps) |
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| 129 | + |
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| 130 | +#define hnae3_dev_stash_supported(hdev) \ |
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| 131 | + test_bit(HNAE3_DEV_SUPPORT_STASH_B, (hdev)->ae_dev->caps) |
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| 132 | + |
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| 133 | +#define hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev) \ |
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| 134 | + test_bit(HNAE3_DEV_SUPPORT_TQP_TXRX_INDEP_B, (ae_dev)->caps) |
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63 | 135 | |
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64 | 136 | #define ring_ptr_move_fw(ring, p) \ |
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65 | 137 | ((ring)->p = ((ring)->p + 1) % (ring)->desc_num) |
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.. | .. |
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67 | 139 | ((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num) |
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68 | 140 | |
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69 | 141 | enum hns_desc_type { |
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| 142 | + DESC_TYPE_UNKNOWN, |
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70 | 143 | DESC_TYPE_SKB, |
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| 144 | + DESC_TYPE_FRAGLIST_SKB, |
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71 | 145 | DESC_TYPE_PAGE, |
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72 | 146 | }; |
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73 | 147 | |
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.. | .. |
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77 | 151 | void __iomem *io_base; |
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78 | 152 | struct hnae3_ae_algo *ae_algo; |
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79 | 153 | struct hnae3_handle *handle; |
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80 | | - int tqp_index; /* index in a handle */ |
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81 | | - u32 buf_size; /* size for hnae_desc->addr, preset by AE */ |
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82 | | - u16 desc_num; /* total number of desc */ |
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| 154 | + int tqp_index; /* index in a handle */ |
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| 155 | + u32 buf_size; /* size for hnae_desc->addr, preset by AE */ |
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| 156 | + u16 tx_desc_num; /* total number of tx desc */ |
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| 157 | + u16 rx_desc_num; /* total number of rx desc */ |
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83 | 158 | }; |
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84 | 159 | |
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85 | | -/*hnae3 loop mode*/ |
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| 160 | +struct hns3_mac_stats { |
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| 161 | + u64 tx_pause_cnt; |
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| 162 | + u64 rx_pause_cnt; |
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| 163 | +}; |
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| 164 | + |
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| 165 | +/* hnae3 loop mode */ |
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86 | 166 | enum hnae3_loop { |
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87 | | - HNAE3_MAC_INTER_LOOP_MAC, |
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88 | | - HNAE3_MAC_INTER_LOOP_SERDES, |
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89 | | - HNAE3_MAC_INTER_LOOP_PHY, |
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90 | | - HNAE3_MAC_LOOP_NONE, |
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| 167 | + HNAE3_LOOP_APP, |
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| 168 | + HNAE3_LOOP_SERIAL_SERDES, |
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| 169 | + HNAE3_LOOP_PARALLEL_SERDES, |
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| 170 | + HNAE3_LOOP_PHY, |
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| 171 | + HNAE3_LOOP_NONE, |
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91 | 172 | }; |
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92 | 173 | |
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93 | 174 | enum hnae3_client_type { |
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94 | 175 | HNAE3_CLIENT_KNIC, |
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95 | | - HNAE3_CLIENT_UNIC, |
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96 | 176 | HNAE3_CLIENT_ROCE, |
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97 | | -}; |
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98 | | - |
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99 | | -enum hnae3_dev_type { |
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100 | | - HNAE3_DEV_KNIC, |
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101 | | - HNAE3_DEV_UNIC, |
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102 | 177 | }; |
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103 | 178 | |
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104 | 179 | /* mac media type */ |
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.. | .. |
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107 | 182 | HNAE3_MEDIA_TYPE_FIBER, |
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108 | 183 | HNAE3_MEDIA_TYPE_COPPER, |
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109 | 184 | HNAE3_MEDIA_TYPE_BACKPLANE, |
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| 185 | + HNAE3_MEDIA_TYPE_NONE, |
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| 186 | +}; |
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| 187 | + |
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| 188 | +/* must be consistent with definition in firmware */ |
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| 189 | +enum hnae3_module_type { |
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| 190 | + HNAE3_MODULE_TYPE_UNKNOWN = 0x00, |
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| 191 | + HNAE3_MODULE_TYPE_FIBRE_LR = 0x01, |
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| 192 | + HNAE3_MODULE_TYPE_FIBRE_SR = 0x02, |
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| 193 | + HNAE3_MODULE_TYPE_AOC = 0x03, |
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| 194 | + HNAE3_MODULE_TYPE_CR = 0x04, |
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| 195 | + HNAE3_MODULE_TYPE_KR = 0x05, |
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| 196 | + HNAE3_MODULE_TYPE_TP = 0x06, |
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| 197 | +}; |
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| 198 | + |
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| 199 | +enum hnae3_fec_mode { |
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| 200 | + HNAE3_FEC_AUTO = 0, |
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| 201 | + HNAE3_FEC_BASER, |
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| 202 | + HNAE3_FEC_RS, |
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| 203 | + HNAE3_FEC_USER_DEF, |
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110 | 204 | }; |
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111 | 205 | |
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112 | 206 | enum hnae3_reset_notify_type { |
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116 | 210 | HNAE3_UNINIT_CLIENT, |
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117 | 211 | }; |
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118 | 212 | |
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| 213 | +enum hnae3_hw_error_type { |
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| 214 | + HNAE3_PPU_POISON_ERROR, |
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| 215 | + HNAE3_CMDQ_ECC_ERROR, |
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| 216 | + HNAE3_IMP_RD_POISON_ERROR, |
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| 217 | + HNAE3_ROCEE_AXI_RESP_ERROR, |
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| 218 | +}; |
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| 219 | + |
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119 | 220 | enum hnae3_reset_type { |
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120 | 221 | HNAE3_VF_RESET, |
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| 222 | + HNAE3_VF_FUNC_RESET, |
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| 223 | + HNAE3_VF_PF_FUNC_RESET, |
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121 | 224 | HNAE3_VF_FULL_RESET, |
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| 225 | + HNAE3_FLR_RESET, |
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122 | 226 | HNAE3_FUNC_RESET, |
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123 | | - HNAE3_CORE_RESET, |
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124 | 227 | HNAE3_GLOBAL_RESET, |
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125 | 228 | HNAE3_IMP_RESET, |
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| 229 | + HNAE3_UNKNOWN_RESET, |
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126 | 230 | HNAE3_NONE_RESET, |
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| 231 | + HNAE3_MAX_RESET, |
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| 232 | +}; |
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| 233 | + |
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| 234 | +enum hnae3_port_base_vlan_state { |
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| 235 | + HNAE3_PORT_BASE_VLAN_DISABLE, |
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| 236 | + HNAE3_PORT_BASE_VLAN_ENABLE, |
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| 237 | + HNAE3_PORT_BASE_VLAN_MODIFY, |
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| 238 | + HNAE3_PORT_BASE_VLAN_NOCHANGE, |
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127 | 239 | }; |
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128 | 240 | |
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129 | 241 | struct hnae3_vector_info { |
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139 | 251 | #define HNAE3_RING_GL_RX 0 |
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140 | 252 | #define HNAE3_RING_GL_TX 1 |
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141 | 253 | |
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| 254 | +#define HNAE3_FW_VERSION_BYTE3_SHIFT 24 |
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| 255 | +#define HNAE3_FW_VERSION_BYTE3_MASK GENMASK(31, 24) |
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| 256 | +#define HNAE3_FW_VERSION_BYTE2_SHIFT 16 |
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| 257 | +#define HNAE3_FW_VERSION_BYTE2_MASK GENMASK(23, 16) |
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| 258 | +#define HNAE3_FW_VERSION_BYTE1_SHIFT 8 |
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| 259 | +#define HNAE3_FW_VERSION_BYTE1_MASK GENMASK(15, 8) |
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| 260 | +#define HNAE3_FW_VERSION_BYTE0_SHIFT 0 |
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| 261 | +#define HNAE3_FW_VERSION_BYTE0_MASK GENMASK(7, 0) |
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| 262 | + |
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142 | 263 | struct hnae3_ring_chain_node { |
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143 | 264 | struct hnae3_ring_chain_node *next; |
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144 | 265 | u32 tqp_index; |
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.. | .. |
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149 | 270 | #define HNAE3_IS_TX_RING(node) \ |
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150 | 271 | (((node)->flag & (1 << HNAE3_RING_TYPE_B)) == HNAE3_RING_TYPE_TX) |
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151 | 272 | |
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| 273 | +/* device specification info from firmware */ |
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| 274 | +struct hnae3_dev_specs { |
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| 275 | + u32 mac_entry_num; /* number of mac-vlan table entry */ |
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| 276 | + u32 mng_entry_num; /* number of manager table entry */ |
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| 277 | + u32 max_tm_rate; |
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| 278 | + u16 rss_ind_tbl_size; |
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| 279 | + u16 rss_key_size; |
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| 280 | + u16 int_ql_max; /* max value of interrupt coalesce based on INT_QL */ |
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| 281 | + u8 max_non_tso_bd_num; /* max BD number of one non-TSO packet */ |
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| 282 | +}; |
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| 283 | + |
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152 | 284 | struct hnae3_client_ops { |
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153 | 285 | int (*init_instance)(struct hnae3_handle *handle); |
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154 | 286 | void (*uninit_instance)(struct hnae3_handle *handle, bool reset); |
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.. | .. |
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156 | 288 | int (*setup_tc)(struct hnae3_handle *handle, u8 tc); |
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157 | 289 | int (*reset_notify)(struct hnae3_handle *handle, |
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158 | 290 | enum hnae3_reset_notify_type type); |
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| 291 | + void (*process_hw_error)(struct hnae3_handle *handle, |
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| 292 | + enum hnae3_hw_error_type); |
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159 | 293 | }; |
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160 | 294 | |
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161 | 295 | #define HNAE3_CLIENT_NAME_LENGTH 16 |
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.. | .. |
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167 | 301 | struct list_head node; |
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168 | 302 | }; |
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169 | 303 | |
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| 304 | +#define HNAE3_DEV_CAPS_MAX_NUM 96 |
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170 | 305 | struct hnae3_ae_dev { |
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171 | 306 | struct pci_dev *pdev; |
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172 | 307 | const struct hnae3_ae_ops *ops; |
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173 | 308 | struct list_head node; |
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174 | 309 | u32 flag; |
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175 | | - enum hnae3_dev_type dev_type; |
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| 310 | + unsigned long hw_err_reset_req; |
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| 311 | + struct hnae3_dev_specs dev_specs; |
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| 312 | + u32 dev_version; |
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| 313 | + unsigned long caps[BITS_TO_LONGS(HNAE3_DEV_CAPS_MAX_NUM)]; |
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176 | 314 | void *priv; |
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177 | 315 | }; |
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178 | 316 | |
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.. | .. |
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190 | 328 | * Enable the hardware |
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191 | 329 | * stop() |
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192 | 330 | * Disable the hardware |
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| 331 | + * start_client() |
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| 332 | + * Inform the hclge that client has been started |
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| 333 | + * stop_client() |
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| 334 | + * Inform the hclge that client has been stopped |
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193 | 335 | * get_status() |
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194 | 336 | * Get the carrier state of the back channel of the handle, 1 for ok, 0 for |
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195 | 337 | * non-ok |
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196 | 338 | * get_ksettings_an_result() |
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197 | 339 | * Get negotiation status,speed and duplex |
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198 | | - * update_speed_duplex_h() |
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199 | | - * Update hardware speed and duplex |
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200 | 340 | * get_media_type() |
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201 | 341 | * Get media type of MAC |
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| 342 | + * check_port_speed() |
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| 343 | + * Check target speed whether is supported |
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202 | 344 | * adjust_link() |
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203 | 345 | * Adjust link status |
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204 | 346 | * set_loopback() |
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205 | 347 | * Set loopback |
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206 | 348 | * set_promisc_mode |
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207 | 349 | * Set promisc mode |
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| 350 | + * request_update_promisc_mode |
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| 351 | + * request to hclge(vf) to update promisc mode |
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208 | 352 | * set_mtu() |
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209 | 353 | * set mtu |
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210 | 354 | * get_pauseparam() |
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.. | .. |
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215 | 359 | * set auto autonegotiation of pause frame use |
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216 | 360 | * get_autoneg() |
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217 | 361 | * get auto autonegotiation of pause frame use |
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| 362 | + * restart_autoneg() |
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| 363 | + * restart autonegotiation |
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| 364 | + * halt_autoneg() |
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| 365 | + * halt/resume autonegotiation when autonegotiation on |
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218 | 366 | * get_coalesce_usecs() |
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219 | 367 | * get usecs to delay a TX interrupt after a packet is sent |
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220 | 368 | * get_rx_max_coalesced_frames() |
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.. | .. |
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239 | 387 | * Remove multicast address from mac table |
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240 | 388 | * update_stats() |
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241 | 389 | * Update Old network device statistics |
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| 390 | + * get_mac_stats() |
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| 391 | + * get mac pause statistics including tx_cnt and rx_cnt |
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242 | 392 | * get_ethtool_stats() |
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243 | 393 | * Get ethtool network device statistics |
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244 | 394 | * get_strings() |
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.. | .. |
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285 | 435 | * Set vlan filter config of vf |
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286 | 436 | * enable_hw_strip_rxvtag() |
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287 | 437 | * Enable/disable hardware strip vlan tag of packets received |
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| 438 | + * set_gro_en |
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| 439 | + * Enable/disable HW GRO |
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| 440 | + * add_arfs_entry |
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| 441 | + * Check the 5-tuples of flow, and create flow director rule |
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| 442 | + * get_vf_config |
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| 443 | + * Get the VF configuration setting by the host |
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| 444 | + * set_vf_link_state |
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| 445 | + * Set VF link status |
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| 446 | + * set_vf_spoofchk |
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| 447 | + * Enable/disable spoof check for specified vf |
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| 448 | + * set_vf_trust |
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| 449 | + * Enable/disable trust for specified vf, if the vf being trusted, then |
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| 450 | + * it can enable promisc mode |
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| 451 | + * set_vf_rate |
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| 452 | + * Set the max tx rate of specified vf. |
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| 453 | + * set_vf_mac |
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| 454 | + * Configure the default MAC for specified VF |
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| 455 | + * get_module_eeprom |
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| 456 | + * Get the optical module eeprom info. |
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288 | 457 | */ |
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289 | 458 | struct hnae3_ae_ops { |
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290 | 459 | int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); |
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291 | 460 | void (*uninit_ae_dev)(struct hnae3_ae_dev *ae_dev); |
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292 | | - |
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| 461 | + void (*flr_prepare)(struct hnae3_ae_dev *ae_dev); |
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| 462 | + void (*flr_done)(struct hnae3_ae_dev *ae_dev); |
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293 | 463 | int (*init_client_instance)(struct hnae3_client *client, |
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294 | 464 | struct hnae3_ae_dev *ae_dev); |
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295 | 465 | void (*uninit_client_instance)(struct hnae3_client *client, |
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296 | 466 | struct hnae3_ae_dev *ae_dev); |
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297 | 467 | int (*start)(struct hnae3_handle *handle); |
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298 | 468 | void (*stop)(struct hnae3_handle *handle); |
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| 469 | + int (*client_start)(struct hnae3_handle *handle); |
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| 470 | + void (*client_stop)(struct hnae3_handle *handle); |
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299 | 471 | int (*get_status)(struct hnae3_handle *handle); |
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300 | 472 | void (*get_ksettings_an_result)(struct hnae3_handle *handle, |
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301 | 473 | u8 *auto_neg, u32 *speed, u8 *duplex); |
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302 | 474 | |
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303 | | - int (*update_speed_duplex_h)(struct hnae3_handle *handle); |
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304 | 475 | int (*cfg_mac_speed_dup_h)(struct hnae3_handle *handle, int speed, |
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305 | 476 | u8 duplex); |
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306 | 477 | |
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307 | | - void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type); |
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| 478 | + void (*get_media_type)(struct hnae3_handle *handle, u8 *media_type, |
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| 479 | + u8 *module_type); |
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| 480 | + int (*check_port_speed)(struct hnae3_handle *handle, u32 speed); |
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| 481 | + void (*get_fec)(struct hnae3_handle *handle, u8 *fec_ability, |
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| 482 | + u8 *fec_mode); |
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| 483 | + int (*set_fec)(struct hnae3_handle *handle, u32 fec_mode); |
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308 | 484 | void (*adjust_link)(struct hnae3_handle *handle, int speed, int duplex); |
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309 | 485 | int (*set_loopback)(struct hnae3_handle *handle, |
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310 | 486 | enum hnae3_loop loop_mode, bool en); |
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311 | 487 | |
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312 | | - void (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc, |
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313 | | - bool en_mc_pmc); |
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| 488 | + int (*set_promisc_mode)(struct hnae3_handle *handle, bool en_uc_pmc, |
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| 489 | + bool en_mc_pmc); |
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| 490 | + void (*request_update_promisc_mode)(struct hnae3_handle *handle); |
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314 | 491 | int (*set_mtu)(struct hnae3_handle *handle, int new_mtu); |
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315 | 492 | |
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316 | 493 | void (*get_pauseparam)(struct hnae3_handle *handle, |
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.. | .. |
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320 | 497 | |
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321 | 498 | int (*set_autoneg)(struct hnae3_handle *handle, bool enable); |
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322 | 499 | int (*get_autoneg)(struct hnae3_handle *handle); |
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| 500 | + int (*restart_autoneg)(struct hnae3_handle *handle); |
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| 501 | + int (*halt_autoneg)(struct hnae3_handle *handle, bool halt); |
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323 | 502 | |
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324 | 503 | void (*get_coalesce_usecs)(struct hnae3_handle *handle, |
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325 | 504 | u32 *tx_usecs, u32 *rx_usecs); |
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.. | .. |
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337 | 516 | void (*get_mac_addr)(struct hnae3_handle *handle, u8 *p); |
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338 | 517 | int (*set_mac_addr)(struct hnae3_handle *handle, void *p, |
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339 | 518 | bool is_first); |
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| 519 | + int (*do_ioctl)(struct hnae3_handle *handle, |
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| 520 | + struct ifreq *ifr, int cmd); |
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340 | 521 | int (*add_uc_addr)(struct hnae3_handle *handle, |
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341 | 522 | const unsigned char *addr); |
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342 | 523 | int (*rm_uc_addr)(struct hnae3_handle *handle, |
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.. | .. |
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346 | 527 | const unsigned char *addr); |
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347 | 528 | int (*rm_mc_addr)(struct hnae3_handle *handle, |
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348 | 529 | const unsigned char *addr); |
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349 | | - int (*update_mta_status)(struct hnae3_handle *handle); |
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350 | | - |
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351 | 530 | void (*set_tso_stats)(struct hnae3_handle *handle, int enable); |
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352 | 531 | void (*update_stats)(struct hnae3_handle *handle, |
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353 | 532 | struct net_device_stats *net_stats); |
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354 | 533 | void (*get_stats)(struct hnae3_handle *handle, u64 *data); |
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355 | | - |
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| 534 | + void (*get_mac_stats)(struct hnae3_handle *handle, |
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| 535 | + struct hns3_mac_stats *mac_stats); |
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356 | 536 | void (*get_strings)(struct hnae3_handle *handle, |
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357 | 537 | u32 stringset, u8 *data); |
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358 | 538 | int (*get_sset_count)(struct hnae3_handle *handle, int stringset); |
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.. | .. |
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384 | 564 | int vector_num, |
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385 | 565 | struct hnae3_ring_chain_node *vr_chain); |
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386 | 566 | |
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387 | | - void (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); |
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| 567 | + int (*reset_queue)(struct hnae3_handle *handle, u16 queue_id); |
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388 | 568 | u32 (*get_fw_version)(struct hnae3_handle *handle); |
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389 | 569 | void (*get_mdix_mode)(struct hnae3_handle *handle, |
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390 | 570 | u8 *tp_mdix_ctrl, u8 *tp_mdix); |
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.. | .. |
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395 | 575 | int (*set_vf_vlan_filter)(struct hnae3_handle *handle, int vfid, |
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396 | 576 | u16 vlan, u8 qos, __be16 proto); |
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397 | 577 | int (*enable_hw_strip_rxvtag)(struct hnae3_handle *handle, bool enable); |
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398 | | - void (*reset_event)(struct hnae3_handle *handle); |
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| 578 | + void (*reset_event)(struct pci_dev *pdev, struct hnae3_handle *handle); |
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| 579 | + enum hnae3_reset_type (*get_reset_level)(struct hnae3_ae_dev *ae_dev, |
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| 580 | + unsigned long *addr); |
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| 581 | + void (*set_default_reset_request)(struct hnae3_ae_dev *ae_dev, |
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| 582 | + enum hnae3_reset_type rst_type); |
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399 | 583 | void (*get_channels)(struct hnae3_handle *handle, |
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400 | 584 | struct ethtool_channels *ch); |
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401 | 585 | void (*get_tqps_and_rss_info)(struct hnae3_handle *h, |
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402 | | - u16 *free_tqps, u16 *max_rss_size); |
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403 | | - int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num); |
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| 586 | + u16 *alloc_tqps, u16 *max_rss_size); |
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| 587 | + int (*set_channels)(struct hnae3_handle *handle, u32 new_tqps_num, |
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| 588 | + bool rxfh_configured); |
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404 | 589 | void (*get_flowctrl_adv)(struct hnae3_handle *handle, |
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405 | 590 | u32 *flowctrl_adv); |
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406 | 591 | int (*set_led_id)(struct hnae3_handle *handle, |
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.. | .. |
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408 | 593 | void (*get_link_mode)(struct hnae3_handle *handle, |
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409 | 594 | unsigned long *supported, |
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410 | 595 | unsigned long *advertising); |
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411 | | - void (*get_port_type)(struct hnae3_handle *handle, u8 *port_type); |
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| 596 | + int (*add_fd_entry)(struct hnae3_handle *handle, |
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| 597 | + struct ethtool_rxnfc *cmd); |
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| 598 | + int (*del_fd_entry)(struct hnae3_handle *handle, |
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| 599 | + struct ethtool_rxnfc *cmd); |
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| 600 | + void (*del_all_fd_entries)(struct hnae3_handle *handle, |
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| 601 | + bool clear_list); |
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| 602 | + int (*get_fd_rule_cnt)(struct hnae3_handle *handle, |
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| 603 | + struct ethtool_rxnfc *cmd); |
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| 604 | + int (*get_fd_rule_info)(struct hnae3_handle *handle, |
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| 605 | + struct ethtool_rxnfc *cmd); |
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| 606 | + int (*get_fd_all_rules)(struct hnae3_handle *handle, |
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| 607 | + struct ethtool_rxnfc *cmd, u32 *rule_locs); |
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| 608 | + void (*enable_fd)(struct hnae3_handle *handle, bool enable); |
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| 609 | + int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id, |
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| 610 | + u16 flow_id, struct flow_keys *fkeys); |
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| 611 | + int (*dbg_run_cmd)(struct hnae3_handle *handle, const char *cmd_buf); |
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| 612 | + pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); |
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| 613 | + bool (*get_hw_reset_stat)(struct hnae3_handle *handle); |
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| 614 | + bool (*ae_dev_resetting)(struct hnae3_handle *handle); |
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| 615 | + unsigned long (*ae_dev_reset_cnt)(struct hnae3_handle *handle); |
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| 616 | + int (*set_gro_en)(struct hnae3_handle *handle, bool enable); |
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| 617 | + u16 (*get_global_queue_id)(struct hnae3_handle *handle, u16 queue_id); |
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| 618 | + void (*set_timer_task)(struct hnae3_handle *handle, bool enable); |
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| 619 | + int (*mac_connect_phy)(struct hnae3_handle *handle); |
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| 620 | + void (*mac_disconnect_phy)(struct hnae3_handle *handle); |
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| 621 | + int (*get_vf_config)(struct hnae3_handle *handle, int vf, |
---|
| 622 | + struct ifla_vf_info *ivf); |
---|
| 623 | + int (*set_vf_link_state)(struct hnae3_handle *handle, int vf, |
---|
| 624 | + int link_state); |
---|
| 625 | + int (*set_vf_spoofchk)(struct hnae3_handle *handle, int vf, |
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| 626 | + bool enable); |
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| 627 | + int (*set_vf_trust)(struct hnae3_handle *handle, int vf, bool enable); |
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| 628 | + int (*set_vf_rate)(struct hnae3_handle *handle, int vf, |
---|
| 629 | + int min_tx_rate, int max_tx_rate, bool force); |
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| 630 | + int (*set_vf_mac)(struct hnae3_handle *handle, int vf, u8 *p); |
---|
| 631 | + int (*get_module_eeprom)(struct hnae3_handle *handle, u32 offset, |
---|
| 632 | + u32 len, u8 *data); |
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| 633 | + bool (*get_cmdq_stat)(struct hnae3_handle *handle); |
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412 | 634 | }; |
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413 | 635 | |
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414 | 636 | struct hnae3_dcb_ops { |
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.. | .. |
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422 | 644 | u8 (*getdcbx)(struct hnae3_handle *); |
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423 | 645 | u8 (*setdcbx)(struct hnae3_handle *, u8); |
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424 | 646 | |
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425 | | - int (*map_update)(struct hnae3_handle *); |
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426 | 647 | int (*setup_tc)(struct hnae3_handle *, u8, u8 *); |
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427 | 648 | }; |
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428 | 649 | |
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.. | .. |
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432 | 653 | const struct pci_device_id *pdev_id_table; |
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433 | 654 | }; |
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434 | 655 | |
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435 | | -#define HNAE3_INT_NAME_LEN (IFNAMSIZ + 16) |
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| 656 | +#define HNAE3_INT_NAME_LEN 32 |
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436 | 657 | #define HNAE3_ITR_COUNTDOWN_START 100 |
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437 | 658 | |
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438 | 659 | struct hnae3_tc_info { |
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.. | .. |
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447 | 668 | struct hnae3_knic_private_info { |
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448 | 669 | struct net_device *netdev; /* Set by KNIC client when init instance */ |
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449 | 670 | u16 rss_size; /* Allocated RSS queues */ |
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| 671 | + u16 req_rss_size; |
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450 | 672 | u16 rx_buf_len; |
---|
451 | | - u16 num_desc; |
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| 673 | + u16 num_tx_desc; |
---|
| 674 | + u16 num_rx_desc; |
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452 | 675 | |
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453 | 676 | u8 num_tc; /* Total number of enabled TCs */ |
---|
454 | 677 | u8 prio_tc[HNAE3_MAX_USER_PRIO]; /* TC indexed by prio */ |
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.. | .. |
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459 | 682 | const struct hnae3_dcb_ops *dcb_ops; |
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460 | 683 | |
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461 | 684 | u16 int_rl_setting; |
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| 685 | + enum pkt_hash_types rss_type; |
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462 | 686 | }; |
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463 | 687 | |
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464 | 688 | struct hnae3_roce_private_info { |
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.. | .. |
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466 | 690 | void __iomem *roce_io_base; |
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467 | 691 | int base_vector; |
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468 | 692 | int num_vectors; |
---|
| 693 | + |
---|
| 694 | + /* The below attributes defined for RoCE client, hnae3 gives |
---|
| 695 | + * initial values to them, and RoCE client can modify and use |
---|
| 696 | + * them. |
---|
| 697 | + */ |
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| 698 | + unsigned long reset_state; |
---|
| 699 | + unsigned long instance_state; |
---|
| 700 | + unsigned long state; |
---|
469 | 701 | }; |
---|
470 | 702 | |
---|
471 | | -struct hnae3_unic_private_info { |
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472 | | - struct net_device *netdev; |
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473 | | - u16 rx_buf_len; |
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474 | | - u16 num_desc; |
---|
475 | | - u16 num_tqps; /* total number of tqps in this handle */ |
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476 | | - struct hnae3_queue **tqp; /* array base of all TQPs of this instance */ |
---|
477 | | -}; |
---|
478 | | - |
---|
479 | | -#define HNAE3_SUPPORT_MAC_LOOPBACK BIT(0) |
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| 703 | +#define HNAE3_SUPPORT_APP_LOOPBACK BIT(0) |
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480 | 704 | #define HNAE3_SUPPORT_PHY_LOOPBACK BIT(1) |
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481 | | -#define HNAE3_SUPPORT_SERDES_LOOPBACK BIT(2) |
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| 705 | +#define HNAE3_SUPPORT_SERDES_SERIAL_LOOPBACK BIT(2) |
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482 | 706 | #define HNAE3_SUPPORT_VF BIT(3) |
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| 707 | +#define HNAE3_SUPPORT_SERDES_PARALLEL_LOOPBACK BIT(4) |
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| 708 | + |
---|
| 709 | +#define HNAE3_USER_UPE BIT(0) /* unicast promisc enabled by user */ |
---|
| 710 | +#define HNAE3_USER_MPE BIT(1) /* mulitcast promisc enabled by user */ |
---|
| 711 | +#define HNAE3_BPE BIT(2) /* broadcast promisc enable */ |
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| 712 | +#define HNAE3_OVERFLOW_UPE BIT(3) /* unicast mac vlan overflow */ |
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| 713 | +#define HNAE3_OVERFLOW_MPE BIT(4) /* multicast mac vlan overflow */ |
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| 714 | +#define HNAE3_VLAN_FLTR BIT(5) /* enable vlan filter */ |
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| 715 | +#define HNAE3_UPE (HNAE3_USER_UPE | HNAE3_OVERFLOW_UPE) |
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| 716 | +#define HNAE3_MPE (HNAE3_USER_MPE | HNAE3_OVERFLOW_MPE) |
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483 | 717 | |
---|
484 | 718 | struct hnae3_handle { |
---|
485 | 719 | struct hnae3_client *client; |
---|
486 | 720 | struct pci_dev *pdev; |
---|
487 | 721 | void *priv; |
---|
488 | 722 | struct hnae3_ae_algo *ae_algo; /* the class who provides this handle */ |
---|
489 | | - u64 flags; /* Indicate the capabilities for this handle*/ |
---|
490 | | - |
---|
491 | | - unsigned long last_reset_time; |
---|
492 | | - enum hnae3_reset_type reset_level; |
---|
| 723 | + u64 flags; /* Indicate the capabilities for this handle */ |
---|
493 | 724 | |
---|
494 | 725 | union { |
---|
495 | 726 | struct net_device *netdev; /* first member */ |
---|
496 | 727 | struct hnae3_knic_private_info kinfo; |
---|
497 | | - struct hnae3_unic_private_info uinfo; |
---|
498 | 728 | struct hnae3_roce_private_info rinfo; |
---|
499 | 729 | }; |
---|
500 | 730 | |
---|
501 | 731 | u32 numa_node_mask; /* for multi-chip support */ |
---|
| 732 | + |
---|
| 733 | + enum hnae3_port_base_vlan_state port_base_vlan_state; |
---|
| 734 | + |
---|
| 735 | + u8 netdev_flags; |
---|
| 736 | + struct dentry *hnae3_dbgfs; |
---|
| 737 | + |
---|
| 738 | + /* Network interface message level enabled bits */ |
---|
| 739 | + u32 msg_enable; |
---|
502 | 740 | }; |
---|
503 | 741 | |
---|
504 | 742 | #define hnae3_set_field(origin, mask, shift, val) \ |
---|
.. | .. |
---|
524 | 762 | int hnae3_register_client(struct hnae3_client *client); |
---|
525 | 763 | |
---|
526 | 764 | void hnae3_set_client_init_flag(struct hnae3_client *client, |
---|
527 | | - struct hnae3_ae_dev *ae_dev, int inited); |
---|
| 765 | + struct hnae3_ae_dev *ae_dev, |
---|
| 766 | + unsigned int inited); |
---|
528 | 767 | #endif |
---|