forked from ~ljy/RK356X_SDK_RELEASE

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hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/drivers/net/ethernet/freescale/fec_main.c
....@@ -75,7 +75,7 @@
7575 
7676 #define DRIVER_NAME	"fec"
7777 
78
-#define FEC_ENET_GET_QUQUE(_x) ((_x == 0) ? 1 : ((_x == 1) ? 2 : 0))
78
+static const u16 fec_enet_vlan_pri_to_queue[8] = {0, 0, 1, 1, 1, 2, 2, 2};
7979 
8080 /* Pause frame feild and FIFO threshold */
8181 #define FEC_ENET_FCE	(1 << 5)
....@@ -88,8 +88,6 @@
8888 
8989 struct fec_devinfo {
9090 	u32 quirks;
91
-	u8 stop_gpr_reg;
92
-	u8 stop_gpr_bit;
9391 };
9492 
9593 static const struct fec_devinfo fec_imx25_info = {
....@@ -104,16 +102,14 @@
104102 static const struct fec_devinfo fec_imx28_info = {
105103 	.quirks = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME |
106104 		  FEC_QUIRK_SINGLE_MDIO | FEC_QUIRK_HAS_RACC |
107
-		  FEC_QUIRK_HAS_FRREG,
105
+		  FEC_QUIRK_HAS_FRREG | FEC_QUIRK_CLEAR_SETUP_MII,
108106 };
109107 
110108 static const struct fec_devinfo fec_imx6q_info = {
111109 	.quirks = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
112110 		  FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
113111 		  FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358 |
114
-		  FEC_QUIRK_HAS_RACC,
115
-	.stop_gpr_reg = 0x34,
116
-	.stop_gpr_bit = 27,
112
+		  FEC_QUIRK_HAS_RACC | FEC_QUIRK_CLEAR_SETUP_MII,
117113 };
118114 
119115 static const struct fec_devinfo fec_mvf600_info = {
....@@ -125,7 +121,8 @@
125121 		  FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
126122 		  FEC_QUIRK_HAS_VLAN | FEC_QUIRK_HAS_AVB |
127123 		  FEC_QUIRK_ERR007885 | FEC_QUIRK_BUG_CAPTURE |
128
-		  FEC_QUIRK_HAS_RACC | FEC_QUIRK_HAS_COALESCE,
124
+		  FEC_QUIRK_HAS_RACC | FEC_QUIRK_HAS_COALESCE |
125
+		  FEC_QUIRK_CLEAR_SETUP_MII,
129126 };
130127 
131128 static const struct fec_devinfo fec_imx6ul_info = {
....@@ -133,7 +130,7 @@
133130 		  FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
134131 		  FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR007885 |
135132 		  FEC_QUIRK_BUG_CAPTURE | FEC_QUIRK_HAS_RACC |
136
-		  FEC_QUIRK_HAS_COALESCE,
133
+		  FEC_QUIRK_HAS_COALESCE | FEC_QUIRK_CLEAR_SETUP_MII,
137134 };
138135 
139136 static struct platform_device_id fec_devtype[] = {
....@@ -246,8 +243,11 @@
246243 
247244 /* FEC MII MMFR bits definition */
248245 #define FEC_MMFR_ST		(1 << 30)
246
+#define FEC_MMFR_ST_C45		(0)
249247 #define FEC_MMFR_OP_READ	(2 << 28)
248
+#define FEC_MMFR_OP_READ_C45	(3 << 28)
250249 #define FEC_MMFR_OP_WRITE	(1 << 28)
250
+#define FEC_MMFR_OP_ADDR_WRITE	(0)
251251 #define FEC_MMFR_PA(v)		((v & 0x1f) << 23)
252252 #define FEC_MMFR_RA(v)		((v & 0x1f) << 18)
253253 #define FEC_MMFR_TA		(2 << 16)
....@@ -403,7 +403,7 @@
403403 		status = fec16_to_cpu(bdp->cbd_sc);
404404 		status &= ~BD_ENET_TX_STATS;
405405 		status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
406
-		frag_len = skb_shinfo(skb)->frags[frag].size;
406
+		frag_len = skb_frag_size(&skb_shinfo(skb)->frags[frag]);
407407 
408408 		/* Handle the last BD specially */
409409 		if (frag == nr_frags - 1) {
....@@ -425,7 +425,7 @@
425425 			ebdp->cbd_esc = cpu_to_fec32(estatus);
426426 		}
427427 
428
-		bufaddr = page_address(this_frag->page.p) + this_frag->page_offset;
428
+		bufaddr = skb_frag_address(this_frag);
429429 
430430 		index = fec_enet_get_bd_index(bdp, &txq->bd);
431431 		if (((unsigned long) bufaddr) & fep->tx_align ||
....@@ -623,7 +623,7 @@
623623 		dev_kfree_skb_any(skb);
624624 		if (net_ratelimit())
625625 			netdev_err(ndev, "Tx DMA memory map failed\n");
626
-		return NETDEV_TX_BUSY;
626
+		return NETDEV_TX_OK;
627627 	}
628628 
629629 	bdp->cbd_datlen = cpu_to_fec16(size);
....@@ -685,7 +685,7 @@
685685 			dev_kfree_skb_any(skb);
686686 			if (net_ratelimit())
687687 				netdev_err(ndev, "Tx DMA memory map failed\n");
688
-			return NETDEV_TX_BUSY;
688
+			return NETDEV_TX_OK;
689689 		}
690690 	}
691691 
....@@ -711,8 +711,7 @@
711711 				   struct net_device *ndev)
712712 {
713713 	struct fec_enet_private *fep = netdev_priv(ndev);
714
-	int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
715
-	int total_len, data_left;
714
+	int hdr_len, total_len, data_left;
716715 	struct bufdesc *bdp = txq->bd.cur;
717716 	struct tso_t tso;
718717 	unsigned int index = 0;
....@@ -732,7 +731,7 @@
732731 	}
733732 
734733 	/* Initialize the TSO handler, and prepare the first payload */
735
-	tso_start(skb, &tso);
734
+	hdr_len = tso_start(skb, &tso);
736735 
737736 	total_len = skb->len - hdr_len;
738737 	while (total_len > 0) {
....@@ -973,8 +972,8 @@
973972 	writel((__force u32)cpu_to_be32(temp_mac[1]),
974973 	       fep->hwp + FEC_ADDR_HIGH);
975974 
976
-	/* Clear any outstanding interrupt. */
977
-	writel(0xffffffff, fep->hwp + FEC_IEVENT);
975
+	/* Clear any outstanding interrupt, except MDIO. */
976
+	writel((0xffffffff & ~FEC_ENET_MII), fep->hwp + FEC_IEVENT);
978977 
979978 	fec_enet_bd_init(ndev);
980979 
....@@ -1120,7 +1119,7 @@
11201119 	if (fep->link)
11211120 		writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
11221121 	else
1123
-		writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1122
+		writel(0, fep->hwp + FEC_IMASK);
11241123 
11251124 	/* Init the interrupt coalescing */
11261125 	fec_enet_itr_coal_init(ndev);
....@@ -1191,7 +1190,7 @@
11911190 
11921191 
11931192 static void
1194
-fec_timeout(struct net_device *ndev)
1193
+fec_timeout(struct net_device *ndev, unsigned int txqueue)
11951194 {
11961195 	struct fec_enet_private *fep = netdev_priv(ndev);
11971196 
....@@ -1249,8 +1248,6 @@
12491248 
12501249 	fep = netdev_priv(ndev);
12511250 
1252
-	queue_id = FEC_ENET_GET_QUQUE(queue_id);
1253
-
12541251 	txq = fep->tx_queue[queue_id];
12551252 	/* get next bdp of dirty_tx */
12561253 	nq = netdev_get_tx_queue(ndev, queue_id);
....@@ -1299,8 +1296,13 @@
12991296 			ndev->stats.tx_bytes += skb->len;
13001297 		}
13011298 
1302
-		if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
1303
-			fep->bufdesc_ex) {
1299
+		/* NOTE: SKBTX_IN_PROGRESS being set does not imply it's we who
1300
+		 * are to time stamp the packet, so we still need to check time
1301
+		 * stamping enabled flag.
1302
+		 */
1303
+		if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS &&
1304
+			     fep->hwts_tx_en) &&
1305
+		    fep->bufdesc_ex) {
13041306 			struct skb_shared_hwtstamps shhwtstamps;
13051307 			struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
13061308 
....@@ -1341,17 +1343,14 @@
13411343 		writel(0, txq->bd.reg_desc_active);
13421344 }
13431345 
1344
-static void
1345
-fec_enet_tx(struct net_device *ndev)
1346
+static void fec_enet_tx(struct net_device *ndev)
13461347 {
13471348 	struct fec_enet_private *fep = netdev_priv(ndev);
1348
-	u16 queue_id;
1349
-	/* First process class A queue, then Class B and Best Effort queue */
1350
-	for_each_set_bit(queue_id, &fep->work_tx, FEC_ENET_MAX_TX_QS) {
1351
-		clear_bit(queue_id, &fep->work_tx);
1352
-		fec_enet_tx_queue(ndev, queue_id);
1353
-	}
1354
-	return;
1349
+	int i;
1350
+
1351
+	/* Make sure that AVB queues are processed first. */
1352
+	for (i = fep->num_tx_queues - 1; i >= 0; i--)
1353
+		fec_enet_tx_queue(ndev, i);
13551354 }
13561355 
13571356 static int
....@@ -1427,7 +1426,6 @@
14271426 #ifdef CONFIG_M532x
14281427 	flush_cache_all();
14291428 #endif
1430
-	queue_id = FEC_ENET_GET_QUQUE(queue_id);
14311429 	rxq = fep->rx_queue[queue_id];
14321430 
14331431 	/* First, grab all of the stats for the incoming packet.
....@@ -1551,6 +1549,7 @@
15511549 					       htons(ETH_P_8021Q),
15521550 					       vlan_tag);
15531551 
1552
+		skb_record_rx_queue(skb, queue_id);
15541553 		napi_gro_receive(&fep->napi, skb);
15551554 
15561555 		if (is_copybreak) {
....@@ -1596,48 +1595,30 @@
15961595 	return pkt_received;
15971596 }
15981597 
1599
-static int
1600
-fec_enet_rx(struct net_device *ndev, int budget)
1598
+static int fec_enet_rx(struct net_device *ndev, int budget)
16011599 {
1602
-	int     pkt_received = 0;
1603
-	u16	queue_id;
16041600 	struct fec_enet_private *fep = netdev_priv(ndev);
1601
+	int i, done = 0;
16051602 
1606
-	for_each_set_bit(queue_id, &fep->work_rx, FEC_ENET_MAX_RX_QS) {
1607
-		int ret;
1603
+	/* Make sure that AVB queues are processed first. */
1604
+	for (i = fep->num_rx_queues - 1; i >= 0; i--)
1605
+		done += fec_enet_rx_queue(ndev, budget - done, i);
16081606 
1609
-		ret = fec_enet_rx_queue(ndev,
1610
-					budget - pkt_received, queue_id);
1611
-
1612
-		if (ret < budget - pkt_received)
1613
-			clear_bit(queue_id, &fep->work_rx);
1614
-
1615
-		pkt_received += ret;
1616
-	}
1617
-	return pkt_received;
1607
+	return done;
16181608 }
16191609 
1620
-static bool
1621
-fec_enet_collect_events(struct fec_enet_private *fep, uint int_events)
1610
+static bool fec_enet_collect_events(struct fec_enet_private *fep)
16221611 {
1623
-	if (int_events == 0)
1624
-		return false;
1612
+	uint int_events;
16251613 
1626
-	if (int_events & FEC_ENET_RXF_0)
1627
-		fep->work_rx |= (1 << 2);
1628
-	if (int_events & FEC_ENET_RXF_1)
1629
-		fep->work_rx |= (1 << 0);
1630
-	if (int_events & FEC_ENET_RXF_2)
1631
-		fep->work_rx |= (1 << 1);
1614
+	int_events = readl(fep->hwp + FEC_IEVENT);
16321615 
1633
-	if (int_events & FEC_ENET_TXF_0)
1634
-		fep->work_tx |= (1 << 2);
1635
-	if (int_events & FEC_ENET_TXF_1)
1636
-		fep->work_tx |= (1 << 0);
1637
-	if (int_events & FEC_ENET_TXF_2)
1638
-		fep->work_tx |= (1 << 1);
1616
+	/* Don't clear MDIO events, we poll for those */
1617
+	int_events &= ~FEC_ENET_MII;
16391618 
1640
-	return true;
1619
+	writel(int_events, fep->hwp + FEC_IEVENT);
1620
+
1621
+	return int_events != 0;
16411622 }
16421623 
16431624 static irqreturn_t
....@@ -1645,27 +1626,18 @@
16451626 {
16461627 	struct net_device *ndev = dev_id;
16471628 	struct fec_enet_private *fep = netdev_priv(ndev);
1648
-	uint int_events;
16491629 	irqreturn_t ret = IRQ_NONE;
16501630 
1651
-	int_events = readl(fep->hwp + FEC_IEVENT);
1652
-	writel(int_events, fep->hwp + FEC_IEVENT);
1653
-	fec_enet_collect_events(fep, int_events);
1654
-
1655
-	if ((fep->work_tx || fep->work_rx) && fep->link) {
1631
+	if (fec_enet_collect_events(fep) && fep->link) {
16561632 		ret = IRQ_HANDLED;
16571633 
16581634 		if (napi_schedule_prep(&fep->napi)) {
1659
-			/* Disable the NAPI interrupts */
1660
-			writel(FEC_NAPI_IMASK, fep->hwp + FEC_IMASK);
1635
+			/* Disable interrupts */
1636
+			writel(0, fep->hwp + FEC_IMASK);
16611637 			__napi_schedule(&fep->napi);
16621638 		}
16631639 	}
16641640 
1665
-	if (int_events & FEC_ENET_MII) {
1666
-		ret = IRQ_HANDLED;
1667
-		complete(&fep->mdio_done);
1668
-	}
16691641 	return ret;
16701642 }
16711643 
....@@ -1673,17 +1645,19 @@
16731645 {
16741646 	struct net_device *ndev = napi->dev;
16751647 	struct fec_enet_private *fep = netdev_priv(ndev);
1676
-	int pkts;
1648
+	int done = 0;
16771649 
1678
-	pkts = fec_enet_rx(ndev, budget);
1650
+	do {
1651
+		done += fec_enet_rx(ndev, budget - done);
1652
+		fec_enet_tx(ndev);
1653
+	} while ((done < budget) && fec_enet_collect_events(fep));
16791654 
1680
-	fec_enet_tx(ndev);
1681
-
1682
-	if (pkts < budget) {
1683
-		napi_complete_done(napi, pkts);
1655
+	if (done < budget) {
1656
+		napi_complete_done(napi, done);
16841657 		writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
16851658 	}
1686
-	return pkts;
1659
+
1660
+	return done;
16871661 }
16881662 
16891663 /* ------------------------------------------------------------------------- */
....@@ -1708,7 +1682,7 @@
17081682 		struct device_node *np = fep->pdev->dev.of_node;
17091683 		if (np) {
17101684 			const char *mac = of_get_mac_address(np);
1711
-			if (mac)
1685
+			if (!IS_ERR(mac))
17121686 				iap = (unsigned char *) mac;
17131687 		}
17141688 	}
....@@ -1767,12 +1741,6 @@
17671741 	struct phy_device *phy_dev = ndev->phydev;
17681742 	int status_change = 0;
17691743 
1770
-	/* Prevent a state halted on mii error */
1771
-	if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
1772
-		phy_dev->state = PHY_RESUMING;
1773
-		return;
1774
-	}
1775
-
17761744 	/*
17771745 	 * If the netdev is down, or is going down, we're not interested
17781746 	 * in link state events, so just mark our idea of the link as down
....@@ -1821,32 +1789,66 @@
18211789 		phy_print_status(phy_dev);
18221790 }
18231791 
1792
+static int fec_enet_mdio_wait(struct fec_enet_private *fep)
1793
+{
1794
+	uint ievent;
1795
+	int ret;
1796
+
1797
+	ret = readl_poll_timeout_atomic(fep->hwp + FEC_IEVENT, ievent,
1798
+					ievent & FEC_ENET_MII, 2, 30000);
1799
+
1800
+	if (!ret)
1801
+		writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT);
1802
+
1803
+	return ret;
1804
+}
1805
+
18241806 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
18251807 {
18261808 	struct fec_enet_private *fep = bus->priv;
18271809 	struct device *dev = &fep->pdev->dev;
1828
-	unsigned long time_left;
1829
-	int ret = 0;
1810
+	int ret = 0, frame_start, frame_addr, frame_op;
1811
+	bool is_c45 = !!(regnum & MII_ADDR_C45);
18301812 
1831
-	ret = pm_runtime_get_sync(dev);
1813
+	ret = pm_runtime_resume_and_get(dev);
18321814 	if (ret < 0)
18331815 		return ret;
18341816 
1835
-	fep->mii_timeout = 0;
1836
-	reinit_completion(&fep->mdio_done);
1817
+	if (is_c45) {
1818
+		frame_start = FEC_MMFR_ST_C45;
1819
+
1820
+		/* write address */
1821
+		frame_addr = (regnum >> 16);
1822
+		writel(frame_start | FEC_MMFR_OP_ADDR_WRITE |
1823
+		       FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(frame_addr) |
1824
+		       FEC_MMFR_TA | (regnum & 0xFFFF),
1825
+		       fep->hwp + FEC_MII_DATA);
1826
+
1827
+		/* wait for end of transfer */
1828
+		ret = fec_enet_mdio_wait(fep);
1829
+		if (ret) {
1830
+			netdev_err(fep->netdev, "MDIO address write timeout\n");
1831
+			goto out;
1832
+		}
1833
+
1834
+		frame_op = FEC_MMFR_OP_READ_C45;
1835
+
1836
+	} else {
1837
+		/* C22 read */
1838
+		frame_op = FEC_MMFR_OP_READ;
1839
+		frame_start = FEC_MMFR_ST;
1840
+		frame_addr = regnum;
1841
+	}
18371842 
18381843 	/* start a read op */
1839
-	writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
1840
-		FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1844
+	writel(frame_start | frame_op |
1845
+		FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(frame_addr) |
18411846 		FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
18421847 
18431848 	/* wait for end of transfer */
1844
-	time_left = wait_for_completion_timeout(&fep->mdio_done,
1845
-			usecs_to_jiffies(FEC_MII_TIMEOUT));
1846
-	if (time_left == 0) {
1847
-		fep->mii_timeout = 1;
1849
+	ret = fec_enet_mdio_wait(fep);
1850
+	if (ret) {
18481851 		netdev_err(fep->netdev, "MDIO read timeout\n");
1849
-		ret = -ETIMEDOUT;
18501852 		goto out;
18511853 	}
18521854 
....@@ -1864,33 +1866,47 @@
18641866 {
18651867 	struct fec_enet_private *fep = bus->priv;
18661868 	struct device *dev = &fep->pdev->dev;
1867
-	unsigned long time_left;
1868
-	int ret;
1869
+	int ret, frame_start, frame_addr;
1870
+	bool is_c45 = !!(regnum & MII_ADDR_C45);
18691871 
1870
-	ret = pm_runtime_get_sync(dev);
1872
+	ret = pm_runtime_resume_and_get(dev);
18711873 	if (ret < 0)
18721874 		return ret;
1873
-	else
1874
-		ret = 0;
18751875 
1876
-	fep->mii_timeout = 0;
1877
-	reinit_completion(&fep->mdio_done);
1876
+	if (is_c45) {
1877
+		frame_start = FEC_MMFR_ST_C45;
1878
+
1879
+		/* write address */
1880
+		frame_addr = (regnum >> 16);
1881
+		writel(frame_start | FEC_MMFR_OP_ADDR_WRITE |
1882
+		       FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(frame_addr) |
1883
+		       FEC_MMFR_TA | (regnum & 0xFFFF),
1884
+		       fep->hwp + FEC_MII_DATA);
1885
+
1886
+		/* wait for end of transfer */
1887
+		ret = fec_enet_mdio_wait(fep);
1888
+		if (ret) {
1889
+			netdev_err(fep->netdev, "MDIO address write timeout\n");
1890
+			goto out;
1891
+		}
1892
+	} else {
1893
+		/* C22 write */
1894
+		frame_start = FEC_MMFR_ST;
1895
+		frame_addr = regnum;
1896
+	}
18781897 
18791898 	/* start a write op */
1880
-	writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
1881
-		FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1899
+	writel(frame_start | FEC_MMFR_OP_WRITE |
1900
+		FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(frame_addr) |
18821901 		FEC_MMFR_TA | FEC_MMFR_DATA(value),
18831902 		fep->hwp + FEC_MII_DATA);
18841903 
18851904 	/* wait for end of transfer */
1886
-	time_left = wait_for_completion_timeout(&fep->mdio_done,
1887
-			usecs_to_jiffies(FEC_MII_TIMEOUT));
1888
-	if (time_left == 0) {
1889
-		fep->mii_timeout = 1;
1905
+	ret = fec_enet_mdio_wait(fep);
1906
+	if (ret)
18901907 		netdev_err(fep->netdev, "MDIO write timeout\n");
1891
-		ret  = -ETIMEDOUT;
1892
-	}
18931908 
1909
+out:
18941910 	pm_runtime_mark_last_busy(dev);
18951911 	pm_runtime_put_autosuspend(dev);
18961912 
....@@ -1959,11 +1975,14 @@
19591975 	return 0;
19601976 
19611977 failed_clk_ref:
1962
-	if (fep->clk_ref)
1963
-		clk_disable_unprepare(fep->clk_ref);
1978
+	if (fep->clk_ptp) {
1979
+		mutex_lock(&fep->ptp_clk_mutex);
1980
+		clk_disable_unprepare(fep->clk_ptp);
1981
+		fep->ptp_clk_on = false;
1982
+		mutex_unlock(&fep->ptp_clk_mutex);
1983
+	}
19641984 failed_clk_ptp:
1965
-	if (fep->clk_enet_out)
1966
-		clk_disable_unprepare(fep->clk_enet_out);
1985
+	clk_disable_unprepare(fep->clk_enet_out);
19671986 
19681987 	return ret;
19691988 }
....@@ -2015,16 +2034,15 @@
20152034 
20162035 	/* mask with MAC supported features */
20172036 	if (fep->quirks & FEC_QUIRK_HAS_GBIT) {
2018
-		phy_dev->supported &= PHY_GBIT_FEATURES;
2019
-		phy_dev->supported &= ~SUPPORTED_1000baseT_Half;
2037
+		phy_set_max_speed(phy_dev, 1000);
2038
+		phy_remove_link_mode(phy_dev,
2039
+				     ETHTOOL_LINK_MODE_1000baseT_Half_BIT);
20202040 #if !defined(CONFIG_M5272)
2021
-		phy_dev->supported |= SUPPORTED_Pause;
2041
+		phy_support_sym_pause(phy_dev);
20222042 #endif
20232043 	}
20242044 	else
2025
-		phy_dev->supported &= PHY_BASIC_FEATURES;
2026
-
2027
-	phy_dev->advertising = phy_dev->supported;
2045
+		phy_set_max_speed(phy_dev, 100);
20282046 
20292047 	fep->link = 0;
20302048 	fep->full_duplex = 0;
....@@ -2039,9 +2057,11 @@
20392057 	static struct mii_bus *fec0_mii_bus;
20402058 	struct net_device *ndev = platform_get_drvdata(pdev);
20412059 	struct fec_enet_private *fep = netdev_priv(ndev);
2060
+	bool suppress_preamble = false;
20422061 	struct device_node *node;
20432062 	int err = -ENXIO;
20442063 	u32 mii_speed, holdtime;
2064
+	u32 bus_freq;
20452065 
20462066 	/*
20472067 	 * The i.MX28 dual fec interfaces are not equal.
....@@ -2069,17 +2089,23 @@
20692089 		return -ENOENT;
20702090 	}
20712091 
2072
-	fep->mii_timeout = 0;
2092
+	bus_freq = 2500000; /* 2.5MHz by default */
2093
+	node = of_get_child_by_name(pdev->dev.of_node, "mdio");
2094
+	if (node) {
2095
+		of_property_read_u32(node, "clock-frequency", &bus_freq);
2096
+		suppress_preamble = of_property_read_bool(node,
2097
+							  "suppress-preamble");
2098
+	}
20732099 
20742100 	/*
2075
-	 * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
2101
+	 * Set MII speed (= clk_get_rate() / 2 * phy_speed)
20762102 	 *
20772103 	 * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
20782104 	 * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'.  The i.MX28
20792105 	 * Reference Manual has an error on this, and gets fixed on i.MX6Q
20802106 	 * document.
20812107 	 */
2082
-	mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 5000000);
2108
+	mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), bus_freq * 2);
20832109 	if (fep->quirks & FEC_QUIRK_ENET_MAC)
20842110 		mii_speed--;
20852111 	if (mii_speed > 63) {
....@@ -2106,7 +2132,25 @@
21062132 
21072133 	fep->phy_speed = mii_speed << 1 | holdtime << 8;
21082134 
2135
+	if (suppress_preamble)
2136
+		fep->phy_speed |= BIT(7);
2137
+
2138
+	if (fep->quirks & FEC_QUIRK_CLEAR_SETUP_MII) {
2139
+		/* Clear MMFR to avoid to generate MII event by writing MSCR.
2140
+		 * MII event generation condition:
2141
+		 * - writing MSCR:
2142
+		 *	- mmfr[31:0]_not_zero & mscr[7:0]_is_zero &
2143
+		 *	  mscr_reg_data_in[7:0] != 0
2144
+		 * - writing MMFR:
2145
+		 *	- mscr[7:0]_not_zero
2146
+		 */
2147
+		writel(0, fep->hwp + FEC_MII_DATA);
2148
+	}
2149
+
21092150 	writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
2151
+
2152
+	/* Clear any pending transaction complete indication */
2153
+	writel(FEC_ENET_MII, fep->hwp + FEC_IEVENT);
21102154 
21112155 	fep->mii_bus = mdiobus_alloc();
21122156 	if (fep->mii_bus == NULL) {
....@@ -2122,12 +2166,10 @@
21222166 	fep->mii_bus->priv = fep;
21232167 	fep->mii_bus->parent = &pdev->dev;
21242168 
2125
-	node = of_get_child_by_name(pdev->dev.of_node, "mdio");
21262169 	err = of_mdiobus_register(fep->mii_bus, node);
2127
-	if (node)
2128
-		of_node_put(node);
21292170 	if (err)
21302171 		goto err_out_free_mdiobus;
2172
+	of_node_put(node);
21312173 
21322174 	mii_cnt++;
21332175 
....@@ -2140,6 +2182,7 @@
21402182 err_out_free_mdiobus:
21412183 	mdiobus_free(fep->mii_bus);
21422184 err_out:
2185
+	of_node_put(node);
21432186 	return err;
21442187 }
21452188 
....@@ -2158,7 +2201,6 @@
21582201 
21592202 	strlcpy(info->driver, fep->pdev->dev.driver->name,
21602203 		sizeof(info->driver));
2161
-	strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
21622204 	strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
21632205 }
21642206 
....@@ -2179,6 +2221,7 @@
21792221 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
21802222 	defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM) || \
21812223 	defined(CONFIG_ARM64) || defined(CONFIG_COMPILE_TEST)
2224
+static __u32 fec_enet_register_version = 2;
21822225 static u32 fec_enet_register_offset[] = {
21832226 	FEC_IEVENT, FEC_IMASK, FEC_R_DES_ACTIVE_0, FEC_X_DES_ACTIVE_0,
21842227 	FEC_ECNTRL, FEC_MII_DATA, FEC_MII_SPEED, FEC_MIB_CTRLSTAT, FEC_R_CNTRL,
....@@ -2208,7 +2251,33 @@
22082251 	IEEE_R_DROP, IEEE_R_FRAME_OK, IEEE_R_CRC, IEEE_R_ALIGN, IEEE_R_MACERR,
22092252 	IEEE_R_FDXFC, IEEE_R_OCTETS_OK
22102253 };
2254
+/* for i.MX6ul */
2255
+static u32 fec_enet_register_offset_6ul[] = {
2256
+	FEC_IEVENT, FEC_IMASK, FEC_R_DES_ACTIVE_0, FEC_X_DES_ACTIVE_0,
2257
+	FEC_ECNTRL, FEC_MII_DATA, FEC_MII_SPEED, FEC_MIB_CTRLSTAT, FEC_R_CNTRL,
2258
+	FEC_X_CNTRL, FEC_ADDR_LOW, FEC_ADDR_HIGH, FEC_OPD, FEC_TXIC0, FEC_RXIC0,
2259
+	FEC_HASH_TABLE_HIGH, FEC_HASH_TABLE_LOW, FEC_GRP_HASH_TABLE_HIGH,
2260
+	FEC_GRP_HASH_TABLE_LOW, FEC_X_WMRK, FEC_R_DES_START_0,
2261
+	FEC_X_DES_START_0, FEC_R_BUFF_SIZE_0, FEC_R_FIFO_RSFL, FEC_R_FIFO_RSEM,
2262
+	FEC_R_FIFO_RAEM, FEC_R_FIFO_RAFL, FEC_RACC,
2263
+	RMON_T_DROP, RMON_T_PACKETS, RMON_T_BC_PKT, RMON_T_MC_PKT,
2264
+	RMON_T_CRC_ALIGN, RMON_T_UNDERSIZE, RMON_T_OVERSIZE, RMON_T_FRAG,
2265
+	RMON_T_JAB, RMON_T_COL, RMON_T_P64, RMON_T_P65TO127, RMON_T_P128TO255,
2266
+	RMON_T_P256TO511, RMON_T_P512TO1023, RMON_T_P1024TO2047,
2267
+	RMON_T_P_GTE2048, RMON_T_OCTETS,
2268
+	IEEE_T_DROP, IEEE_T_FRAME_OK, IEEE_T_1COL, IEEE_T_MCOL, IEEE_T_DEF,
2269
+	IEEE_T_LCOL, IEEE_T_EXCOL, IEEE_T_MACERR, IEEE_T_CSERR, IEEE_T_SQE,
2270
+	IEEE_T_FDXFC, IEEE_T_OCTETS_OK,
2271
+	RMON_R_PACKETS, RMON_R_BC_PKT, RMON_R_MC_PKT, RMON_R_CRC_ALIGN,
2272
+	RMON_R_UNDERSIZE, RMON_R_OVERSIZE, RMON_R_FRAG, RMON_R_JAB,
2273
+	RMON_R_RESVD_O, RMON_R_P64, RMON_R_P65TO127, RMON_R_P128TO255,
2274
+	RMON_R_P256TO511, RMON_R_P512TO1023, RMON_R_P1024TO2047,
2275
+	RMON_R_P_GTE2048, RMON_R_OCTETS,
2276
+	IEEE_R_DROP, IEEE_R_FRAME_OK, IEEE_R_CRC, IEEE_R_ALIGN, IEEE_R_MACERR,
2277
+	IEEE_R_FDXFC, IEEE_R_OCTETS_OK
2278
+};
22112279 #else
2280
+static __u32 fec_enet_register_version = 1;
22122281 static u32 fec_enet_register_offset[] = {
22132282 	FEC_ECNTRL, FEC_IEVENT, FEC_IMASK, FEC_IVEC, FEC_R_DES_ACTIVE_0,
22142283 	FEC_R_DES_ACTIVE_1, FEC_R_DES_ACTIVE_2, FEC_X_DES_ACTIVE_0,
....@@ -2227,13 +2296,38 @@
22272296 {
22282297 	struct fec_enet_private *fep = netdev_priv(ndev);
22292298 	u32 __iomem *theregs = (u32 __iomem *)fep->hwp;
2299
+	struct device *dev = &fep->pdev->dev;
22302300 	u32 *buf = (u32 *)regbuf;
22312301 	u32 i, off;
2302
+	int ret;
2303
+#if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
2304
+	defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM) || \
2305
+	defined(CONFIG_ARM64) || defined(CONFIG_COMPILE_TEST)
2306
+	u32 *reg_list;
2307
+	u32 reg_cnt;
2308
+
2309
+	if (!of_machine_is_compatible("fsl,imx6ul")) {
2310
+		reg_list = fec_enet_register_offset;
2311
+		reg_cnt = ARRAY_SIZE(fec_enet_register_offset);
2312
+	} else {
2313
+		reg_list = fec_enet_register_offset_6ul;
2314
+		reg_cnt = ARRAY_SIZE(fec_enet_register_offset_6ul);
2315
+	}
2316
+#else
2317
+	/* coldfire */
2318
+	static u32 *reg_list = fec_enet_register_offset;
2319
+	static const u32 reg_cnt = ARRAY_SIZE(fec_enet_register_offset);
2320
+#endif
2321
+	ret = pm_runtime_resume_and_get(dev);
2322
+	if (ret < 0)
2323
+		return;
2324
+
2325
+	regs->version = fec_enet_register_version;
22322326 
22332327 	memset(buf, 0, regs->len);
22342328 
2235
-	for (i = 0; i < ARRAY_SIZE(fec_enet_register_offset); i++) {
2236
-		off = fec_enet_register_offset[i];
2329
+	for (i = 0; i < reg_cnt; i++) {
2330
+		off = reg_list[i];
22372331 
22382332 		if ((off == FEC_R_BOUND || off == FEC_R_FSTART) &&
22392333 		    !(fep->quirks & FEC_QUIRK_HAS_FRREG))
....@@ -2242,6 +2336,9 @@
22422336 		off >>= 2;
22432337 		buf[off] = readl(&theregs[off]);
22442338 	}
2339
+
2340
+	pm_runtime_mark_last_busy(dev);
2341
+	pm_runtime_put_autosuspend(dev);
22452342 }
22462343 
22472344 static int fec_enet_get_ts_info(struct net_device *ndev,
....@@ -2305,13 +2402,8 @@
23052402 	fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0;
23062403 	fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0;
23072404 
2308
-	if (pause->rx_pause || pause->autoneg) {
2309
-		ndev->phydev->supported |= ADVERTISED_Pause;
2310
-		ndev->phydev->advertising |= ADVERTISED_Pause;
2311
-	} else {
2312
-		ndev->phydev->supported &= ~ADVERTISED_Pause;
2313
-		ndev->phydev->advertising &= ~ADVERTISED_Pause;
2314
-	}
2405
+	phy_set_sym_pause(ndev->phydev, pause->rx_pause, pause->tx_pause,
2406
+			  pause->autoneg);
23152407 
23162408 	if (pause->autoneg) {
23172409 		if (netif_running(ndev))
....@@ -2535,30 +2627,31 @@
25352627 fec_enet_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *ec)
25362628 {
25372629 	struct fec_enet_private *fep = netdev_priv(ndev);
2630
+	struct device *dev = &fep->pdev->dev;
25382631 	unsigned int cycle;
25392632 
25402633 	if (!(fep->quirks & FEC_QUIRK_HAS_COALESCE))
25412634 		return -EOPNOTSUPP;
25422635 
25432636 	if (ec->rx_max_coalesced_frames > 255) {
2544
-		pr_err("Rx coalesced frames exceed hardware limitation\n");
2637
+		dev_err(dev, "Rx coalesced frames exceed hardware limitation\n");
25452638 		return -EINVAL;
25462639 	}
25472640 
25482641 	if (ec->tx_max_coalesced_frames > 255) {
2549
-		pr_err("Tx coalesced frame exceed hardware limitation\n");
2642
+		dev_err(dev, "Tx coalesced frame exceed hardware limitation\n");
25502643 		return -EINVAL;
25512644 	}
25522645 
25532646 	cycle = fec_enet_us_to_itr_clock(ndev, ec->rx_coalesce_usecs);
25542647 	if (cycle > 0xFFFF) {
2555
-		pr_err("Rx coalesced usec exceed hardware limitation\n");
2648
+		dev_err(dev, "Rx coalesced usec exceed hardware limitation\n");
25562649 		return -EINVAL;
25572650 	}
25582651 
25592652 	cycle = fec_enet_us_to_itr_clock(ndev, ec->tx_coalesce_usecs);
25602653 	if (cycle > 0xFFFF) {
2561
-		pr_err("Tx coalesced usec exceed hardware limitation\n");
2654
+		dev_err(dev, "Tx coalesced usec exceed hardware limitation\n");
25622655 		return -EINVAL;
25632656 	}
25642657 
....@@ -2663,6 +2756,8 @@
26632756 }
26642757 
26652758 static const struct ethtool_ops fec_enet_ethtool_ops = {
2759
+	.supported_coalesce_params = ETHTOOL_COALESCE_USECS |
2760
+				     ETHTOOL_COALESCE_MAX_FRAMES,
26662761 	.get_drvinfo		= fec_enet_get_drvinfo,
26672762 	.get_regs_len		= fec_enet_get_regs_len,
26682763 	.get_regs		= fec_enet_get_regs,
....@@ -2698,10 +2793,16 @@
26982793 		return -ENODEV;
26992794 
27002795 	if (fep->bufdesc_ex) {
2701
-		if (cmd == SIOCSHWTSTAMP)
2702
-			return fec_ptp_set(ndev, rq);
2703
-		if (cmd == SIOCGHWTSTAMP)
2704
-			return fec_ptp_get(ndev, rq);
2796
+		bool use_fec_hwts = !phy_has_hwtstamp(phydev);
2797
+
2798
+		if (cmd == SIOCSHWTSTAMP) {
2799
+			if (use_fec_hwts)
2800
+				return fec_ptp_set(ndev, rq);
2801
+			fec_ptp_disable_hwts(ndev);
2802
+		} else if (cmd == SIOCGHWTSTAMP) {
2803
+			if (use_fec_hwts)
2804
+				return fec_ptp_get(ndev, rq);
2805
+		}
27052806 	}
27062807 
27072808 	return phy_mii_ioctl(phydev, rq, cmd);
....@@ -2736,7 +2837,6 @@
27362837 
27372838 	for (q = 0; q < fep->num_tx_queues; q++) {
27382839 		txq = fep->tx_queue[q];
2739
-		bdp = txq->bd.base;
27402840 		for (i = 0; i < txq->bd.ring_size; i++) {
27412841 			kfree(txq->tx_bounce[i]);
27422842 			txq->tx_bounce[i] = NULL;
....@@ -2919,7 +3019,7 @@
29193019 	int ret;
29203020 	bool reset_again;
29213021 
2922
-	ret = pm_runtime_get_sync(&fep->pdev->dev);
3022
+	ret = pm_runtime_resume_and_get(&fep->pdev->dev);
29233023 	if (ret < 0)
29243024 		return ret;
29253025 
....@@ -3166,10 +3266,40 @@
31663266 	return 0;
31673267 }
31683268 
3269
+static u16 fec_enet_get_raw_vlan_tci(struct sk_buff *skb)
3270
+{
3271
+	struct vlan_ethhdr *vhdr;
3272
+	unsigned short vlan_TCI = 0;
3273
+
3274
+	if (skb->protocol == htons(ETH_P_ALL)) {
3275
+		vhdr = (struct vlan_ethhdr *)(skb->data);
3276
+		vlan_TCI = ntohs(vhdr->h_vlan_TCI);
3277
+	}
3278
+
3279
+	return vlan_TCI;
3280
+}
3281
+
3282
+static u16 fec_enet_select_queue(struct net_device *ndev, struct sk_buff *skb,
3283
+				 struct net_device *sb_dev)
3284
+{
3285
+	struct fec_enet_private *fep = netdev_priv(ndev);
3286
+	u16 vlan_tag;
3287
+
3288
+	if (!(fep->quirks & FEC_QUIRK_HAS_AVB))
3289
+		return netdev_pick_tx(ndev, skb, NULL);
3290
+
3291
+	vlan_tag = fec_enet_get_raw_vlan_tci(skb);
3292
+	if (!vlan_tag)
3293
+		return vlan_tag;
3294
+
3295
+	return fec_enet_vlan_pri_to_queue[vlan_tag >> 13];
3296
+}
3297
+
31693298 static const struct net_device_ops fec_netdev_ops = {
31703299 	.ndo_open		= fec_enet_open,
31713300 	.ndo_stop		= fec_enet_close,
31723301 	.ndo_start_xmit		= fec_enet_start_xmit,
3302
+	.ndo_select_queue       = fec_enet_select_queue,
31733303 	.ndo_set_rx_mode	= set_multicast_list,
31743304 	.ndo_validate_addr	= eth_validate_addr,
31753305 	.ndo_tx_timeout		= fec_timeout,
....@@ -3234,8 +3364,6 @@
32343364 		ret = -ENOMEM;
32353365 		goto free_queue_mem;
32363366 	}
3237
-
3238
-	memset(cbd_base, 0, bd_size);
32393367 
32403368 	/* Get the Ethernet address */
32413369 	fec_get_mac(ndev);
....@@ -3429,18 +3557,22 @@
34293557 }
34303558 
34313559 static int fec_enet_init_stop_mode(struct fec_enet_private *fep,
3432
-				   struct fec_devinfo *dev_info,
34333560 				   struct device_node *np)
34343561 {
34353562 	struct device_node *gpr_np;
3563
+	u32 out_val[3];
34363564 	int ret = 0;
34373565 
3438
-	if (!dev_info)
3439
-		return 0;
3440
-
3441
-	gpr_np = of_parse_phandle(np, "gpr", 0);
3566
+	gpr_np = of_parse_phandle(np, "fsl,stop-mode", 0);
34423567 	if (!gpr_np)
34433568 		return 0;
3569
+
3570
+	ret = of_property_read_u32_array(np, "fsl,stop-mode", out_val,
3571
+					 ARRAY_SIZE(out_val));
3572
+	if (ret) {
3573
+		dev_dbg(&fep->pdev->dev, "no stop mode property\n");
3574
+		goto out;
3575
+	}
34443576 
34453577 	fep->stop_gpr.gpr = syscon_node_to_regmap(gpr_np);
34463578 	if (IS_ERR(fep->stop_gpr.gpr)) {
....@@ -3450,8 +3582,8 @@
34503582 		goto out;
34513583 	}
34523584 
3453
-	fep->stop_gpr.reg = dev_info->stop_gpr_reg;
3454
-	fep->stop_gpr.bit = dev_info->stop_gpr_bit;
3585
+	fep->stop_gpr.reg = out_val[1];
3586
+	fep->stop_gpr.bit = out_val[2];
34553587 
34563588 out:
34573589 	of_node_put(gpr_np);
....@@ -3464,9 +3596,9 @@
34643596 {
34653597 	struct fec_enet_private *fep;
34663598 	struct fec_platform_data *pdata;
3599
+	phy_interface_t interface;
34673600 	struct net_device *ndev;
34683601 	int i, irq, ret = 0;
3469
-	struct resource *r;
34703602 	const struct of_device_id *of_id;
34713603 	static int dev_id;
34723604 	struct device_node *np = pdev->dev.of_node, *phy_node;
....@@ -3509,8 +3641,7 @@
35093641 	/* Select default pin state */
35103642 	pinctrl_pm_select_default_state(&pdev->dev);
35113643 
3512
-	r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3513
-	fep->hwp = devm_ioremap_resource(&pdev->dev, r);
3644
+	fep->hwp = devm_platform_ioremap_resource(pdev, 0);
35143645 	if (IS_ERR(fep->hwp)) {
35153646 		ret = PTR_ERR(fep->hwp);
35163647 		goto failed_ioremap;
....@@ -3529,7 +3660,7 @@
35293660 	if (of_get_property(np, "fsl,magic-packet", NULL))
35303661 		fep->wol_flag |= FEC_WOL_HAS_MAGIC_PACKET;
35313662 
3532
-	ret = fec_enet_init_stop_mode(fep, dev_info, np);
3663
+	ret = fec_enet_init_stop_mode(fep, np);
35333664 	if (ret)
35343665 		goto failed_stop_mode;
35353666 
....@@ -3545,15 +3676,15 @@
35453676 	}
35463677 	fep->phy_node = phy_node;
35473678 
3548
-	ret = of_get_phy_mode(pdev->dev.of_node);
3549
-	if (ret < 0) {
3679
+	ret = of_get_phy_mode(pdev->dev.of_node, &interface);
3680
+	if (ret) {
35503681 		pdata = dev_get_platdata(&pdev->dev);
35513682 		if (pdata)
35523683 			fep->phy_interface = pdata->phy;
35533684 		else
35543685 			fep->phy_interface = PHY_INTERFACE_MODE_MII;
35553686 	} else {
3556
-		fep->phy_interface = ret;
3687
+		fep->phy_interface = interface;
35573688 	}
35583689 
35593690 	fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
....@@ -3601,13 +3732,12 @@
36013732 	if (ret)
36023733 		goto failed_clk_ahb;
36033734 
3604
-	fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");
3735
+	fep->reg_phy = devm_regulator_get_optional(&pdev->dev, "phy");
36053736 	if (!IS_ERR(fep->reg_phy)) {
36063737 		ret = regulator_enable(fep->reg_phy);
36073738 		if (ret) {
36083739 			dev_err(&pdev->dev,
36093740 				"Failed to enable phy regulator: %d\n", ret);
3610
-			clk_disable_unprepare(fep->clk_ipg);
36113741 			goto failed_regulator;
36123742 		}
36133743 	} else {
....@@ -3638,7 +3768,7 @@
36383768 
36393769 	for (i = 0; i < irq_cnt; i++) {
36403770 		snprintf(irq_name, sizeof(irq_name), "int%d", i);
3641
-		irq = platform_get_irq_byname(pdev, irq_name);
3771
+		irq = platform_get_irq_byname_optional(pdev, irq_name);
36423772 		if (irq < 0)
36433773 			irq = platform_get_irq(pdev, i);
36443774 		if (irq < 0) {
....@@ -3653,7 +3783,6 @@
36533783 		fep->irq[i] = irq;
36543784 	}
36553785 
3656
-	init_completion(&fep->mdio_done);
36573786 	ret = fec_enet_mii_init(pdev);
36583787 	if (ret)
36593788 		goto failed_mii_init;
....@@ -3662,6 +3791,8 @@
36623791 	netif_carrier_off(ndev);
36633792 	fec_enet_clk_enable(ndev, false);
36643793 	pinctrl_pm_select_sleep_state(&pdev->dev);
3794
+
3795
+	ndev->max_mtu = PKT_MAXBUF_SIZE - ETH_HLEN - ETH_FCS_LEN;
36653796 
36663797 	ret = register_netdev(ndev);
36673798 	if (ret)
....@@ -3721,7 +3852,9 @@
37213852 
37223853 	ret = pm_runtime_get_sync(&pdev->dev);
37233854 	if (ret < 0)
3724
-		return ret;
3855
+		dev_err(&pdev->dev,
3856
+			"Failed to resume device in remove callback (%pe)\n",
3857
+			ERR_PTR(ret));
37253858 
37263859 	cancel_work_sync(&fep->tx_timeout_work);
37273860 	fec_ptp_stop(pdev);
....@@ -3734,8 +3867,13 @@
37343867 		of_phy_deregister_fixed_link(np);
37353868 	of_node_put(fep->phy_node);
37363869 
3737
-	clk_disable_unprepare(fep->clk_ahb);
3738
-	clk_disable_unprepare(fep->clk_ipg);
3870
+	/* After pm_runtime_get_sync() failed, the clks are still off, so skip
3871
+	 * disabling them again.
3872
+	 */
3873
+	if (ret >= 0) {
3874
+		clk_disable_unprepare(fep->clk_ahb);
3875
+		clk_disable_unprepare(fep->clk_ipg);
3876
+	}
37393877 	pm_runtime_put_noidle(&pdev->dev);
37403878 	pm_runtime_disable(&pdev->dev);
37413879 
....@@ -3864,6 +4002,7 @@
38644002 		.name	= DRIVER_NAME,
38654003 		.pm	= &fec_pm_ops,
38664004 		.of_match_table = fec_dt_ids,
4005
+		.suppress_bind_attrs = true,
38674006 	},
38684007 	.id_table = fec_devtype,
38694008 	.probe	= fec_probe,