change wifi driver to cypress

hc

2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390

 kernel/drivers/infiniband/hw/qedr/main.c
..
..
@@ -39,7 +39,6 @@
39
39
 #include <linux/iommu.h>
40
40
 #include <linux/pci.h>
41
41
 #include <net/addrconf.h>
42
-#include <linux/idr.h>
43
42
 
44
43
 #include <linux/qed/qed_chain.h>
45
44
 #include <linux/qed/qed_if.h>
..
..
@@ -82,20 +81,6 @@
82
81
 		 (fw_ver >> 8) & 0xFF, fw_ver & 0xFF);
83
82
 }
84
83
 
85
-static struct net_device *qedr_get_netdev(struct ib_device *dev, u8 port_num)
86
-{
87
-	struct qedr_dev *qdev;
88
-
89
-	qdev = get_qedr_dev(dev);
90
-	dev_hold(qdev->ndev);
91
-
92
-	/* The HW vendor's device driver must guarantee
93
-	 * that this function returns NULL before the net device has finished
94
-	 * NETDEV_UNREGISTER state.
95
-	 */
96
-	return qdev->ndev;
97
-}
98
-
99
84
 static int qedr_roce_port_immutable(struct ib_device *ibdev, u8 port_num,
100
85
 				    struct ib_port_immutable *immutable)
101
86
 {
..
..
@@ -125,7 +110,6 @@
125
110
 	if (err)
126
111
 		return err;
127
112
 
128
-	immutable->pkey_tbl_len = 1;
129
113
 	immutable->gid_tbl_len = 1;
130
114
 	immutable->core_cap_flags = RDMA_CORE_PORT_IWARP;
131
115
 	immutable->max_mad_size = 0;
..
..
@@ -133,49 +117,137 @@
133
117
 	return 0;
134
118
 }
135
119
 
120
+/* QEDR sysfs interface */
121
+static ssize_t hw_rev_show(struct device *device, struct device_attribute *attr,
122
+			   char *buf)
123
+{
124
+	struct qedr_dev *dev =
125
+		rdma_device_to_drv_device(device, struct qedr_dev, ibdev);
126
+
127
+	return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->attr.hw_ver);
128
+}
129
+static DEVICE_ATTR_RO(hw_rev);
130
+
131
+static ssize_t hca_type_show(struct device *device,
132
+			     struct device_attribute *attr, char *buf)
133
+{
134
+	struct qedr_dev *dev =
135
+		rdma_device_to_drv_device(device, struct qedr_dev, ibdev);
136
+
137
+	return scnprintf(buf, PAGE_SIZE, "FastLinQ QL%x %s\n",
138
+			 dev->pdev->device,
139
+			 rdma_protocol_iwarp(&dev->ibdev, 1) ?
140
+			 "iWARP" : "RoCE");
141
+}
142
+static DEVICE_ATTR_RO(hca_type);
143
+
144
+static struct attribute *qedr_attributes[] = {
145
+	&dev_attr_hw_rev.attr,
146
+	&dev_attr_hca_type.attr,
147
+	NULL
148
+};
149
+
150
+static const struct attribute_group qedr_attr_group = {
151
+	.attrs = qedr_attributes,
152
+};
153
+
154
+static const struct ib_device_ops qedr_iw_dev_ops = {
155
+	.get_port_immutable = qedr_iw_port_immutable,
156
+	.iw_accept = qedr_iw_accept,
157
+	.iw_add_ref = qedr_iw_qp_add_ref,
158
+	.iw_connect = qedr_iw_connect,
159
+	.iw_create_listen = qedr_iw_create_listen,
160
+	.iw_destroy_listen = qedr_iw_destroy_listen,
161
+	.iw_get_qp = qedr_iw_get_qp,
162
+	.iw_reject = qedr_iw_reject,
163
+	.iw_rem_ref = qedr_iw_qp_rem_ref,
164
+	.query_gid = qedr_iw_query_gid,
165
+};
166
+
136
167
 static int qedr_iw_register_device(struct qedr_dev *dev)
137
168
 {
138
169
 	dev->ibdev.node_type = RDMA_NODE_RNIC;
139
-	dev->ibdev.query_gid = qedr_iw_query_gid;
140
170
 
141
-	dev->ibdev.get_port_immutable = qedr_iw_port_immutable;
171
+	ib_set_device_ops(&dev->ibdev, &qedr_iw_dev_ops);
142
172
 
143
-	dev->ibdev.iwcm = kzalloc(sizeof(*dev->ibdev.iwcm), GFP_KERNEL);
144
-	if (!dev->ibdev.iwcm)
145
-		return -ENOMEM;
146
-
147
-	dev->ibdev.iwcm->connect = qedr_iw_connect;
148
-	dev->ibdev.iwcm->accept = qedr_iw_accept;
149
-	dev->ibdev.iwcm->reject = qedr_iw_reject;
150
-	dev->ibdev.iwcm->create_listen = qedr_iw_create_listen;
151
-	dev->ibdev.iwcm->destroy_listen = qedr_iw_destroy_listen;
152
-	dev->ibdev.iwcm->add_ref = qedr_iw_qp_add_ref;
153
-	dev->ibdev.iwcm->rem_ref = qedr_iw_qp_rem_ref;
154
-	dev->ibdev.iwcm->get_qp = qedr_iw_get_qp;
155
-
156
-	memcpy(dev->ibdev.iwcm->ifname,
157
-	       dev->ndev->name, sizeof(dev->ibdev.iwcm->ifname));
173
+	memcpy(dev->ibdev.iw_ifname,
174
+	       dev->ndev->name, sizeof(dev->ibdev.iw_ifname));
158
175
 
159
176
 	return 0;
160
177
 }
178
+
179
+static const struct ib_device_ops qedr_roce_dev_ops = {
180
+	.alloc_xrcd = qedr_alloc_xrcd,
181
+	.dealloc_xrcd = qedr_dealloc_xrcd,
182
+	.get_port_immutable = qedr_roce_port_immutable,
183
+	.query_pkey = qedr_query_pkey,
184
+};
161
185
 
162
186
 static void qedr_roce_register_device(struct qedr_dev *dev)
163
187
 {
164
188
 	dev->ibdev.node_type = RDMA_NODE_IB_CA;
165
189
 
166
-	dev->ibdev.get_port_immutable = qedr_roce_port_immutable;
190
+	ib_set_device_ops(&dev->ibdev, &qedr_roce_dev_ops);
191
+
192
+	dev->ibdev.uverbs_cmd_mask |= QEDR_UVERBS(OPEN_XRCD) |
193
+		QEDR_UVERBS(CLOSE_XRCD) |
194
+		QEDR_UVERBS(CREATE_XSRQ);
167
195
 }
196
+
197
+static const struct ib_device_ops qedr_dev_ops = {
198
+	.owner = THIS_MODULE,
199
+	.driver_id = RDMA_DRIVER_QEDR,
200
+	.uverbs_abi_ver = QEDR_ABI_VERSION,
201
+
202
+	.alloc_mr = qedr_alloc_mr,
203
+	.alloc_pd = qedr_alloc_pd,
204
+	.alloc_ucontext = qedr_alloc_ucontext,
205
+	.create_ah = qedr_create_ah,
206
+	.create_cq = qedr_create_cq,
207
+	.create_qp = qedr_create_qp,
208
+	.create_srq = qedr_create_srq,
209
+	.dealloc_pd = qedr_dealloc_pd,
210
+	.dealloc_ucontext = qedr_dealloc_ucontext,
211
+	.dereg_mr = qedr_dereg_mr,
212
+	.destroy_ah = qedr_destroy_ah,
213
+	.destroy_cq = qedr_destroy_cq,
214
+	.destroy_qp = qedr_destroy_qp,
215
+	.destroy_srq = qedr_destroy_srq,
216
+	.get_dev_fw_str = qedr_get_dev_fw_str,
217
+	.get_dma_mr = qedr_get_dma_mr,
218
+	.get_link_layer = qedr_link_layer,
219
+	.map_mr_sg = qedr_map_mr_sg,
220
+	.mmap = qedr_mmap,
221
+	.mmap_free = qedr_mmap_free,
222
+	.modify_qp = qedr_modify_qp,
223
+	.modify_srq = qedr_modify_srq,
224
+	.poll_cq = qedr_poll_cq,
225
+	.post_recv = qedr_post_recv,
226
+	.post_send = qedr_post_send,
227
+	.post_srq_recv = qedr_post_srq_recv,
228
+	.process_mad = qedr_process_mad,
229
+	.query_device = qedr_query_device,
230
+	.query_port = qedr_query_port,
231
+	.query_qp = qedr_query_qp,
232
+	.query_srq = qedr_query_srq,
233
+	.reg_user_mr = qedr_reg_user_mr,
234
+	.req_notify_cq = qedr_arm_cq,
235
+	.resize_cq = qedr_resize_cq,
236
+
237
+	INIT_RDMA_OBJ_SIZE(ib_ah, qedr_ah, ibah),
238
+	INIT_RDMA_OBJ_SIZE(ib_cq, qedr_cq, ibcq),
239
+	INIT_RDMA_OBJ_SIZE(ib_pd, qedr_pd, ibpd),
240
+	INIT_RDMA_OBJ_SIZE(ib_srq, qedr_srq, ibsrq),
241
+	INIT_RDMA_OBJ_SIZE(ib_xrcd, qedr_xrcd, ibxrcd),
242
+	INIT_RDMA_OBJ_SIZE(ib_ucontext, qedr_ucontext, ibucontext),
243
+};
168
244
 
169
245
 static int qedr_register_device(struct qedr_dev *dev)
170
246
 {
171
247
 	int rc;
172
248
 
173
-	strlcpy(dev->ibdev.name, "qedr%d", IB_DEVICE_NAME_MAX);
174
-
175
249
 	dev->ibdev.node_guid = dev->attr.node_guid;
176
250
 	memcpy(dev->ibdev.node_desc, QEDR_NODE_DESC, sizeof(QEDR_NODE_DESC));
177
-	dev->ibdev.owner = THIS_MODULE;
178
-	dev->ibdev.uverbs_abi_ver = QEDR_ABI_VERSION;
179
251
 
180
252
 	dev->ibdev.uverbs_cmd_mask = QEDR_UVERBS(GET_CONTEXT) |
181
253
 				     QEDR_UVERBS(QUERY_DEVICE) |
..
..
@@ -212,59 +284,17 @@
212
284
 
213
285
 	dev->ibdev.phys_port_cnt = 1;
214
286
 	dev->ibdev.num_comp_vectors = dev->num_cnq;
215
-
216
-	dev->ibdev.query_device = qedr_query_device;
217
-	dev->ibdev.query_port = qedr_query_port;
218
-	dev->ibdev.modify_port = qedr_modify_port;
219
-
220
-	dev->ibdev.alloc_ucontext = qedr_alloc_ucontext;
221
-	dev->ibdev.dealloc_ucontext = qedr_dealloc_ucontext;
222
-	dev->ibdev.mmap = qedr_mmap;
223
-
224
-	dev->ibdev.alloc_pd = qedr_alloc_pd;
225
-	dev->ibdev.dealloc_pd = qedr_dealloc_pd;
226
-
227
-	dev->ibdev.create_cq = qedr_create_cq;
228
-	dev->ibdev.destroy_cq = qedr_destroy_cq;
229
-	dev->ibdev.resize_cq = qedr_resize_cq;
230
-	dev->ibdev.req_notify_cq = qedr_arm_cq;
231
-
232
-	dev->ibdev.create_qp = qedr_create_qp;
233
-	dev->ibdev.modify_qp = qedr_modify_qp;
234
-	dev->ibdev.query_qp = qedr_query_qp;
235
-	dev->ibdev.destroy_qp = qedr_destroy_qp;
236
-
237
-	dev->ibdev.create_srq = qedr_create_srq;
238
-	dev->ibdev.destroy_srq = qedr_destroy_srq;
239
-	dev->ibdev.modify_srq = qedr_modify_srq;
240
-	dev->ibdev.query_srq = qedr_query_srq;
241
-	dev->ibdev.post_srq_recv = qedr_post_srq_recv;
242
-	dev->ibdev.query_pkey = qedr_query_pkey;
243
-
244
-	dev->ibdev.create_ah = qedr_create_ah;
245
-	dev->ibdev.destroy_ah = qedr_destroy_ah;
246
-
247
-	dev->ibdev.get_dma_mr = qedr_get_dma_mr;
248
-	dev->ibdev.dereg_mr = qedr_dereg_mr;
249
-	dev->ibdev.reg_user_mr = qedr_reg_user_mr;
250
-	dev->ibdev.alloc_mr = qedr_alloc_mr;
251
-	dev->ibdev.map_mr_sg = qedr_map_mr_sg;
252
-
253
-	dev->ibdev.poll_cq = qedr_poll_cq;
254
-	dev->ibdev.post_send = qedr_post_send;
255
-	dev->ibdev.post_recv = qedr_post_recv;
256
-
257
-	dev->ibdev.process_mad = qedr_process_mad;
258
-
259
-	dev->ibdev.get_netdev = qedr_get_netdev;
260
-
261
287
 	dev->ibdev.dev.parent = &dev->pdev->dev;
262
288
 
263
-	dev->ibdev.get_link_layer = qedr_link_layer;
264
-	dev->ibdev.get_dev_fw_str = qedr_get_dev_fw_str;
289
+	rdma_set_device_sysfs_group(&dev->ibdev, &qedr_attr_group);
290
+	ib_set_device_ops(&dev->ibdev, &qedr_dev_ops);
265
291
 
266
-	dev->ibdev.driver_id = RDMA_DRIVER_QEDR;
267
-	return ib_register_device(&dev->ibdev, NULL);
292
+	rc = ib_device_set_netdev(&dev->ibdev, dev->ndev, 1);
293
+	if (rc)
294
+		return rc;
295
+
296
+	dma_set_max_seg_size(&dev->pdev->dev, UINT_MAX);
297
+	return ib_register_device(&dev->ibdev, "qedr%d", &dev->pdev->dev);
268
298
 }
269
299
 
270
300
 /* This function allocates fast-path status block memory */
..
..
@@ -297,7 +327,8 @@
297
327
 			     struct qed_sb_info *sb_info, int sb_id)
298
328
 {
299
329
 	if (sb_info->sb_virt) {
300
-		dev->ops->common->sb_release(dev->cdev, sb_info, sb_id);
330
+		dev->ops->common->sb_release(dev->cdev, sb_info, sb_id,
331
+					     QED_SB_TYPE_CNQ);
301
332
 		dma_free_coherent(&dev->pdev->dev, sizeof(*sb_info->sb_virt),
302
333
 				  (void *)sb_info->sb_virt, sb_info->sb_phys);
303
334
 	}
..
..
@@ -322,9 +353,14 @@
322
353
 
323
354
 static int qedr_alloc_resources(struct qedr_dev *dev)
324
355
 {
356
+	struct qed_chain_init_params params = {
357
+		.mode		= QED_CHAIN_MODE_PBL,
358
+		.intended_use	= QED_CHAIN_USE_TO_CONSUME,
359
+		.cnt_type	= QED_CHAIN_CNT_TYPE_U16,
360
+		.elem_size	= sizeof(struct regpair *),
361
+	};
325
362
 	struct qedr_cnq *cnq;
326
363
 	__le16 *cons_pi;
327
-	u16 n_entries;
328
364
 	int i, rc;
329
365
 
330
366
 	dev->sgid_tbl = kcalloc(QEDR_MAX_SGID, sizeof(union ib_gid),
..
..
@@ -333,11 +369,15 @@
333
369
 		return -ENOMEM;
334
370
 
335
371
 	spin_lock_init(&dev->sgid_lock);
372
+	xa_init_flags(&dev->srqs, XA_FLAGS_LOCK_IRQ);
336
373
 
337
374
 	if (IS_IWARP(dev)) {
338
-		spin_lock_init(&dev->qpidr.idr_lock);
339
-		idr_init(&dev->qpidr.idr);
375
+		xa_init(&dev->qps);
340
376
 		dev->iwarp_wq = create_singlethread_workqueue("qedr_iwarpq");
377
+		if (!dev->iwarp_wq) {
378
+			rc = -ENOMEM;
379
+			goto err1;
380
+		}
341
381
 	}
342
382
 
343
383
 	/* Allocate Status blocks for CNQ */
..
..
@@ -345,7 +385,7 @@
345
385
 				GFP_KERNEL);
346
386
 	if (!dev->sb_array) {
347
387
 		rc = -ENOMEM;
348
-		goto err1;
388
+		goto err_destroy_wq;
349
389
 	}
350
390
 
351
391
 	dev->cnq_array = kcalloc(dev->num_cnq,
..
..
@@ -358,7 +398,9 @@
358
398
 	dev->sb_start = dev->ops->rdma_get_start_sb(dev->cdev);
359
399
 
360
400
 	/* Allocate CNQ PBLs */
361
-	n_entries = min_t(u32, QED_RDMA_MAX_CNQ_SIZE, QEDR_ROCE_MAX_CNQ_SIZE);
401
+	params.num_elems = min_t(u32, QED_RDMA_MAX_CNQ_SIZE,
402
+				 QEDR_ROCE_MAX_CNQ_SIZE);
403
+
362
404
 	for (i = 0; i < dev->num_cnq; i++) {
363
405
 		cnq = &dev->cnq_array[i];
364
406
 
..
..
@@ -367,13 +409,8 @@
367
409
 		if (rc)
368
410
 			goto err3;
369
411
 
370
-		rc = dev->ops->common->chain_alloc(dev->cdev,
371
-						   QED_CHAIN_USE_TO_CONSUME,
372
-						   QED_CHAIN_MODE_PBL,
373
-						   QED_CHAIN_CNT_TYPE_U16,
374
-						   n_entries,
375
-						   sizeof(struct regpair *),
376
-						   &cnq->pbl, NULL);
412
+		rc = dev->ops->common->chain_alloc(dev->cdev, &cnq->pbl,
413
+						   &params);
377
414
 		if (rc)
378
415
 			goto err4;
379
416
 
..
..
@@ -399,40 +436,12 @@
399
436
 	kfree(dev->cnq_array);
400
437
 err2:
401
438
 	kfree(dev->sb_array);
439
+err_destroy_wq:
440
+	if (IS_IWARP(dev))
441
+		destroy_workqueue(dev->iwarp_wq);
402
442
 err1:
403
443
 	kfree(dev->sgid_tbl);
404
444
 	return rc;
405
-}
406
-
407
-/* QEDR sysfs interface */
408
-static ssize_t show_rev(struct device *device, struct device_attribute *attr,
409
-			char *buf)
410
-{
411
-	struct qedr_dev *dev = dev_get_drvdata(device);
412
-
413
-	return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->pdev->vendor);
414
-}
415
-
416
-static ssize_t show_hca_type(struct device *device,
417
-			     struct device_attribute *attr, char *buf)
418
-{
419
-	return scnprintf(buf, PAGE_SIZE, "%s\n", "HCA_TYPE_TO_SET");
420
-}
421
-
422
-static DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
423
-static DEVICE_ATTR(hca_type, S_IRUGO, show_hca_type, NULL);
424
-
425
-static struct device_attribute *qedr_attributes[] = {
426
-	&dev_attr_hw_rev,
427
-	&dev_attr_hca_type
428
-};
429
-
430
-static void qedr_remove_sysfiles(struct qedr_dev *dev)
431
-{
432
-	int i;
433
-
434
-	for (i = 0; i < ARRAY_SIZE(qedr_attributes); i++)
435
-		device_remove_file(&dev->ibdev.dev, qedr_attributes[i]);
436
445
 }
437
446
 
438
447
 static void qedr_pci_set_atomic(struct qedr_dev *dev, struct pci_dev *pdev)
..
..
@@ -521,11 +530,13 @@
521
530
 static void qedr_sync_free_irqs(struct qedr_dev *dev)
522
531
 {
523
532
 	u32 vector;
533
+	u16 idx;
524
534
 	int i;
525
535
 
526
536
 	for (i = 0; i < dev->int_info.used_cnt; i++) {
527
537
 		if (dev->int_info.msix_cnt) {
528
-			vector = dev->int_info.msix[i * dev->num_hwfns].vector;
538
+			idx = i * dev->num_hwfns + dev->affin_hwfn_idx;
539
+			vector = dev->int_info.msix[idx].vector;
529
540
 			synchronize_irq(vector);
530
541
 			free_irq(vector, &dev->cnq_array[i]);
531
542
 		}
..
..
@@ -537,6 +548,7 @@
537
548
 static int qedr_req_msix_irqs(struct qedr_dev *dev)
538
549
 {
539
550
 	int i, rc = 0;
551
+	u16 idx;
540
552
 
541
553
 	if (dev->num_cnq > dev->int_info.msix_cnt) {
542
554
 		DP_ERR(dev,
..
..
@@ -546,7 +558,8 @@
546
558
 	}
547
559
 
548
560
 	for (i = 0; i < dev->num_cnq; i++) {
549
-		rc = request_irq(dev->int_info.msix[i * dev->num_hwfns].vector,
561
+		idx = i * dev->num_hwfns + dev->affin_hwfn_idx;
562
+		rc = request_irq(dev->int_info.msix[idx].vector,
550
563
 				 qedr_irq_handler, 0, dev->cnq_array[i].name,
551
564
 				 &dev->cnq_array[i]);
552
565
 		if (rc) {
..
..
@@ -635,7 +648,6 @@
635
648
 	attr->max_mr_size = qed_attr->max_mr_size;
636
649
 	attr->max_cqe = min_t(u64, qed_attr->max_cqe, QEDR_MAX_CQES);
637
650
 	attr->max_mw = qed_attr->max_mw;
638
-	attr->max_fmr = qed_attr->max_fmr;
639
651
 	attr->max_mr_mw_fmr_pbl = qed_attr->max_mr_mw_fmr_pbl;
640
652
 	attr->max_mr_mw_fmr_size = qed_attr->max_mr_mw_fmr_size;
641
653
 	attr->max_pd = qed_attr->max_pd;
..
..
@@ -708,6 +720,18 @@
708
720
 			event.event = IB_EVENT_SRQ_ERR;
709
721
 			event_type = EVENT_TYPE_SRQ;
710
722
 			break;
723
+		case ROCE_ASYNC_EVENT_XRC_DOMAIN_ERR:
724
+			event.event = IB_EVENT_QP_ACCESS_ERR;
725
+			event_type = EVENT_TYPE_QP;
726
+			break;
727
+		case ROCE_ASYNC_EVENT_INVALID_XRCETH_ERR:
728
+			event.event = IB_EVENT_QP_ACCESS_ERR;
729
+			event_type = EVENT_TYPE_QP;
730
+			break;
731
+		case ROCE_ASYNC_EVENT_XRC_SRQ_CATASTROPHIC_ERR:
732
+			event.event = IB_EVENT_CQ_ERR;
733
+			event_type = EVENT_TYPE_CQ;
734
+			break;
711
735
 		default:
712
736
 			DP_ERR(dev, "unsupported event %d on handle=%llx\n",
713
737
 			       e_code, roce_handle64);
..
..
@@ -762,8 +786,8 @@
762
786
 		break;
763
787
 	case EVENT_TYPE_SRQ:
764
788
 		srq_id = (u16)roce_handle64;
765
-		spin_lock_irqsave(&dev->srqidr.idr_lock, flags);
766
-		srq = idr_find(&dev->srqidr.idr, srq_id);
789
+		xa_lock_irqsave(&dev->srqs, flags);
790
+		srq = xa_load(&dev->srqs, srq_id);
767
791
 		if (srq) {
768
792
 			ibsrq = &srq->ibsrq;
769
793
 			if (ibsrq->event_handler) {
..
..
@@ -777,7 +801,7 @@
777
801
 				  "SRQ event with NULL pointer ibsrq. Handle=%llx\n",
778
802
 				  roce_handle64);
779
803
 		}
780
-		spin_unlock_irqrestore(&dev->srqidr.idr_lock, flags);
804
+		xa_unlock_irqrestore(&dev->srqs, flags);
781
805
 		DP_NOTICE(dev, "SRQ event %d on handle %p\n", e_code, srq);
782
806
 	default:
783
807
 		break;
..
..
@@ -830,7 +854,7 @@
830
854
 	if (rc)
831
855
 		goto out;
832
856
 
833
-	dev->db_addr = (void __iomem *)(uintptr_t)out_params.dpi_addr;
857
+	dev->db_addr = out_params.dpi_addr;
834
858
 	dev->db_phys_addr = out_params.dpi_phys_addr;
835
859
 	dev->db_size = out_params.dpi_size;
836
860
 	dev->dpi = out_params.dpi;
..
..
@@ -855,9 +879,9 @@
855
879
 {
856
880
 	struct qed_dev_rdma_info dev_info;
857
881
 	struct qedr_dev *dev;
858
-	int rc = 0, i;
882
+	int rc = 0;
859
883
 
860
-	dev = (struct qedr_dev *)ib_alloc_device(sizeof(*dev));
884
+	dev = ib_alloc_device(qedr_dev, ibdev);
861
885
 	if (!dev) {
862
886
 		pr_err("Unable to allocate ib device\n");
863
887
 		return NULL;
..
..
@@ -883,6 +907,16 @@
883
907
 	dev->user_dpm_enabled = dev_info.user_dpm_enabled;
884
908
 	dev->rdma_type = dev_info.rdma_type;
885
909
 	dev->num_hwfns = dev_info.common.num_hwfns;
910
+
911
+	if (IS_IWARP(dev) && QEDR_IS_CMT(dev)) {
912
+		rc = dev->ops->iwarp_set_engine_affin(cdev, false);
913
+		if (rc) {
914
+			DP_ERR(dev, "iWARP is disabled over a 100g device Enabling it may impact L2 performance. To enable it run devlink dev param set <dev> name iwarp_cmt value true cmode runtime\n");
915
+			goto init_err;
916
+		}
917
+	}
918
+	dev->affin_hwfn_idx = dev->ops->common->get_affin_hwfn_idx(cdev);
919
+
886
920
 	dev->rdma_ctx = dev->ops->rdma_get_rdma_ctx(cdev);
887
921
 
888
922
 	dev->num_cnq = dev->ops->rdma_get_min_cnq_msix(cdev);
..
..
@@ -914,18 +948,12 @@
914
948
 		goto reg_err;
915
949
 	}
916
950
 
917
-	for (i = 0; i < ARRAY_SIZE(qedr_attributes); i++)
918
-		if (device_create_file(&dev->ibdev.dev, qedr_attributes[i]))
919
-			goto sysfs_err;
920
-
921
951
 	if (!test_and_set_bit(QEDR_ENET_STATE_BIT, &dev->enet_state))
922
952
 		qedr_ib_dispatch_event(dev, QEDR_PORT, IB_EVENT_PORT_ACTIVE);
923
953
 
924
954
 	DP_DEBUG(dev, QEDR_MSG_INIT, "qedr driver loaded successfully\n");
925
955
 	return dev;
926
956
 
927
-sysfs_err:
928
-	ib_unregister_device(&dev->ibdev);
929
957
 reg_err:
930
958
 	qedr_sync_free_irqs(dev);
931
959
 irq_err:
..
..
@@ -944,12 +972,15 @@
944
972
 	/* First unregister with stack to stop all the active traffic
945
973
 	 * of the registered clients.
946
974
 	 */
947
-	qedr_remove_sysfiles(dev);
948
975
 	ib_unregister_device(&dev->ibdev);
949
976
 
950
977
 	qedr_stop_hw(dev);
951
978
 	qedr_sync_free_irqs(dev);
952
979
 	qedr_free_resources(dev);
980
+
981
+	if (IS_IWARP(dev) && QEDR_IS_CMT(dev))
982
+		dev->ops->iwarp_set_engine_affin(dev->cdev, true);
983
+
953
984
 	ib_dealloc_device(&dev->ibdev);
954
985
 }
955
986
 
..
..
@@ -1022,6 +1053,13 @@
1022
1053
 	case QEDE_CHANGE_ADDR:
1023
1054
 		qedr_mac_address_change(dev);
1024
1055
 		break;
1056
+	case QEDE_CHANGE_MTU:
1057
+		if (rdma_protocol_iwarp(&dev->ibdev, 1))
1058
+			if (dev->ndev->mtu != dev->iwarp_max_mtu)
1059
+				DP_NOTICE(dev,
1060
+					  "Mtu was changed from %d to %d. This will not take affect for iWARP until qedr is reloaded\n",
1061
+					  dev->iwarp_max_mtu, dev->ndev->mtu);
1062
+		break;
1025
1063
 	default:
1026
1064
 		pr_err("Event not supported\n");
1027
1065
 	}