| .. | .. |
|---|
| 1121 | 1121 | "See modparam exp_hw_support\n"); |
|---|
| 1122 | 1122 | return -ENODEV; |
|---|
| 1123 | 1123 | } |
|---|
| 1124 | + /* differentiate between P10 and P11 asics with the same DID */ |
|---|
| 1125 | + if (pdev->device == 0x67FF && |
|---|
| 1126 | + (pdev->revision == 0xE3 || |
|---|
| 1127 | + pdev->revision == 0xE7 || |
|---|
| 1128 | + pdev->revision == 0xF3 || |
|---|
| 1129 | + pdev->revision == 0xF7)) { |
|---|
| 1130 | + flags &= ~AMD_ASIC_MASK; |
|---|
| 1131 | + flags |= CHIP_POLARIS10; |
|---|
| 1132 | + } |
|---|
| 1124 | 1133 | |
|---|
| 1125 | 1134 | /* Due to hardware bugs, S/G Display on raven requires a 1:1 IOMMU mapping, |
|---|
| 1126 | 1135 | * however, SME requires an indirect IOMMU mapping because the encryption |
|---|
| .. | .. |
|---|
| 1190 | 1199 | ddev->pdev = pdev; |
|---|
| 1191 | 1200 | pci_set_drvdata(pdev, ddev); |
|---|
| 1192 | 1201 | |
|---|
| 1193 | | - ret = amdgpu_driver_load_kms(adev, ent->driver_data); |
|---|
| 1202 | + ret = amdgpu_driver_load_kms(adev, flags); |
|---|
| 1194 | 1203 | if (ret) |
|---|
| 1195 | 1204 | goto err_pci; |
|---|
| 1196 | 1205 | |
|---|
| 1197 | 1206 | retry_init: |
|---|
| 1198 | | - ret = drm_dev_register(ddev, ent->driver_data); |
|---|
| 1207 | + ret = drm_dev_register(ddev, flags); |
|---|
| 1199 | 1208 | if (ret == -EAGAIN && ++retry <= 3) { |
|---|
| 1200 | 1209 | DRM_INFO("retry init %d\n", retry); |
|---|
| 1201 | 1210 | /* Don't request EX mode too frequently which is attacking */ |
|---|