~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,18 +1,10 @@
	1	+// SPDX-License-Identifier: GPL-2.0-only
1	2	/*
2	3	* Copyright (c) 2011-2015 Xilinx Inc.
3	4	* Copyright (c) 2015, National Instruments Corp.
4	5	*
5	6	* FPGA Manager Driver for Xilinx Zynq, heavily based on xdevcfg driver
6	7	* in their vendor tree.
7		- *
8		- * This program is free software; you can redistribute it and/or modify
9		- * it under the terms of the GNU General Public License as published by
10		- * the Free Software Foundation; version 2 of the License.
11		- *
12		- * This program is distributed in the hope that it will be useful,
13		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15		- * GNU General Public License for more details.
16	8	*/
17	9
18	10	#include <linux/clk.h>
..	..	@@ -501,6 +493,10 @@
501	493	if (err)
502	494	return err;
503	495
	496	+ /* Release 'PR' control back to the ICAP */
	497	+ zynq_fpga_write(priv, CTRL_OFFSET,
	498	+ zynq_fpga_read(priv, CTRL_OFFSET) & ~CTRL_PCAP_PR_MASK);
	499	+
504	500	err = zynq_fpga_poll_timeout(priv, INT_STS_OFFSET, intr_status,
505	501	intr_status & IXR_PCFG_DONE_MASK,
506	502	INIT_POLL_DELAY,
..	..	@@ -582,14 +578,13 @@
582	578	init_completion(&priv->dma_done);
583	579
584	580	priv->irq = platform_get_irq(pdev, 0);
585		- if (priv->irq < 0) {
586		- dev_err(dev, "No IRQ available\n");
	581	+ if (priv->irq < 0)
587	582	return priv->irq;
588		- }
589	583
590	584	priv->clk = devm_clk_get(dev, "ref_clk");
591	585	if (IS_ERR(priv->clk)) {
592		- dev_err(dev, "input clock not found\n");
	586	+ if (PTR_ERR(priv->clk) != -EPROBE_DEFER)
	587	+ dev_err(dev, "input clock not found\n");
593	588	return PTR_ERR(priv->clk);
594	589	}
595	590
..	..	@@ -614,8 +609,8 @@
614	609
615	610	clk_disable(priv->clk);
616	611
617		- mgr = fpga_mgr_create(dev, "Xilinx Zynq FPGA Manager",
618		- &zynq_fpga_ops, priv);
	612	+ mgr = devm_fpga_mgr_create(dev, "Xilinx Zynq FPGA Manager",
	613	+ &zynq_fpga_ops, priv);
619	614	if (!mgr)
620	615	return -ENOMEM;
621	616
..	..	@@ -624,7 +619,6 @@
624	619	err = fpga_mgr_register(mgr);
625	620	if (err) {
626	621	dev_err(dev, "unable to register FPGA manager\n");
627		- fpga_mgr_free(mgr);
628	622	clk_unprepare(priv->clk);
629	623	return err;
630	624	}