.. | .. |
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| 1 | +// SPDX-License-Identifier: GPL-2.0 |
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1 | 2 | /* |
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2 | 3 | * Platform driver for the Synopsys DesignWare DMA Controller |
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3 | 4 | * |
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.. | .. |
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6 | 7 | * Copyright (C) 2013 Intel Corporation |
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7 | 8 | * |
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8 | 9 | * Some parts of this driver are derived from the original dw_dmac. |
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9 | | - * |
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10 | | - * This program is free software; you can redistribute it and/or modify |
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11 | | - * it under the terms of the GNU General Public License version 2 as |
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12 | | - * published by the Free Software Foundation. |
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13 | 10 | */ |
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14 | 11 | |
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15 | 12 | #include <linux/module.h> |
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.. | .. |
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20 | 17 | #include <linux/dmaengine.h> |
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21 | 18 | #include <linux/dma-mapping.h> |
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22 | 19 | #include <linux/of.h> |
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23 | | -#include <linux/of_dma.h> |
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24 | 20 | #include <linux/acpi.h> |
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25 | | -#include <linux/acpi_dma.h> |
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26 | 21 | |
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27 | 22 | #include "internal.h" |
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28 | 23 | |
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29 | 24 | #define DRV_NAME "dw_dmac" |
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30 | 25 | |
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31 | | -static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec, |
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32 | | - struct of_dma *ofdma) |
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33 | | -{ |
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34 | | - struct dw_dma *dw = ofdma->of_dma_data; |
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35 | | - struct dw_dma_slave slave = { |
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36 | | - .dma_dev = dw->dma.dev, |
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37 | | - }; |
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38 | | - dma_cap_mask_t cap; |
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39 | | - |
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40 | | - if (dma_spec->args_count != 3) |
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41 | | - return NULL; |
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42 | | - |
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43 | | - slave.src_id = dma_spec->args[0]; |
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44 | | - slave.dst_id = dma_spec->args[0]; |
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45 | | - slave.m_master = dma_spec->args[1]; |
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46 | | - slave.p_master = dma_spec->args[2]; |
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47 | | - |
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48 | | - if (WARN_ON(slave.src_id >= DW_DMA_MAX_NR_REQUESTS || |
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49 | | - slave.dst_id >= DW_DMA_MAX_NR_REQUESTS || |
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50 | | - slave.m_master >= dw->pdata->nr_masters || |
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51 | | - slave.p_master >= dw->pdata->nr_masters)) |
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52 | | - return NULL; |
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53 | | - |
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54 | | - dma_cap_zero(cap); |
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55 | | - dma_cap_set(DMA_SLAVE, cap); |
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56 | | - |
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57 | | - /* TODO: there should be a simpler way to do this */ |
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58 | | - return dma_request_channel(cap, dw_dma_filter, &slave); |
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59 | | -} |
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60 | | - |
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61 | | -#ifdef CONFIG_ACPI |
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62 | | -static bool dw_dma_acpi_filter(struct dma_chan *chan, void *param) |
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63 | | -{ |
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64 | | - struct acpi_dma_spec *dma_spec = param; |
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65 | | - struct dw_dma_slave slave = { |
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66 | | - .dma_dev = dma_spec->dev, |
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67 | | - .src_id = dma_spec->slave_id, |
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68 | | - .dst_id = dma_spec->slave_id, |
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69 | | - .m_master = 0, |
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70 | | - .p_master = 1, |
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71 | | - }; |
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72 | | - |
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73 | | - return dw_dma_filter(chan, &slave); |
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74 | | -} |
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75 | | - |
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76 | | -static void dw_dma_acpi_controller_register(struct dw_dma *dw) |
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77 | | -{ |
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78 | | - struct device *dev = dw->dma.dev; |
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79 | | - struct acpi_dma_filter_info *info; |
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80 | | - int ret; |
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81 | | - |
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82 | | - info = devm_kzalloc(dev, sizeof(*info), GFP_KERNEL); |
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83 | | - if (!info) |
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84 | | - return; |
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85 | | - |
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86 | | - dma_cap_zero(info->dma_cap); |
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87 | | - dma_cap_set(DMA_SLAVE, info->dma_cap); |
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88 | | - info->filter_fn = dw_dma_acpi_filter; |
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89 | | - |
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90 | | - ret = acpi_dma_controller_register(dev, acpi_dma_simple_xlate, info); |
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91 | | - if (ret) |
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92 | | - dev_err(dev, "could not register acpi_dma_controller\n"); |
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93 | | -} |
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94 | | - |
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95 | | -static void dw_dma_acpi_controller_free(struct dw_dma *dw) |
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96 | | -{ |
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97 | | - struct device *dev = dw->dma.dev; |
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98 | | - |
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99 | | - acpi_dma_controller_free(dev); |
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100 | | -} |
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101 | | -#else /* !CONFIG_ACPI */ |
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102 | | -static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {} |
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103 | | -static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {} |
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104 | | -#endif /* !CONFIG_ACPI */ |
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105 | | - |
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106 | | -#ifdef CONFIG_OF |
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107 | | -static struct dw_dma_platform_data * |
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108 | | -dw_dma_parse_dt(struct platform_device *pdev) |
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109 | | -{ |
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110 | | - struct device_node *np = pdev->dev.of_node; |
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111 | | - struct dw_dma_platform_data *pdata; |
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112 | | - u32 tmp, arr[DW_DMA_MAX_NR_MASTERS], mb[DW_DMA_MAX_NR_CHANNELS]; |
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113 | | - u32 nr_masters; |
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114 | | - u32 nr_channels; |
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115 | | - |
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116 | | - if (!np) { |
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117 | | - dev_err(&pdev->dev, "Missing DT data\n"); |
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118 | | - return NULL; |
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119 | | - } |
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120 | | - |
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121 | | - if (of_property_read_u32(np, "dma-masters", &nr_masters)) |
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122 | | - return NULL; |
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123 | | - if (nr_masters < 1 || nr_masters > DW_DMA_MAX_NR_MASTERS) |
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124 | | - return NULL; |
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125 | | - |
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126 | | - if (of_property_read_u32(np, "dma-channels", &nr_channels)) |
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127 | | - return NULL; |
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128 | | - if (nr_channels > DW_DMA_MAX_NR_CHANNELS) |
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129 | | - return NULL; |
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130 | | - |
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131 | | - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
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132 | | - if (!pdata) |
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133 | | - return NULL; |
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134 | | - |
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135 | | - pdata->nr_masters = nr_masters; |
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136 | | - pdata->nr_channels = nr_channels; |
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137 | | - |
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138 | | - if (of_property_read_bool(np, "is_private")) |
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139 | | - pdata->is_private = true; |
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140 | | - |
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141 | | - /* |
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142 | | - * All known devices, which use DT for configuration, support |
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143 | | - * memory-to-memory transfers. So enable it by default. |
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144 | | - */ |
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145 | | - pdata->is_memcpy = true; |
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146 | | - |
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147 | | - if (!of_property_read_u32(np, "chan_allocation_order", &tmp)) |
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148 | | - pdata->chan_allocation_order = (unsigned char)tmp; |
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149 | | - |
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150 | | - if (!of_property_read_u32(np, "chan_priority", &tmp)) |
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151 | | - pdata->chan_priority = tmp; |
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152 | | - |
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153 | | - if (!of_property_read_u32(np, "block_size", &tmp)) |
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154 | | - pdata->block_size = tmp; |
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155 | | - |
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156 | | - if (!of_property_read_u32_array(np, "data-width", arr, nr_masters)) { |
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157 | | - for (tmp = 0; tmp < nr_masters; tmp++) |
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158 | | - pdata->data_width[tmp] = arr[tmp]; |
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159 | | - } else if (!of_property_read_u32_array(np, "data_width", arr, nr_masters)) { |
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160 | | - for (tmp = 0; tmp < nr_masters; tmp++) |
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161 | | - pdata->data_width[tmp] = BIT(arr[tmp] & 0x07); |
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162 | | - } |
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163 | | - |
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164 | | - if (!of_property_read_u32_array(np, "multi-block", mb, nr_channels)) { |
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165 | | - for (tmp = 0; tmp < nr_channels; tmp++) |
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166 | | - pdata->multi_block[tmp] = mb[tmp]; |
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167 | | - } else { |
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168 | | - for (tmp = 0; tmp < nr_channels; tmp++) |
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169 | | - pdata->multi_block[tmp] = 1; |
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170 | | - } |
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171 | | - |
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172 | | - if (!of_property_read_u32(np, "snps,dma-protection-control", &tmp)) { |
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173 | | - if (tmp > CHAN_PROTCTL_MASK) |
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174 | | - return NULL; |
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175 | | - pdata->protctl = tmp; |
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176 | | - } |
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177 | | - |
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178 | | - return pdata; |
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179 | | -} |
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180 | | -#else |
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181 | | -static inline struct dw_dma_platform_data * |
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182 | | -dw_dma_parse_dt(struct platform_device *pdev) |
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183 | | -{ |
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184 | | - return NULL; |
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185 | | -} |
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186 | | -#endif |
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187 | | - |
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188 | 26 | static int dw_probe(struct platform_device *pdev) |
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189 | 27 | { |
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| 28 | + const struct dw_dma_chip_pdata *match; |
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| 29 | + struct dw_dma_chip_pdata *data; |
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190 | 30 | struct dw_dma_chip *chip; |
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191 | 31 | struct device *dev = &pdev->dev; |
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192 | | - struct resource *mem; |
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193 | | - const struct dw_dma_platform_data *pdata; |
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194 | 32 | int err; |
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| 33 | + |
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| 34 | + match = device_get_match_data(dev); |
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| 35 | + if (!match) |
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| 36 | + return -ENODEV; |
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| 37 | + |
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| 38 | + data = devm_kmemdup(&pdev->dev, match, sizeof(*match), GFP_KERNEL); |
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| 39 | + if (!data) |
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| 40 | + return -ENOMEM; |
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195 | 41 | |
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196 | 42 | chip = devm_kzalloc(dev, sizeof(*chip), GFP_KERNEL); |
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197 | 43 | if (!chip) |
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.. | .. |
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201 | 47 | if (chip->irq < 0) |
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202 | 48 | return chip->irq; |
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203 | 49 | |
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204 | | - mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
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205 | | - chip->regs = devm_ioremap_resource(dev, mem); |
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| 50 | + chip->regs = devm_platform_ioremap_resource(pdev, 0); |
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206 | 51 | if (IS_ERR(chip->regs)) |
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207 | 52 | return PTR_ERR(chip->regs); |
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208 | 53 | |
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.. | .. |
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210 | 55 | if (err) |
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211 | 56 | return err; |
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212 | 57 | |
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213 | | - pdata = dev_get_platdata(dev); |
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214 | | - if (!pdata) |
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215 | | - pdata = dw_dma_parse_dt(pdev); |
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| 58 | + if (!data->pdata) |
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| 59 | + data->pdata = dev_get_platdata(dev); |
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| 60 | + if (!data->pdata) |
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| 61 | + data->pdata = dw_dma_parse_dt(pdev); |
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216 | 62 | |
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217 | 63 | chip->dev = dev; |
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218 | 64 | chip->id = pdev->id; |
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219 | | - chip->pdata = pdata; |
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| 65 | + chip->pdata = data->pdata; |
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220 | 66 | |
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221 | | - chip->clk = devm_clk_get(chip->dev, "hclk"); |
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| 67 | + data->chip = chip; |
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| 68 | + |
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| 69 | + chip->clk = devm_clk_get_optional(chip->dev, "hclk"); |
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222 | 70 | if (IS_ERR(chip->clk)) |
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223 | 71 | return PTR_ERR(chip->clk); |
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224 | 72 | err = clk_prepare_enable(chip->clk); |
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.. | .. |
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227 | 75 | |
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228 | 76 | pm_runtime_enable(&pdev->dev); |
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229 | 77 | |
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230 | | - err = dw_dma_probe(chip); |
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| 78 | + err = data->probe(chip); |
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231 | 79 | if (err) |
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232 | 80 | goto err_dw_dma_probe; |
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233 | 81 | |
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234 | | - platform_set_drvdata(pdev, chip); |
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| 82 | + platform_set_drvdata(pdev, data); |
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235 | 83 | |
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236 | | - if (pdev->dev.of_node) { |
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237 | | - err = of_dma_controller_register(pdev->dev.of_node, |
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238 | | - dw_dma_of_xlate, chip->dw); |
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239 | | - if (err) |
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240 | | - dev_err(&pdev->dev, |
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241 | | - "could not register of_dma_controller\n"); |
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242 | | - } |
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| 84 | + dw_dma_of_controller_register(chip->dw); |
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243 | 85 | |
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244 | | - if (ACPI_HANDLE(&pdev->dev)) |
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245 | | - dw_dma_acpi_controller_register(chip->dw); |
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| 86 | + dw_dma_acpi_controller_register(chip->dw); |
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246 | 87 | |
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247 | 88 | return 0; |
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248 | 89 | |
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.. | .. |
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254 | 95 | |
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255 | 96 | static int dw_remove(struct platform_device *pdev) |
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256 | 97 | { |
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257 | | - struct dw_dma_chip *chip = platform_get_drvdata(pdev); |
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| 98 | + struct dw_dma_chip_pdata *data = platform_get_drvdata(pdev); |
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| 99 | + struct dw_dma_chip *chip = data->chip; |
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| 100 | + int ret; |
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258 | 101 | |
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259 | | - if (ACPI_HANDLE(&pdev->dev)) |
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260 | | - dw_dma_acpi_controller_free(chip->dw); |
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| 102 | + dw_dma_acpi_controller_free(chip->dw); |
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261 | 103 | |
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262 | | - if (pdev->dev.of_node) |
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263 | | - of_dma_controller_free(pdev->dev.of_node); |
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| 104 | + dw_dma_of_controller_free(chip->dw); |
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264 | 105 | |
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265 | | - dw_dma_remove(chip); |
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| 106 | + ret = data->remove(chip); |
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| 107 | + if (ret) |
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| 108 | + dev_warn(chip->dev, "can't remove device properly: %d\n", ret); |
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| 109 | + |
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266 | 110 | pm_runtime_disable(&pdev->dev); |
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267 | 111 | clk_disable_unprepare(chip->clk); |
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268 | 112 | |
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.. | .. |
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271 | 115 | |
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272 | 116 | static void dw_shutdown(struct platform_device *pdev) |
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273 | 117 | { |
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274 | | - struct dw_dma_chip *chip = platform_get_drvdata(pdev); |
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| 118 | + struct dw_dma_chip_pdata *data = platform_get_drvdata(pdev); |
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| 119 | + struct dw_dma_chip *chip = data->chip; |
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275 | 120 | |
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276 | 121 | /* |
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277 | | - * We have to call dw_dma_disable() to stop any ongoing transfer. On |
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| 122 | + * We have to call do_dw_dma_disable() to stop any ongoing transfer. On |
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278 | 123 | * some platforms we can't do that since DMA device is powered off. |
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279 | 124 | * Moreover we have no possibility to check if the platform is affected |
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280 | 125 | * or not. That's why we call pm_runtime_get_sync() / pm_runtime_put() |
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.. | .. |
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283 | 128 | * used by the driver. |
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284 | 129 | */ |
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285 | 130 | pm_runtime_get_sync(chip->dev); |
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286 | | - dw_dma_disable(chip); |
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| 131 | + do_dw_dma_disable(chip); |
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287 | 132 | pm_runtime_put_sync_suspend(chip->dev); |
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288 | 133 | |
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289 | 134 | clk_disable_unprepare(chip->clk); |
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.. | .. |
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291 | 136 | |
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292 | 137 | #ifdef CONFIG_OF |
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293 | 138 | static const struct of_device_id dw_dma_of_id_table[] = { |
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294 | | - { .compatible = "snps,dma-spear1340" }, |
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| 139 | + { .compatible = "snps,dma-spear1340", .data = &dw_dma_chip_pdata }, |
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295 | 140 | {} |
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296 | 141 | }; |
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297 | 142 | MODULE_DEVICE_TABLE(of, dw_dma_of_id_table); |
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.. | .. |
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299 | 144 | |
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300 | 145 | #ifdef CONFIG_ACPI |
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301 | 146 | static const struct acpi_device_id dw_dma_acpi_id_table[] = { |
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302 | | - { "INTL9C60", 0 }, |
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| 147 | + { "INTL9C60", (kernel_ulong_t)&dw_dma_chip_pdata }, |
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| 148 | + { "80862286", (kernel_ulong_t)&dw_dma_chip_pdata }, |
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| 149 | + { "808622C0", (kernel_ulong_t)&dw_dma_chip_pdata }, |
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| 150 | + |
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| 151 | + /* Elkhart Lake iDMA 32-bit (PSE DMA) */ |
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| 152 | + { "80864BB4", (kernel_ulong_t)&idma32_chip_pdata }, |
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| 153 | + { "80864BB5", (kernel_ulong_t)&idma32_chip_pdata }, |
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| 154 | + { "80864BB6", (kernel_ulong_t)&idma32_chip_pdata }, |
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| 155 | + |
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303 | 156 | { } |
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304 | 157 | }; |
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305 | 158 | MODULE_DEVICE_TABLE(acpi, dw_dma_acpi_id_table); |
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.. | .. |
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309 | 162 | |
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310 | 163 | static int dw_suspend_late(struct device *dev) |
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311 | 164 | { |
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312 | | - struct dw_dma_chip *chip = dev_get_drvdata(dev); |
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| 165 | + struct dw_dma_chip_pdata *data = dev_get_drvdata(dev); |
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| 166 | + struct dw_dma_chip *chip = data->chip; |
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313 | 167 | |
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314 | | - dw_dma_disable(chip); |
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| 168 | + do_dw_dma_disable(chip); |
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315 | 169 | clk_disable_unprepare(chip->clk); |
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316 | 170 | |
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317 | 171 | return 0; |
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.. | .. |
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319 | 173 | |
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320 | 174 | static int dw_resume_early(struct device *dev) |
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321 | 175 | { |
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322 | | - struct dw_dma_chip *chip = dev_get_drvdata(dev); |
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| 176 | + struct dw_dma_chip_pdata *data = dev_get_drvdata(dev); |
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| 177 | + struct dw_dma_chip *chip = data->chip; |
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323 | 178 | int ret; |
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324 | 179 | |
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325 | 180 | ret = clk_prepare_enable(chip->clk); |
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326 | 181 | if (ret) |
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327 | 182 | return ret; |
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328 | 183 | |
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329 | | - return dw_dma_enable(chip); |
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| 184 | + return do_dw_dma_enable(chip); |
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330 | 185 | } |
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331 | 186 | |
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332 | 187 | #endif /* CONFIG_PM_SLEEP */ |
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