hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390
kernel/drivers/clk/samsung/clk-s3c2410-dclk.c
....@@ -1,9 +1,6 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright (c) 2013 Heiko Stuebner <heiko@sntech.de>
3
- *
4
- * This program is free software; you can redistribute it and/or modify
5
- * it under the terms of the GNU General Public License version 2 as
6
- * published by the Free Software Foundation.
74 *
85 * Common Clock Framework support for s3c24xx external clock output.
96 */
....@@ -12,13 +9,11 @@
129 #include <linux/slab.h>
1310 #include <linux/clk.h>
1411 #include <linux/clk-provider.h>
12
+#include <linux/io.h>
1513 #include <linux/platform_device.h>
14
+#include <linux/platform_data/clk-s3c2410.h>
1615 #include <linux/module.h>
1716 #include "clk.h"
18
-
19
-/* legacy access to misccr, until dt conversion is finished */
20
-#include <mach/hardware.h>
21
-#include <mach/regs-gpio.h>
2217
2318 #define MUX_DCLK0 0
2419 #define MUX_DCLK1 1
....@@ -54,6 +49,7 @@
5449 struct clk_hw hw;
5550 u32 mask;
5651 u8 shift;
52
+ unsigned int (*modify_misccr)(unsigned int clr, unsigned int chg);
5753 };
5854
5955 #define to_s3c24xx_clkout(_hw) container_of(_hw, struct s3c24xx_clkout, hw)
....@@ -64,7 +60,7 @@
6460 int num_parents = clk_hw_get_num_parents(hw);
6561 u32 val;
6662
67
- val = readl_relaxed(S3C24XX_MISCCR) >> clkout->shift;
63
+ val = clkout->modify_misccr(0, 0) >> clkout->shift;
6864 val >>= clkout->shift;
6965 val &= clkout->mask;
7066
....@@ -78,7 +74,7 @@
7874 {
7975 struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw);
8076
81
- s3c2410_modify_misccr((clkout->mask << clkout->shift),
77
+ clkout->modify_misccr((clkout->mask << clkout->shift),
8278 (index << clkout->shift));
8379
8480 return 0;
....@@ -94,9 +90,13 @@
9490 const char *name, const char **parent_names, u8 num_parents,
9591 u8 shift, u32 mask)
9692 {
93
+ struct s3c2410_clk_platform_data *pdata = dev_get_platdata(dev);
9794 struct s3c24xx_clkout *clkout;
98
- struct clk_init_data init = {};
95
+ struct clk_init_data init;
9996 int ret;
97
+
98
+ if (!pdata)
99
+ return ERR_PTR(-EINVAL);
100100
101101 /* allocate the clkout */
102102 clkout = kzalloc(sizeof(*clkout), GFP_KERNEL);
....@@ -105,13 +105,14 @@
105105
106106 init.name = name;
107107 init.ops = &s3c24xx_clkout_ops;
108
- init.flags = CLK_IS_BASIC;
108
+ init.flags = 0;
109109 init.parent_names = parent_names;
110110 init.num_parents = num_parents;
111111
112112 clkout->shift = shift;
113113 clkout->mask = mask;
114114 clkout->hw.init = &init;
115
+ clkout->modify_misccr = pdata->modify_misccr;
115116
116117 ret = clk_hw_register(dev, &clkout->hw);
117118 if (ret)
....@@ -240,7 +241,6 @@
240241 static int s3c24xx_dclk_probe(struct platform_device *pdev)
241242 {
242243 struct s3c24xx_dclk *s3c24xx_dclk;
243
- struct resource *mem;
244244 struct s3c24xx_dclk_drv_data *dclk_variant;
245245 struct clk_hw **clk_table;
246246 int ret, i;
....@@ -259,8 +259,7 @@
259259 platform_set_drvdata(pdev, s3c24xx_dclk);
260260 spin_lock_init(&s3c24xx_dclk->dclk_lock);
261261
262
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
263
- s3c24xx_dclk->base = devm_ioremap_resource(&pdev->dev, mem);
262
+ s3c24xx_dclk->base = devm_platform_ioremap_resource(pdev, 0);
264263 if (IS_ERR(s3c24xx_dclk->base))
265264 return PTR_ERR(s3c24xx_dclk->base);
266265