hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390
kernel/drivers/acpi/pci_mcfg.c
....@@ -1,20 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-only
12 /*
23 * Copyright (C) 2016 Broadcom
34 * Author: Jayachandran C <jchandra@broadcom.com>
45 * Copyright (C) 2016 Semihalf
56 * Author: Tomasz Nowicki <tn@semihalf.com>
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License, version 2, as
9
- * published by the Free Software Foundation (the "GPL").
10
- *
11
- * This program is distributed in the hope that it will be useful, but
12
- * WITHOUT ANY WARRANTY; without even the implied warranty of
13
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14
- * General Public License version 2 (GPLv2) for more details.
15
- *
16
- * You should have received a copy of the GNU General Public License
17
- * version 2 (GPLv2) along with this source code.
187 */
198
209 #define pr_fmt(fmt) "ACPI: " fmt
....@@ -40,7 +29,7 @@
4029 u32 oem_revision;
4130 u16 segment;
4231 struct resource bus_range;
43
- struct pci_ecam_ops *ops;
32
+ const struct pci_ecam_ops *ops;
4433 struct resource cfgres;
4534 };
4635
....@@ -51,6 +40,20 @@
5140
5241 static struct mcfg_fixup mcfg_quirks[] = {
5342 /* { OEM_ID, OEM_TABLE_ID, REV, SEGMENT, BUS_RANGE, ops, cfgres }, */
43
+
44
+#ifdef CONFIG_ARM64
45
+
46
+#define AL_ECAM(table_id, rev, seg, ops) \
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+ { "AMAZON", table_id, rev, seg, MCFG_BUS_ANY, ops }
48
+
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+ AL_ECAM("GRAVITON", 0, 0, &al_pcie_ops),
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+ AL_ECAM("GRAVITON", 0, 1, &al_pcie_ops),
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+ AL_ECAM("GRAVITON", 0, 2, &al_pcie_ops),
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+ AL_ECAM("GRAVITON", 0, 3, &al_pcie_ops),
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+ AL_ECAM("GRAVITON", 0, 4, &al_pcie_ops),
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+ AL_ECAM("GRAVITON", 0, 5, &al_pcie_ops),
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+ AL_ECAM("GRAVITON", 0, 6, &al_pcie_ops),
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+ AL_ECAM("GRAVITON", 0, 7, &al_pcie_ops),
5457
5558 #define QCOM_ECAM32(seg) \
5659 { "QCOM ", "QDF2432 ", 1, seg, MCFG_BUS_ANY, &pci_32b_ops }
....@@ -63,6 +66,11 @@
6366 QCOM_ECAM32(5),
6467 QCOM_ECAM32(6),
6568 QCOM_ECAM32(7),
69
+
70
+#define RKCP_ECAM(seg, table_id, ops) \
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+ { "RKCP ", table_id, 0x0000, seg, MCFG_BUS_ANY, ops }
72
+
73
+ RKCP_ECAM(0, "RK3588 ", &rk_pcie_ecam_ops), /* pcie3x4: Name (_SEG, Zero) */
6674
6775 #define HISI_QUAD_DOM(table_id, seg, ops) \
6876 { "HISI ", table_id, 0, (seg) + 0, MCFG_BUS_ANY, ops }, \
....@@ -141,6 +149,27 @@
141149 XGENE_V2_ECAM_MCFG(4, 0),
142150 XGENE_V2_ECAM_MCFG(4, 1),
143151 XGENE_V2_ECAM_MCFG(4, 2),
152
+
153
+#define ALTRA_ECAM_QUIRK(rev, seg) \
154
+ { "Ampere", "Altra ", rev, seg, MCFG_BUS_ANY, &pci_32b_read_ops }
155
+
156
+ ALTRA_ECAM_QUIRK(1, 0),
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+ ALTRA_ECAM_QUIRK(1, 1),
158
+ ALTRA_ECAM_QUIRK(1, 2),
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+ ALTRA_ECAM_QUIRK(1, 3),
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+ ALTRA_ECAM_QUIRK(1, 4),
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+ ALTRA_ECAM_QUIRK(1, 5),
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+ ALTRA_ECAM_QUIRK(1, 6),
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+ ALTRA_ECAM_QUIRK(1, 7),
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+ ALTRA_ECAM_QUIRK(1, 8),
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+ ALTRA_ECAM_QUIRK(1, 9),
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+ ALTRA_ECAM_QUIRK(1, 10),
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+ ALTRA_ECAM_QUIRK(1, 11),
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+ ALTRA_ECAM_QUIRK(1, 12),
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+ ALTRA_ECAM_QUIRK(1, 13),
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+ ALTRA_ECAM_QUIRK(1, 14),
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+ ALTRA_ECAM_QUIRK(1, 15),
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+#endif /* ARM64 */
144173 };
145174
146175 static char mcfg_oem_id[ACPI_OEM_ID_SIZE];
....@@ -152,7 +181,7 @@
152181 {
153182 if (!memcmp(f->oem_id, mcfg_oem_id, ACPI_OEM_ID_SIZE) &&
154183 !memcmp(f->oem_table_id, mcfg_oem_table_id,
155
- ACPI_OEM_TABLE_ID_SIZE) &&
184
+ ACPI_OEM_TABLE_ID_SIZE) &&
156185 f->oem_revision == mcfg_oem_revision &&
157186 f->segment == segment &&
158187 resource_contains(&f->bus_range, bus_range))
....@@ -164,7 +193,7 @@
164193
165194 static void pci_mcfg_apply_quirks(struct acpi_pci_root *root,
166195 struct resource *cfgres,
167
- struct pci_ecam_ops **ecam_ops)
196
+ const struct pci_ecam_ops **ecam_ops)
168197 {
169198 #ifdef CONFIG_PCI_QUIRKS
170199 u16 segment = root->segment;
....@@ -190,9 +219,9 @@
190219 static LIST_HEAD(pci_mcfg_list);
191220
192221 int pci_mcfg_lookup(struct acpi_pci_root *root, struct resource *cfgres,
193
- struct pci_ecam_ops **ecam_ops)
222
+ const struct pci_ecam_ops **ecam_ops)
194223 {
195
- struct pci_ecam_ops *ops = &pci_generic_ecam_ops;
224
+ const struct pci_ecam_ops *ops = &pci_generic_ecam_ops;
196225 struct resource *bus_res = &root->secondary;
197226 u16 seg = root->segment;
198227 struct mcfg_entry *e;
....@@ -279,5 +308,5 @@
279308 {
280309 int err = acpi_table_parse(ACPI_SIG_MCFG, pci_mcfg_parse);
281310 if (err)
282
- pr_err("Failed to parse MCFG (%d)\n", err);
311
+ pr_debug("Failed to parse MCFG (%d)\n", err);
283312 }