| .. | .. |
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| 28 | 28 | extern void kernel_fpu_end(void); |
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| 29 | 29 | extern bool irq_fpu_usable(void); |
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| 30 | 30 | extern void fpregs_mark_activate(void); |
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| 31 | | -extern void kernel_fpu_resched(void); |
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| 32 | 31 | |
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| 33 | 32 | /* Code that is unaware of kernel_fpu_begin_mask() can use this */ |
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| 34 | 33 | static inline void kernel_fpu_begin(void) |
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| .. | .. |
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| 41 | 40 | * A context switch will (and softirq might) save CPU's FPU registers to |
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| 42 | 41 | * fpu->state and set TIF_NEED_FPU_LOAD leaving CPU's FPU registers in |
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| 43 | 42 | * a random state. |
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| 44 | | - * |
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| 45 | | - * local_bh_disable() protects against both preemption and soft interrupts |
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| 46 | | - * on !RT kernels. |
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| 47 | | - * |
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| 48 | | - * On RT kernels local_bh_disable() is not sufficient because it only |
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| 49 | | - * serializes soft interrupt related sections via a local lock, but stays |
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| 50 | | - * preemptible. Disabling preemption is the right choice here as bottom |
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| 51 | | - * half processing is always in thread context on RT kernels so it |
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| 52 | | - * implicitly prevents bottom half processing as well. |
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| 53 | | - * |
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| 54 | | - * Disabling preemption also serializes against kernel_fpu_begin(). |
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| 55 | 43 | */ |
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| 56 | 44 | static inline void fpregs_lock(void) |
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| 57 | 45 | { |
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| 58 | | - if (!IS_ENABLED(CONFIG_PREEMPT_RT)) |
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| 59 | | - local_bh_disable(); |
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| 60 | | - else |
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| 61 | | - preempt_disable(); |
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| 46 | + preempt_disable(); |
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| 47 | + local_bh_disable(); |
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| 62 | 48 | } |
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| 63 | 49 | |
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| 64 | 50 | static inline void fpregs_unlock(void) |
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| 65 | 51 | { |
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| 66 | | - if (!IS_ENABLED(CONFIG_PREEMPT_RT)) |
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| 67 | | - local_bh_enable(); |
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| 68 | | - else |
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| 69 | | - preempt_enable(); |
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| 52 | + local_bh_enable(); |
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| 53 | + preempt_enable(); |
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| 70 | 54 | } |
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| 71 | 55 | |
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| 72 | 56 | #ifdef CONFIG_X86_DEBUG_FPU |
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