.. | .. |
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10 | 10 | #include <linux/slab.h> |
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11 | 11 | #include <linux/delay.h> |
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12 | 12 | #include <linux/device.h> |
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13 | | -#include <linux/dma-mapping.h> |
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| 13 | +#include <linux/dma-map-ops.h> |
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14 | 14 | #include <linux/errno.h> |
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15 | 15 | #include <linux/iommu-helper.h> |
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16 | 16 | #include <linux/bitmap.h> |
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.. | .. |
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108 | 108 | /* Allocate and initialize the free area map. */ |
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109 | 109 | sz = num_tsb_entries / 8; |
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110 | 110 | sz = (sz + 7UL) & ~7UL; |
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111 | | - iommu->tbl.map = kmalloc_node(sz, GFP_KERNEL, numa_node); |
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| 111 | + iommu->tbl.map = kzalloc_node(sz, GFP_KERNEL, numa_node); |
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112 | 112 | if (!iommu->tbl.map) |
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113 | 113 | return -ENOMEM; |
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114 | | - memset(iommu->tbl.map, 0, sz); |
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115 | 114 | |
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116 | 115 | iommu_tbl_pool_init(&iommu->tbl, num_tsb_entries, IO_PAGE_SHIFT, |
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117 | 116 | (tlb_type != hypervisor ? iommu_flushall : NULL), |
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.. | .. |
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315 | 314 | bad_no_ctx: |
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316 | 315 | if (printk_ratelimit()) |
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317 | 316 | WARN_ON(1); |
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318 | | - return SPARC_MAPPING_ERROR; |
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| 317 | + return DMA_MAPPING_ERROR; |
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319 | 318 | } |
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320 | 319 | |
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321 | 320 | static void strbuf_flush(struct strbuf *strbuf, struct iommu *iommu, |
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.. | .. |
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473 | 472 | outs->dma_length = 0; |
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474 | 473 | |
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475 | 474 | max_seg_size = dma_get_max_seg_size(dev); |
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476 | | - seg_boundary_size = ALIGN(dma_get_seg_boundary(dev) + 1, |
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477 | | - IO_PAGE_SIZE) >> IO_PAGE_SHIFT; |
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| 475 | + seg_boundary_size = dma_get_seg_boundary_nr_pages(dev, IO_PAGE_SHIFT); |
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478 | 476 | base_shift = iommu->tbl.table_map_base >> IO_PAGE_SHIFT; |
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479 | 477 | for_each_sg(sglist, s, nelems, i) { |
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480 | 478 | unsigned long paddr, npages, entry, out_entry = 0, slen; |
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.. | .. |
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548 | 546 | |
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549 | 547 | if (outcount < incount) { |
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550 | 548 | outs = sg_next(outs); |
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551 | | - outs->dma_address = SPARC_MAPPING_ERROR; |
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| 549 | + outs->dma_address = DMA_MAPPING_ERROR; |
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552 | 550 | outs->dma_length = 0; |
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553 | 551 | } |
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554 | 552 | |
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.. | .. |
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574 | 572 | iommu_tbl_range_free(&iommu->tbl, vaddr, npages, |
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575 | 573 | IOMMU_ERROR_CODE); |
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576 | 574 | |
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577 | | - s->dma_address = SPARC_MAPPING_ERROR; |
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| 575 | + s->dma_address = DMA_MAPPING_ERROR; |
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578 | 576 | s->dma_length = 0; |
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579 | 577 | } |
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580 | 578 | if (s == outs) |
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.. | .. |
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742 | 740 | spin_unlock_irqrestore(&iommu->lock, flags); |
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743 | 741 | } |
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744 | 742 | |
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745 | | -static int dma_4u_mapping_error(struct device *dev, dma_addr_t dma_addr) |
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746 | | -{ |
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747 | | - return dma_addr == SPARC_MAPPING_ERROR; |
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748 | | -} |
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749 | | - |
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750 | 743 | static int dma_4u_supported(struct device *dev, u64 device_mask) |
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751 | 744 | { |
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752 | 745 | struct iommu *iommu = dev->archdata.iommu; |
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753 | 746 | |
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754 | | - if (device_mask > DMA_BIT_MASK(32)) |
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755 | | - return 0; |
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756 | | - if ((device_mask & iommu->dma_addr_mask) == iommu->dma_addr_mask) |
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| 747 | + if (ali_sound_dma_hack(dev, device_mask)) |
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757 | 748 | return 1; |
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758 | | -#ifdef CONFIG_PCI |
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759 | | - if (dev_is_pci(dev)) |
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760 | | - return pci64_dma_supported(to_pci_dev(dev), device_mask); |
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761 | | -#endif |
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762 | | - return 0; |
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| 749 | + |
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| 750 | + if (device_mask < iommu->dma_addr_mask) |
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| 751 | + return 0; |
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| 752 | + return 1; |
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763 | 753 | } |
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764 | 754 | |
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765 | 755 | static const struct dma_map_ops sun4u_dma_ops = { |
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.. | .. |
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772 | 762 | .sync_single_for_cpu = dma_4u_sync_single_for_cpu, |
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773 | 763 | .sync_sg_for_cpu = dma_4u_sync_sg_for_cpu, |
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774 | 764 | .dma_supported = dma_4u_supported, |
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775 | | - .mapping_error = dma_4u_mapping_error, |
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776 | 765 | }; |
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777 | 766 | |
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778 | 767 | const struct dma_map_ops *dma_ops = &sun4u_dma_ops; |
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