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2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/arch/powerpc/kernel/eeh_cache.c
....@@ -1,22 +1,9 @@
1
+// SPDX-License-Identifier: GPL-2.0-or-later
12 /*
23  * PCI address cache; allows the lookup of PCI devices based on I/O address
34  *
45  * Copyright IBM Corporation 2004
56  * Copyright Linas Vepstas <linas@austin.ibm.com> 2004
6
- *
7
- * This program is free software; you can redistribute it and/or modify
8
- * it under the terms of the GNU General Public License as published by
9
- * the Free Software Foundation; either version 2 of the License, or
10
- * (at your option) any later version.
11
- *
12
- * This program is distributed in the hope that it will be useful,
13
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
- * GNU General Public License for more details.
16
- *
17
- * You should have received a copy of the GNU General Public License
18
- * along with this program; if not, write to the Free Software
19
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
207  */
218 
229 #include <linux/list.h>
....@@ -26,10 +13,13 @@
2613 #include <linux/spinlock.h>
2714 #include <linux/atomic.h>
2815 #include <asm/pci-bridge.h>
16
+#include <asm/debugfs.h>
2917 #include <asm/ppc-pci.h>
3018 
3119 
3220 /**
21
+ * DOC: Overview
22
+ *
3323  * The pci address cache subsystem.  This subsystem places
3424  * PCI device address resources into a red-black tree, sorted
3525  * according to the address range, so that given only an i/o
....@@ -46,6 +36,7 @@
4636  * than any hash algo I could think of for this problem, even
4737  * with the penalty of slow pointer chases for d-cache misses).
4838  */
39
+
4940 struct pci_io_addr_range {
5041 	struct rb_node rb_node;
5142 	resource_size_t addr_lo;
....@@ -113,7 +104,7 @@
113104 	while (n) {
114105 		struct pci_io_addr_range *piar;
115106 		piar = rb_entry(n, struct pci_io_addr_range, rb_node);
116
-		pr_debug("PCI: %s addr range %d [%pap-%pap]: %s\n",
107
+		pr_info("PCI: %s addr range %d [%pap-%pap]: %s\n",
117108 		       (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
118109 		       &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev));
119110 		cnt++;
....@@ -157,10 +148,8 @@
157148 	piar->pcidev = dev;
158149 	piar->flags = flags;
159150 
160
-#ifdef DEBUG
161
-	pr_debug("PIAR: insert range=[%pap:%pap] dev=%s\n",
162
-		 &alo, &ahi, pci_name(dev));
163
-#endif
151
+	eeh_edev_dbg(piar->edev, "PIAR: insert range=[%pap:%pap]\n",
152
+		 &alo, &ahi);
164153 
165154 	rb_link_node(&piar->rb_node, parent, p);
166155 	rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
....@@ -170,18 +159,10 @@
170159 
171160 static void __eeh_addr_cache_insert_dev(struct pci_dev *dev)
172161 {
173
-	struct pci_dn *pdn;
174162 	struct eeh_dev *edev;
175163 	int i;
176164 
177
-	pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
178
-	if (!pdn) {
179
-		pr_warn("PCI: no pci dn found for dev=%s\n",
180
-			pci_name(dev));
181
-		return;
182
-	}
183
-
184
-	edev = pdn_to_eeh_dev(pdn);
165
+	edev = pci_dev_to_eeh_dev(dev);
185166 	if (!edev) {
186167 		pr_warn("PCI: no EEH dev found for %s\n",
187168 			pci_name(dev));
....@@ -240,6 +221,8 @@
240221 		piar = rb_entry(n, struct pci_io_addr_range, rb_node);
241222 
242223 		if (piar->pcidev == dev) {
224
+			eeh_edev_dbg(piar->edev, "PIAR: remove range=[%pap:%pap]\n",
225
+				 &piar->addr_lo, &piar->addr_hi);
243226 			rb_erase(n, &pci_io_addr_cache_root.rb_root);
244227 			kfree(piar);
245228 			goto restart;
....@@ -267,40 +250,39 @@
267250 }
268251 
269252 /**
270
- * eeh_addr_cache_build - Build a cache of I/O addresses
253
+ * eeh_addr_cache_init - Initialize a cache of I/O addresses
271254  *
272
- * Build a cache of pci i/o addresses.  This cache will be used to
255
+ * Initialize a cache of pci i/o addresses.  This cache will be used to
273256  * find the pci device that corresponds to a given address.
274
- * This routine scans all pci busses to build the cache.
275
- * Must be run late in boot process, after the pci controllers
276
- * have been scanned for devices (after all device resources are known).
277257  */
278
-void eeh_addr_cache_build(void)
258
+void eeh_addr_cache_init(void)
279259 {
280
-	struct pci_dn *pdn;
281
-	struct eeh_dev *edev;
282
-	struct pci_dev *dev = NULL;
283
-
284260 	spin_lock_init(&pci_io_addr_cache_root.piar_lock);
261
+}
285262 
286
-	for_each_pci_dev(dev) {
287
-		pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
288
-		if (!pdn)
289
-			continue;
263
+static int eeh_addr_cache_show(struct seq_file *s, void *v)
264
+{
265
+	struct pci_io_addr_range *piar;
266
+	struct rb_node *n;
267
+	unsigned long flags;
290268 
291
-		edev = pdn_to_eeh_dev(pdn);
292
-		if (!edev)
293
-			continue;
269
+	spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
270
+	for (n = rb_first(&pci_io_addr_cache_root.rb_root); n; n = rb_next(n)) {
271
+		piar = rb_entry(n, struct pci_io_addr_range, rb_node);
294272 
295
-		dev->dev.archdata.edev = edev;
296
-		edev->pdev = dev;
297
-
298
-		eeh_addr_cache_insert_dev(dev);
299
-		eeh_sysfs_add_device(dev);
273
+		seq_printf(s, "%s addr range [%pap-%pap]: %s\n",
274
+		       (piar->flags & IORESOURCE_IO) ? "i/o" : "mem",
275
+		       &piar->addr_lo, &piar->addr_hi, pci_name(piar->pcidev));
300276 	}
277
+	spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
301278 
302
-#ifdef DEBUG
303
-	/* Verify tree built up above, echo back the list of addrs. */
304
-	eeh_addr_cache_print(&pci_io_addr_cache_root);
305
-#endif
279
+	return 0;
280
+}
281
+DEFINE_SHOW_ATTRIBUTE(eeh_addr_cache);
282
+
283
+void eeh_cache_debugfs_init(void)
284
+{
285
+	debugfs_create_file_unsafe("eeh_address_cache", 0400,
286
+			powerpc_debugfs_root, NULL,
287
+			&eeh_addr_cache_fops);
306288 }