~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,22 +1,9 @@
	1	+// SPDX-License-Identifier: GPL-2.0-or-later
1	2	/*
2	3	* Copyright IBM Corporation 2001, 2005, 2006
3	4	* Copyright Dave Engebretsen & Todd Inglett 2001
4	5	* Copyright Linas Vepstas 2005, 2006
5	6	* Copyright 2001-2012 IBM Corporation.
6		- *
7		- * This program is free software; you can redistribute it and/or modify
8		- * it under the terms of the GNU General Public License as published by
9		- * the Free Software Foundation; either version 2 of the License, or
10		- * (at your option) any later version.
11		- *
12		- * This program is distributed in the hope that it will be useful,
13		- * but WITHOUT ANY WARRANTY; without even the implied warranty of
14		- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15		- * GNU General Public License for more details.
16		- *
17		- * You should have received a copy of the GNU General Public License
18		- * along with this program; if not, write to the Free Software
19		- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20	7	*
21	8	* Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
22	9	*/
..	..	@@ -109,7 +96,14 @@
109	96	* frozen count in last hour exceeds this limit, the PE will
110	97	* be forced to be offline permanently.
111	98	*/
112		-int eeh_max_freezes = 5;
	99	+u32 eeh_max_freezes = 5;
	100	+
	101	+/*
	102	+ * Controls whether a recovery event should be scheduled when an
	103	+ * isolated device is discovered. This is only really useful for
	104	+ * debugging problems with the EEH core.
	105	+ */
	106	+bool eeh_debugfs_no_recover;
113	107
114	108	/* Platform dependent EEH operations */
115	109	struct eeh_ops *eeh_ops = NULL;
..	..	@@ -156,6 +150,16 @@
156	150	}
157	151	__setup("eeh=", eeh_setup);
158	152
	153	+void eeh_show_enabled(void)
	154	+{
	155	+ if (eeh_has_flag(EEH_FORCE_DISABLED))
	156	+ pr_info("EEH: Recovery disabled by kernel parameter.\n");
	157	+ else if (eeh_has_flag(EEH_ENABLED))
	158	+ pr_info("EEH: Capable adapter found: recovery enabled.\n");
	159	+ else
	160	+ pr_info("EEH: No capable adapters found: recovery disabled.\n");
	161	+}
	162	+
159	163	/*
160	164	* This routine captures assorted PCI configuration space data
161	165	* for the indicated PCI device, and puts them into a buffer
..	..	@@ -163,39 +167,33 @@
163	167	*/
164	168	static size_t eeh_dump_dev_log(struct eeh_dev edev, char buf, size_t len)
165	169	{
166		- struct pci_dn *pdn = eeh_dev_to_pdn(edev);
167	170	u32 cfg;
168	171	int cap, i;
169	172	int n = 0, l = 0;
170	173	char buffer[128];
171	174
172		- if (!pdn) {
173		- pr_warn("EEH: Note: No error log for absent device.\n");
174		- return 0;
175		- }
176		-
177	175	n += scnprintf(buf+n, len-n, "%04x:%02x:%02x.%01x\n",
178		- pdn->phb->global_number, pdn->busno,
179		- PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
	176	+ edev->pe->phb->global_number, edev->bdfn >> 8,
	177	+ PCI_SLOT(edev->bdfn), PCI_FUNC(edev->bdfn));
180	178	pr_warn("EEH: of node=%04x:%02x:%02x.%01x\n",
181		- pdn->phb->global_number, pdn->busno,
182		- PCI_SLOT(pdn->devfn), PCI_FUNC(pdn->devfn));
	179	+ edev->pe->phb->global_number, edev->bdfn >> 8,
	180	+ PCI_SLOT(edev->bdfn), PCI_FUNC(edev->bdfn));
183	181
184		- eeh_ops->read_config(pdn, PCI_VENDOR_ID, 4, &cfg);
	182	+ eeh_ops->read_config(edev, PCI_VENDOR_ID, 4, &cfg);
185	183	n += scnprintf(buf+n, len-n, "dev/vend:%08x\n", cfg);
186	184	pr_warn("EEH: PCI device/vendor: %08x\n", cfg);
187	185
188		- eeh_ops->read_config(pdn, PCI_COMMAND, 4, &cfg);
	186	+ eeh_ops->read_config(edev, PCI_COMMAND, 4, &cfg);
189	187	n += scnprintf(buf+n, len-n, "cmd/stat:%x\n", cfg);
190	188	pr_warn("EEH: PCI cmd/status register: %08x\n", cfg);
191	189
192	190	/* Gather bridge-specific registers */
193	191	if (edev->mode & EEH_DEV_BRIDGE) {
194		- eeh_ops->read_config(pdn, PCI_SEC_STATUS, 2, &cfg);
	192	+ eeh_ops->read_config(edev, PCI_SEC_STATUS, 2, &cfg);
195	193	n += scnprintf(buf+n, len-n, "sec stat:%x\n", cfg);
196	194	pr_warn("EEH: Bridge secondary status: %04x\n", cfg);
197	195
198		- eeh_ops->read_config(pdn, PCI_BRIDGE_CONTROL, 2, &cfg);
	196	+ eeh_ops->read_config(edev, PCI_BRIDGE_CONTROL, 2, &cfg);
199	197	n += scnprintf(buf+n, len-n, "brdg ctl:%x\n", cfg);
200	198	pr_warn("EEH: Bridge control: %04x\n", cfg);
201	199	}
..	..	@@ -203,11 +201,11 @@
203	201	/* Dump out the PCI-X command and status regs */
204	202	cap = edev->pcix_cap;
205	203	if (cap) {
206		- eeh_ops->read_config(pdn, cap, 4, &cfg);
	204	+ eeh_ops->read_config(edev, cap, 4, &cfg);
207	205	n += scnprintf(buf+n, len-n, "pcix-cmd:%x\n", cfg);
208	206	pr_warn("EEH: PCI-X cmd: %08x\n", cfg);
209	207
210		- eeh_ops->read_config(pdn, cap+4, 4, &cfg);
	208	+ eeh_ops->read_config(edev, cap+4, 4, &cfg);
211	209	n += scnprintf(buf+n, len-n, "pcix-stat:%x\n", cfg);
212	210	pr_warn("EEH: PCI-X status: %08x\n", cfg);
213	211	}
..	..	@@ -219,7 +217,7 @@
219	217	pr_warn("EEH: PCI-E capabilities and status follow:\n");
220	218
221	219	for (i=0; i<=8; i++) {
222		- eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
	220	+ eeh_ops->read_config(edev, cap+4*i, 4, &cfg);
223	221	n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
224	222
225	223	if ((i % 4) == 0) {
..	..	@@ -246,7 +244,7 @@
246	244	pr_warn("EEH: PCI-E AER capability register set follows:\n");
247	245
248	246	for (i=0; i<=13; i++) {
249		- eeh_ops->read_config(pdn, cap+4*i, 4, &cfg);
	247	+ eeh_ops->read_config(edev, cap+4*i, 4, &cfg);
250	248	n += scnprintf(buf+n, len-n, "%02x:%x\n", 4*i, cfg);
251	249
252	250	if ((i % 4) == 0) {
..	..	@@ -410,14 +408,12 @@
410	408	}
411	409
412	410	/* Isolate the PHB and send event */
413		- eeh_pe_state_mark(phb_pe, EEH_PE_ISOLATED);
	411	+ eeh_pe_mark_isolated(phb_pe);
414	412	eeh_serialize_unlock(flags);
415	413
416		- pr_err("EEH: PHB#%x failure detected, location: %s\n",
	414	+ pr_debug("EEH: PHB#%x failure detected, location: %s\n",
417	415	phb_pe->phb->global_number, eeh_pe_loc_get(phb_pe));
418		- dump_stack();
419	416	eeh_send_failure_event(phb_pe);
420		-
421	417	return 1;
422	418	out:
423	419	eeh_serialize_unlock(flags);
..	..	@@ -444,7 +440,7 @@
444	440	unsigned long flags;
445	441	struct device_node *dn;
446	442	struct pci_dev *dev;
447		- struct eeh_pe pe, parent_pe, *phb_pe;
	443	+ struct eeh_pe pe, parent_pe;
448	444	int rc = 0;
449	445	const char *location = NULL;
450	446
..	..	@@ -463,13 +459,7 @@
463	459	/* Access to IO BARs might get this far and still not want checking. */
464	460	if (!pe) {
465	461	eeh_stats.ignored_check++;
466		- pr_debug("EEH: Ignored check for %s\n",
467		- eeh_pci_name(dev));
468		- return 0;
469		- }
470		-
471		- if (!pe->addr && !pe->config_addr) {
472		- eeh_stats.no_cfg_addr++;
	462	+ eeh_edev_dbg(edev, "Ignored check\n");
473	463	return 0;
474	464	}
475	465
..	..	@@ -504,12 +494,11 @@
504	494	if (dn)
505	495	location = of_get_property(dn, "ibm,loc-code",
506	496	NULL);
507		- printk(KERN_ERR "EEH: %d reads ignored for recovering device at "
508		- "location=%s driver=%s pci addr=%s\n",
	497	+ eeh_edev_err(edev, "%d reads ignored for recovering device at location=%s driver=%s\n",
509	498	pe->check_count,
510	499	location ? location : "unknown",
511		- eeh_driver_name(dev), eeh_pci_name(dev));
512		- printk(KERN_ERR "EEH: Might be infinite loop in %s driver\n",
	500	+ eeh_driver_name(dev));
	501	+ eeh_edev_err(edev, "Might be infinite loop in %s driver\n",
513	502	eeh_driver_name(dev));
514	503	dump_stack();
515	504	}
..	..	@@ -569,20 +558,15 @@
569	558	* with other functions on this device, and functions under
570	559	* bridges.
571	560	*/
572		- eeh_pe_state_mark(pe, EEH_PE_ISOLATED);
	561	+ eeh_pe_mark_isolated(pe);
573	562	eeh_serialize_unlock(flags);
574	563
575	564	/* Most EEH events are due to device driver bugs. Having
576	565	* a stack trace will help the device-driver authors figure
577	566	* out what happened. So print that out.
578	567	*/
579		- phb_pe = eeh_phb_pe_get(pe->phb);
580		- pr_err("EEH: Frozen PHB#%x-PE#%x detected\n",
581		- pe->phb->global_number, pe->addr);
582		- pr_err("EEH: PE location: %s, PHB location: %s\n",
583		- eeh_pe_loc_get(pe), eeh_pe_loc_get(phb_pe));
584		- dump_stack();
585		-
	568	+ pr_debug("EEH: %s: Frozen PHB#%x-PE#%x detected\n",
	569	+ __func__, pe->phb->global_number, pe->addr);
586	570	eeh_send_failure_event(pe);
587	571
588	572	return 1;
..	..	@@ -687,7 +671,7 @@
687	671
688	672	/* Check if the request is finished successfully */
689	673	if (active_flag) {
690		- rc = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
	674	+ rc = eeh_wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
691	675	if (rc < 0)
692	676	return rc;
693	677
..	..	@@ -700,7 +684,7 @@
700	684	return rc;
701	685	}
702	686
703		-static void eeh_disable_and_save_dev_state(struct eeh_dev edev,
	687	+static void eeh_disable_and_save_dev_state(struct eeh_dev *edev,
704	688	void *userdata)
705	689	{
706	690	struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
..	..	@@ -711,7 +695,7 @@
711	695	* state for the specified device
712	696	*/
713	697	if (!pdev \|\| pdev == dev)
714		- return NULL;
	698	+ return;
715	699
716	700	/* Ensure we have D0 power state */
717	701	pci_set_power_state(pdev, PCI_D0);
..	..	@@ -724,87 +708,23 @@
724	708	* interrupt from the device
725	709	*/
726	710	pci_write_config_word(pdev, PCI_COMMAND, PCI_COMMAND_INTX_DISABLE);
727		-
728		- return NULL;
729	711	}
730	712
731		-static void eeh_restore_dev_state(struct eeh_dev edev, void *userdata)
	713	+static void eeh_restore_dev_state(struct eeh_dev edev, void userdata)
732	714	{
733		- struct pci_dn *pdn = eeh_dev_to_pdn(edev);
734	715	struct pci_dev *pdev = eeh_dev_to_pci_dev(edev);
735	716	struct pci_dev *dev = userdata;
736	717
737	718	if (!pdev)
738		- return NULL;
	719	+ return;
739	720
740	721	/* Apply customization from firmware */
741		- if (pdn && eeh_ops->restore_config)
742		- eeh_ops->restore_config(pdn);
	722	+ if (eeh_ops->restore_config)
	723	+ eeh_ops->restore_config(edev);
743	724
744	725	/* The caller should restore state for the specified device */
745	726	if (pdev != dev)
746	727	pci_restore_state(pdev);
747		-
748		- return NULL;
749		-}
750		-
751		-int eeh_restore_vf_config(struct pci_dn *pdn)
752		-{
753		- struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
754		- u32 devctl, cmd, cap2, aer_capctl;
755		- int old_mps;
756		-
757		- if (edev->pcie_cap) {
758		- /* Restore MPS */
759		- old_mps = (ffs(pdn->mps) - 8) << 5;
760		- eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
761		- 2, &devctl);
762		- devctl &= ~PCI_EXP_DEVCTL_PAYLOAD;
763		- devctl \|= old_mps;
764		- eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
765		- 2, devctl);
766		-
767		- /* Disable Completion Timeout if possible */
768		- eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCAP2,
769		- 4, &cap2);
770		- if (cap2 & PCI_EXP_DEVCAP2_COMP_TMOUT_DIS) {
771		- eeh_ops->read_config(pdn,
772		- edev->pcie_cap + PCI_EXP_DEVCTL2,
773		- 4, &cap2);
774		- cap2 \|= PCI_EXP_DEVCTL2_COMP_TMOUT_DIS;
775		- eeh_ops->write_config(pdn,
776		- edev->pcie_cap + PCI_EXP_DEVCTL2,
777		- 4, cap2);
778		- }
779		- }
780		-
781		- /* Enable SERR and parity checking */
782		- eeh_ops->read_config(pdn, PCI_COMMAND, 2, &cmd);
783		- cmd \|= (PCI_COMMAND_PARITY \| PCI_COMMAND_SERR);
784		- eeh_ops->write_config(pdn, PCI_COMMAND, 2, cmd);
785		-
786		- /* Enable report various errors */
787		- if (edev->pcie_cap) {
788		- eeh_ops->read_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
789		- 2, &devctl);
790		- devctl &= ~PCI_EXP_DEVCTL_CERE;
791		- devctl \|= (PCI_EXP_DEVCTL_NFERE \|
792		- PCI_EXP_DEVCTL_FERE \|
793		- PCI_EXP_DEVCTL_URRE);
794		- eeh_ops->write_config(pdn, edev->pcie_cap + PCI_EXP_DEVCTL,
795		- 2, devctl);
796		- }
797		-
798		- /* Enable ECRC generation and check */
799		- if (edev->pcie_cap && edev->aer_cap) {
800		- eeh_ops->read_config(pdn, edev->aer_cap + PCI_ERR_CAP,
801		- 4, &aer_capctl);
802		- aer_capctl \|= (PCI_ERR_CAP_ECRC_GENE \| PCI_ERR_CAP_ECRC_CHKE);
803		- eeh_ops->write_config(pdn, edev->aer_cap + PCI_ERR_CAP,
804		- 4, aer_capctl);
805		- }
806		-
807		- return 0;
808	728	}
809	729
810	730	/**
..	..	@@ -829,14 +749,15 @@
829	749	switch (state) {
830	750	case pcie_deassert_reset:
831	751	eeh_ops->reset(pe, EEH_RESET_DEACTIVATE);
832		- eeh_unfreeze_pe(pe, false);
	752	+ eeh_unfreeze_pe(pe);
833	753	if (!(pe->type & EEH_PE_VF))
834		- eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
	754	+ eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true);
835	755	eeh_pe_dev_traverse(pe, eeh_restore_dev_state, dev);
836		- eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
	756	+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true);
837	757	break;
838	758	case pcie_hot_reset:
839		- eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
	759	+ eeh_pe_mark_isolated(pe);
	760	+ eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true);
840	761	eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
841	762	eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
842	763	if (!(pe->type & EEH_PE_VF))
..	..	@@ -844,7 +765,8 @@
844	765	eeh_ops->reset(pe, EEH_RESET_HOT);
845	766	break;
846	767	case pcie_warm_reset:
847		- eeh_pe_state_mark_with_cfg(pe, EEH_PE_ISOLATED);
	768	+ eeh_pe_mark_isolated(pe);
	769	+ eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, true);
848	770	eeh_ops->set_option(pe, EEH_OPT_FREEZE_PE);
849	771	eeh_pe_dev_traverse(pe, eeh_disable_and_save_dev_state, dev);
850	772	if (!(pe->type & EEH_PE_VF))
..	..	@@ -852,7 +774,7 @@
852	774	eeh_ops->reset(pe, EEH_RESET_FUNDAMENTAL);
853	775	break;
854	776	default:
855		- eeh_pe_state_clear(pe, EEH_PE_ISOLATED \| EEH_PE_CFG_BLOCKED);
	777	+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED \| EEH_PE_CFG_BLOCKED, true);
856	778	return -EINVAL;
857	779	};
858	780
..	..	@@ -869,7 +791,7 @@
869	791	* the indicated device and its children so that the bunch of the
870	792	* devices could be reset properly.
871	793	*/
872		-static void eeh_set_dev_freset(struct eeh_dev edev, void *flag)
	794	+static void eeh_set_dev_freset(struct eeh_dev edev, void flag)
873	795	{
874	796	struct pci_dev *dev;
875	797	unsigned int freset = (unsigned int )flag;
..	..	@@ -877,8 +799,24 @@
877	799	dev = eeh_dev_to_pci_dev(edev);
878	800	if (dev)
879	801	*freset \|= dev->needs_freset;
	802	+}
880	803
881		- return NULL;
	804	+static void eeh_pe_refreeze_passed(struct eeh_pe *root)
	805	+{
	806	+ struct eeh_pe *pe;
	807	+ int state;
	808	+
	809	+ eeh_for_each_pe(root, pe) {
	810	+ if (eeh_pe_passed(pe)) {
	811	+ state = eeh_ops->get_state(pe, NULL);
	812	+ if (state &
	813	+ (EEH_STATE_MMIO_ACTIVE \| EEH_STATE_MMIO_ENABLED)) {
	814	+ pr_info("EEH: Passed-through PE PHB#%x-PE#%x was thawed by reset, re-freezing for safety.\n",
	815	+ pe->phb->global_number, pe->addr);
	816	+ eeh_pe_set_option(pe, EEH_OPT_FREEZE_PE);
	817	+ }
	818	+ }
	819	+ }
882	820	}
883	821
884	822	/**
..	..	@@ -893,12 +831,12 @@
893	831	*
894	832	* This function will attempt to reset a PE three times before failing.
895	833	*/
896		-int eeh_pe_reset_full(struct eeh_pe *pe)
	834	+int eeh_pe_reset_full(struct eeh_pe *pe, bool include_passed)
897	835	{
898	836	int reset_state = (EEH_PE_RESET \| EEH_PE_CFG_BLOCKED);
899	837	int type = EEH_RESET_HOT;
900	838	unsigned int freset = 0;
901		- int i, state, ret;
	839	+ int i, state = 0, ret;
902	840
903	841	/*
904	842	* Determine the type of reset to perform - hot or fundamental.
..	..	@@ -915,33 +853,42 @@
915	853
916	854	/* Make three attempts at resetting the bus */
917	855	for (i = 0; i < 3; i++) {
918		- ret = eeh_pe_reset(pe, type);
919		- if (ret)
920		- break;
921		-
922		- ret = eeh_pe_reset(pe, EEH_RESET_DEACTIVATE);
923		- if (ret)
924		- break;
	856	+ ret = eeh_pe_reset(pe, type, include_passed);
	857	+ if (!ret)
	858	+ ret = eeh_pe_reset(pe, EEH_RESET_DEACTIVATE,
	859	+ include_passed);
	860	+ if (ret) {
	861	+ ret = -EIO;
	862	+ pr_warn("EEH: Failure %d resetting PHB#%x-PE#%x (attempt %d)\n\n",
	863	+ state, pe->phb->global_number, pe->addr, i + 1);
	864	+ continue;
	865	+ }
	866	+ if (i)
	867	+ pr_warn("EEH: PHB#%x-PE#%x: Successful reset (attempt %d)\n",
	868	+ pe->phb->global_number, pe->addr, i + 1);
925	869
926	870	/* Wait until the PE is in a functioning state */
927		- state = eeh_ops->wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
928		- if (eeh_state_active(state))
929		- break;
930		-
	871	+ state = eeh_wait_state(pe, PCI_BUS_RESET_WAIT_MSEC);
931	872	if (state < 0) {
932		- pr_warn("%s: Unrecoverable slot failure on PHB#%x-PE#%x",
933		- __func__, pe->phb->global_number, pe->addr);
	873	+ pr_warn("EEH: Unrecoverable slot failure on PHB#%x-PE#%x",
	874	+ pe->phb->global_number, pe->addr);
934	875	ret = -ENOTRECOVERABLE;
935	876	break;
936	877	}
937		-
938		- /* Set error in case this is our last attempt */
939		- ret = -EIO;
940		- pr_warn("%s: Failure %d resetting PHB#%x-PE#%x\n (%d)\n",
941		- __func__, state, pe->phb->global_number, pe->addr, (i + 1));
	878	+ if (eeh_state_active(state))
	879	+ break;
	880	+ else
	881	+ pr_warn("EEH: PHB#%x-PE#%x: Slot inactive after reset: 0x%x (attempt %d)\n",
	882	+ pe->phb->global_number, pe->addr, state, i + 1);
942	883	}
943	884
944		- eeh_pe_state_clear(pe, reset_state);
	885	+ /* Resetting the PE may have unfrozen child PEs. If those PEs have been
	886	+ * (potentially) passed through to a guest, re-freeze them:
	887	+ */
	888	+ if (!include_passed)
	889	+ eeh_pe_refreeze_passed(pe);
	890	+
	891	+ eeh_pe_state_clear(pe, reset_state, true);
945	892	return ret;
946	893	}
947	894
..	..	@@ -956,15 +903,13 @@
956	903	*/
957	904	void eeh_save_bars(struct eeh_dev *edev)
958	905	{
959		- struct pci_dn *pdn;
960	906	int i;
961	907
962		- pdn = eeh_dev_to_pdn(edev);
963		- if (!pdn)
	908	+ if (!edev)
964	909	return;
965	910
966	911	for (i = 0; i < 16; i++)
967		- eeh_ops->read_config(pdn, i * 4, 4, &edev->config_space[i]);
	912	+ eeh_ops->read_config(edev, i * 4, 4, &edev->config_space[i]);
968	913
969	914	/*
970	915	* For PCI bridges including root port, we need enable bus
..	..	@@ -974,56 +919,6 @@
974	919	*/
975	920	if (edev->mode & EEH_DEV_BRIDGE)
976	921	edev->config_space[1] \|= PCI_COMMAND_MASTER;
977		-}
978		-
979		-/**
980		- * eeh_ops_register - Register platform dependent EEH operations
981		- * @ops: platform dependent EEH operations
982		- *
983		- * Register the platform dependent EEH operation callback
984		- * functions. The platform should call this function before
985		- * any other EEH operations.
986		- */
987		-int __init eeh_ops_register(struct eeh_ops *ops)
988		-{
989		- if (!ops->name) {
990		- pr_warn("%s: Invalid EEH ops name for %p\n",
991		- __func__, ops);
992		- return -EINVAL;
993		- }
994		-
995		- if (eeh_ops && eeh_ops != ops) {
996		- pr_warn("%s: EEH ops of platform %s already existing (%s)\n",
997		- __func__, eeh_ops->name, ops->name);
998		- return -EEXIST;
999		- }
1000		-
1001		- eeh_ops = ops;
1002		-
1003		- return 0;
1004		-}
1005		-
1006		-/**
1007		- * eeh_ops_unregister - Unreigster platform dependent EEH operations
1008		- * @name: name of EEH platform operations
1009		- *
1010		- * Unregister the platform dependent EEH operation callback
1011		- * functions.
1012		- */
1013		-int __exit eeh_ops_unregister(const char *name)
1014		-{
1015		- if (!name \|\| !strlen(name)) {
1016		- pr_warn("%s: Invalid EEH ops name\n",
1017		- __func__);
1018		- return -EINVAL;
1019		- }
1020		-
1021		- if (eeh_ops && !strcmp(eeh_ops->name, name)) {
1022		- eeh_ops = NULL;
1023		- return 0;
1024		- }
1025		-
1026		- return -EEXIST;
1027	922	}
1028	923
1029	924	static int eeh_reboot_notifier(struct notifier_block *nb,
..	..	@@ -1037,162 +932,113 @@
1037	932	.notifier_call = eeh_reboot_notifier,
1038	933	};
1039	934
1040		-void eeh_probe_devices(void)
	935	+static int eeh_device_notifier(struct notifier_block *nb,
	936	+ unsigned long action, void *data)
1041	937	{
1042		- struct pci_controller hose, tmp;
1043		- struct pci_dn *pdn;
	938	+ struct device *dev = data;
1044	939
1045		- /* Enable EEH for all adapters */
1046		- list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
1047		- pdn = hose->pci_data;
1048		- traverse_pci_dn(pdn, eeh_ops->probe, NULL);
	940	+ switch (action) {
	941	+ /*
	942	+ * Note: It's not possible to perform EEH device addition (i.e.
	943	+ * {pseries,pnv}_pcibios_bus_add_device()) here because it depends on
	944	+ * the device's resources, which have not yet been set up.
	945	+ */
	946	+ case BUS_NOTIFY_DEL_DEVICE:
	947	+ eeh_remove_device(to_pci_dev(dev));
	948	+ break;
	949	+ default:
	950	+ break;
1049	951	}
	952	+ return NOTIFY_DONE;
1050	953	}
1051	954
	955	+static struct notifier_block eeh_device_nb = {
	956	+ .notifier_call = eeh_device_notifier,
	957	+};
	958	+
1052	959	/**
1053		- * eeh_init - EEH initialization
	960	+ * eeh_init - System wide EEH initialization
1054	961	*
1055		- * Initialize EEH by trying to enable it for all of the adapters in the system.
1056		- * As a side effect we can determine here if eeh is supported at all.
1057		- * Note that we leave EEH on so failed config cycles won't cause a machine
1058		- * check. If a user turns off EEH for a particular adapter they are really
1059		- * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
1060		- * grant access to a slot if EEH isn't enabled, and so we always enable
1061		- * EEH for all slots/all devices.
1062		- *
1063		- * The eeh-force-off option disables EEH checking globally, for all slots.
1064		- * Even if force-off is set, the EEH hardware is still enabled, so that
1065		- * newer systems can boot.
	962	+ * It's the platform's job to call this from an arch_initcall().
1066	963	*/
1067		-static int eeh_init(void)
	964	+int eeh_init(struct eeh_ops *ops)
1068	965	{
1069	966	struct pci_controller hose, tmp;
1070	967	int ret = 0;
1071	968
	969	+ /* the platform should only initialise EEH once */
	970	+ if (WARN_ON(eeh_ops))
	971	+ return -EEXIST;
	972	+ if (WARN_ON(!ops))
	973	+ return -ENOENT;
	974	+ eeh_ops = ops;
	975	+
1072	976	/* Register reboot notifier */
1073	977	ret = register_reboot_notifier(&eeh_reboot_nb);
1074	978	if (ret) {
1075		- pr_warn("%s: Failed to register notifier (%d)\n",
	979	+ pr_warn("%s: Failed to register reboot notifier (%d)\n",
1076	980	__func__, ret);
1077	981	return ret;
1078	982	}
1079	983
1080		- /* call platform initialization function */
1081		- if (!eeh_ops) {
1082		- pr_warn("%s: Platform EEH operation not found\n",
1083		- __func__);
1084		- return -EEXIST;
1085		- } else if ((ret = eeh_ops->init()))
	984	+ ret = bus_register_notifier(&pci_bus_type, &eeh_device_nb);
	985	+ if (ret) {
	986	+ pr_warn("%s: Failed to register bus notifier (%d)\n",
	987	+ __func__, ret);
1086	988	return ret;
	989	+ }
1087	990
1088	991	/* Initialize PHB PEs */
1089	992	list_for_each_entry_safe(hose, tmp, &hose_list, list_node)
1090		- eeh_dev_phb_init_dynamic(hose);
	993	+ eeh_phb_pe_create(hose);
	994	+
	995	+ eeh_addr_cache_init();
1091	996
1092	997	/* Initialize EEH event */
1093		- ret = eeh_event_init();
1094		- if (ret)
1095		- return ret;
1096		-
1097		- eeh_probe_devices();
1098		-
1099		- if (eeh_enabled())
1100		- pr_info("EEH: PCI Enhanced I/O Error Handling Enabled\n");
1101		- else if (!eeh_has_flag(EEH_POSTPONED_PROBE))
1102		- pr_info("EEH: No capable adapters found\n");
1103		-
1104		- return ret;
1105		-}
1106		-
1107		-core_initcall_sync(eeh_init);
1108		-
1109		-/**
1110		- * eeh_add_device_early - Enable EEH for the indicated device node
1111		- * @pdn: PCI device node for which to set up EEH
1112		- *
1113		- * This routine must be used to perform EEH initialization for PCI
1114		- * devices that were added after system boot (e.g. hotplug, dlpar).
1115		- * This routine must be called before any i/o is performed to the
1116		- * adapter (inluding any config-space i/o).
1117		- * Whether this actually enables EEH or not for this device depends
1118		- * on the CEC architecture, type of the device, on earlier boot
1119		- * command-line arguments & etc.
1120		- */
1121		-void eeh_add_device_early(struct pci_dn *pdn)
1122		-{
1123		- struct pci_controller *phb = pdn ? pdn->phb : NULL;
1124		- struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
1125		-
1126		- if (!edev)
1127		- return;
1128		-
1129		- if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
1130		- return;
1131		-
1132		- /* USB Bus children of PCI devices will not have BUID's */
1133		- if (NULL == phb \|\|
1134		- (eeh_has_flag(EEH_PROBE_MODE_DEVTREE) && 0 == phb->buid))
1135		- return;
1136		-
1137		- eeh_ops->probe(pdn, NULL);
	998	+ return eeh_event_init();
1138	999	}
1139	1000
1140	1001	/**
1141		- * eeh_add_device_tree_early - Enable EEH for the indicated device
1142		- * @pdn: PCI device node
1143		- *
1144		- * This routine must be used to perform EEH initialization for the
1145		- * indicated PCI device that was added after system boot (e.g.
1146		- * hotplug, dlpar).
1147		- */
1148		-void eeh_add_device_tree_early(struct pci_dn *pdn)
1149		-{
1150		- struct pci_dn *n;
1151		-
1152		- if (!pdn)
1153		- return;
1154		-
1155		- list_for_each_entry(n, &pdn->child_list, list)
1156		- eeh_add_device_tree_early(n);
1157		- eeh_add_device_early(pdn);
1158		-}
1159		-EXPORT_SYMBOL_GPL(eeh_add_device_tree_early);
1160		-
1161		-/**
1162		- * eeh_add_device_late - Perform EEH initialization for the indicated pci device
	1002	+ * eeh_probe_device() - Perform EEH initialization for the indicated pci device
1163	1003	* @dev: pci device for which to set up EEH
1164	1004	*
1165	1005	* This routine must be used to complete EEH initialization for PCI
1166	1006	* devices that were added after system boot (e.g. hotplug, dlpar).
1167	1007	*/
1168		-void eeh_add_device_late(struct pci_dev *dev)
	1008	+void eeh_probe_device(struct pci_dev *dev)
1169	1009	{
1170		- struct pci_dn *pdn;
1171	1010	struct eeh_dev *edev;
1172		-
1173		- if (!dev \|\| !eeh_enabled())
1174		- return;
1175	1011
1176	1012	pr_debug("EEH: Adding device %s\n", pci_name(dev));
1177	1013
1178		- pdn = pci_get_pdn_by_devfn(dev->bus, dev->devfn);
1179		- edev = pdn_to_eeh_dev(pdn);
1180		- if (edev->pdev == dev) {
1181		- pr_debug("EEH: Already referenced !\n");
	1014	+ /*
	1015	+ * pci_dev_to_eeh_dev() can only work if eeh_probe_dev() was
	1016	+ * already called for this device.
	1017	+ */
	1018	+ if (WARN_ON_ONCE(pci_dev_to_eeh_dev(dev))) {
	1019	+ pci_dbg(dev, "Already bound to an eeh_dev!\n");
	1020	+ return;
	1021	+ }
	1022	+
	1023	+ edev = eeh_ops->probe(dev);
	1024	+ if (!edev) {
	1025	+ pr_debug("EEH: Adding device failed\n");
1182	1026	return;
1183	1027	}
1184	1028
1185	1029	/*
1186		- * The EEH cache might not be removed correctly because of
1187		- * unbalanced kref to the device during unplug time, which
1188		- * relies on pcibios_release_device(). So we have to remove
1189		- * that here explicitly.
	1030	+ * FIXME: We rely on pcibios_release_device() to remove the
	1031	+ * existing EEH state. The release function is only called if
	1032	+ * the pci_dev's refcount drops to zero so if something is
	1033	+ * keeping a ref to a device (e.g. a filesystem) we need to
	1034	+ * remove the old EEH state.
	1035	+ *
	1036	+ * FIXME: HEY MA, LOOK AT ME, NO LOCKING!
1190	1037	*/
1191		- if (edev->pdev) {
1192		- eeh_rmv_from_parent_pe(edev);
	1038	+ if (edev->pdev && edev->pdev != dev) {
	1039	+ eeh_pe_tree_remove(edev);
1193	1040	eeh_addr_cache_rmv_dev(edev->pdev);
1194	1041	eeh_sysfs_remove_device(edev->pdev);
1195		- edev->mode &= ~EEH_DEV_SYSFS;
1196	1042
1197	1043	/*
1198	1044	* We definitely should have the PCI device removed
..	..	@@ -1200,65 +1046,14 @@
1200	1046	* into error handler afterwards.
1201	1047	*/
1202	1048	edev->mode \|= EEH_DEV_NO_HANDLER;
1203		-
1204		- edev->pdev = NULL;
1205		- dev->dev.archdata.edev = NULL;
1206	1049	}
1207	1050
1208		- if (eeh_has_flag(EEH_PROBE_MODE_DEV))
1209		- eeh_ops->probe(pdn, NULL);
1210		-
	1051	+ /* bind the pdev and the edev together */
1211	1052	edev->pdev = dev;
1212	1053	dev->dev.archdata.edev = edev;
1213		-
1214	1054	eeh_addr_cache_insert_dev(dev);
	1055	+ eeh_sysfs_add_device(dev);
1215	1056	}
1216		-
1217		-/**
1218		- * eeh_add_device_tree_late - Perform EEH initialization for the indicated PCI bus
1219		- * @bus: PCI bus
1220		- *
1221		- * This routine must be used to perform EEH initialization for PCI
1222		- * devices which are attached to the indicated PCI bus. The PCI bus
1223		- * is added after system boot through hotplug or dlpar.
1224		- */
1225		-void eeh_add_device_tree_late(struct pci_bus *bus)
1226		-{
1227		- struct pci_dev *dev;
1228		-
1229		- list_for_each_entry(dev, &bus->devices, bus_list) {
1230		- eeh_add_device_late(dev);
1231		- if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1232		- struct pci_bus *subbus = dev->subordinate;
1233		- if (subbus)
1234		- eeh_add_device_tree_late(subbus);
1235		- }
1236		- }
1237		-}
1238		-EXPORT_SYMBOL_GPL(eeh_add_device_tree_late);
1239		-
1240		-/**
1241		- * eeh_add_sysfs_files - Add EEH sysfs files for the indicated PCI bus
1242		- * @bus: PCI bus
1243		- *
1244		- * This routine must be used to add EEH sysfs files for PCI
1245		- * devices which are attached to the indicated PCI bus. The PCI bus
1246		- * is added after system boot through hotplug or dlpar.
1247		- */
1248		-void eeh_add_sysfs_files(struct pci_bus *bus)
1249		-{
1250		- struct pci_dev *dev;
1251		-
1252		- list_for_each_entry(dev, &bus->devices, bus_list) {
1253		- eeh_sysfs_add_device(dev);
1254		- if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
1255		- struct pci_bus *subbus = dev->subordinate;
1256		- if (subbus)
1257		- eeh_add_sysfs_files(subbus);
1258		- }
1259		- }
1260		-}
1261		-EXPORT_SYMBOL_GPL(eeh_add_sysfs_files);
1262	1057
1263	1058	/**
1264	1059	* eeh_remove_device - Undo EEH setup for the indicated pci device
..	..	@@ -1279,10 +1074,10 @@
1279	1074	edev = pci_dev_to_eeh_dev(dev);
1280	1075
1281	1076	/* Unregister the device with the EEH/PCI address search system */
1282		- pr_debug("EEH: Removing device %s\n", pci_name(dev));
	1077	+ dev_dbg(&dev->dev, "EEH: Removing device\n");
1283	1078
1284	1079	if (!edev \|\| !edev->pdev \|\| !edev->pe) {
1285		- pr_debug("EEH: Not referenced !\n");
	1080	+ dev_dbg(&dev->dev, "EEH: Device not referenced!\n");
1286	1081	return;
1287	1082	}
1288	1083
..	..	@@ -1295,17 +1090,11 @@
1295	1090	edev->pdev = NULL;
1296	1091
1297	1092	/*
1298		- * The flag "in_error" is used to trace EEH devices for VFs
1299		- * in error state or not. It's set in eeh_report_error(). If
1300		- * it's not set, eeh_report_{reset,resume}() won't be called
1301		- * for the VF EEH device.
	1093	+ * eeh_sysfs_remove_device() uses pci_dev_to_eeh_dev() so we need to
	1094	+ * remove the sysfs files before clearing dev.archdata.edev
1302	1095	*/
1303		- edev->in_error = false;
1304		- dev->dev.archdata.edev = NULL;
1305		- if (!(edev->pe->state & EEH_PE_KEEP))
1306		- eeh_rmv_from_parent_pe(edev);
1307		- else
1308		- edev->mode \|= EEH_DEV_DISCONNECTED;
	1096	+ if (edev->mode & EEH_DEV_SYSFS)
	1097	+ eeh_sysfs_remove_device(dev);
1309	1098
1310	1099	/*
1311	1100	* We're removing from the PCI subsystem, that means
..	..	@@ -1316,11 +1105,22 @@
1316	1105	edev->mode \|= EEH_DEV_NO_HANDLER;
1317	1106
1318	1107	eeh_addr_cache_rmv_dev(dev);
1319		- eeh_sysfs_remove_device(dev);
1320		- edev->mode &= ~EEH_DEV_SYSFS;
	1108	+
	1109	+ /*
	1110	+ * The flag "in_error" is used to trace EEH devices for VFs
	1111	+ * in error state or not. It's set in eeh_report_error(). If
	1112	+ * it's not set, eeh_report_{reset,resume}() won't be called
	1113	+ * for the VF EEH device.
	1114	+ */
	1115	+ edev->in_error = false;
	1116	+ dev->dev.archdata.edev = NULL;
	1117	+ if (!(edev->pe->state & EEH_PE_KEEP))
	1118	+ eeh_pe_tree_remove(edev);
	1119	+ else
	1120	+ edev->mode \|= EEH_DEV_DISCONNECTED;
1321	1121	}
1322	1122
1323		-int eeh_unfreeze_pe(struct eeh_pe *pe, bool sw_state)
	1123	+int eeh_unfreeze_pe(struct eeh_pe *pe)
1324	1124	{
1325	1125	int ret;
1326	1126
..	..	@@ -1337,10 +1137,6 @@
1337	1137	__func__, ret, pe->phb->global_number, pe->addr);
1338	1138	return ret;
1339	1139	}
1340		-
1341		- /* Clear software isolated state */
1342		- if (sw_state && (pe->state & EEH_PE_ISOLATED))
1343		- eeh_pe_state_clear(pe, EEH_PE_ISOLATED);
1344	1140
1345	1141	return ret;
1346	1142	}
..	..	@@ -1393,7 +1189,10 @@
1393	1189	}
1394	1190	}
1395	1191
1396		- return eeh_unfreeze_pe(pe, true);
	1192	+ ret = eeh_unfreeze_pe(pe);
	1193	+ if (!ret)
	1194	+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED, true);
	1195	+ return ret;
1397	1196	}
1398	1197
1399	1198	/**
..	..	@@ -1483,7 +1282,7 @@
1483	1282	if (!dev)
1484	1283	return 0;
1485	1284
1486		- if (dev->iommu_group) {
	1285	+ if (device_iommu_mapped(dev)) {
1487	1286	*ppdev = pdev;
1488	1287	return 1;
1489	1288	}
..	..	@@ -1623,13 +1422,12 @@
1623	1422	}
1624	1423	EXPORT_SYMBOL_GPL(eeh_pe_get_state);
1625	1424
1626		-static int eeh_pe_reenable_devices(struct eeh_pe *pe)
	1425	+static int eeh_pe_reenable_devices(struct eeh_pe *pe, bool include_passed)
1627	1426	{
1628	1427	struct eeh_dev edev, tmp;
1629	1428	struct pci_dev *pdev;
1630	1429	int ret = 0;
1631	1430
1632		- /* Restore config space */
1633	1431	eeh_pe_restore_bars(pe);
1634	1432
1635	1433	/*
..	..	@@ -1650,7 +1448,14 @@
1650	1448	}
1651	1449
1652	1450	/* The PE is still in frozen state */
1653		- return eeh_unfreeze_pe(pe, true);
	1451	+ if (include_passed \|\| !eeh_pe_passed(pe)) {
	1452	+ ret = eeh_unfreeze_pe(pe);
	1453	+ } else
	1454	+ pr_info("EEH: Note: Leaving passthrough PHB#%x-PE#%x frozen.\n",
	1455	+ pe->phb->global_number, pe->addr);
	1456	+ if (!ret)
	1457	+ eeh_pe_state_clear(pe, EEH_PE_ISOLATED, include_passed);
	1458	+ return ret;
1654	1459	}
1655	1460
1656	1461
..	..	@@ -1663,7 +1468,7 @@
1663	1468	* indicated type, either fundamental reset or hot reset.
1664	1469	* PE reset is the most important part for error recovery.
1665	1470	*/
1666		-int eeh_pe_reset(struct eeh_pe *pe, int option)
	1471	+int eeh_pe_reset(struct eeh_pe *pe, int option, bool include_passed)
1667	1472	{
1668	1473	int ret = 0;
1669	1474
..	..	@@ -1677,11 +1482,11 @@
1677	1482	switch (option) {
1678	1483	case EEH_RESET_DEACTIVATE:
1679	1484	ret = eeh_ops->reset(pe, option);
1680		- eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED);
	1485	+ eeh_pe_state_clear(pe, EEH_PE_CFG_BLOCKED, include_passed);
1681	1486	if (ret)
1682	1487	break;
1683	1488
1684		- ret = eeh_pe_reenable_devices(pe);
	1489	+ ret = eeh_pe_reenable_devices(pe, include_passed);
1685	1490	break;
1686	1491	case EEH_RESET_HOT:
1687	1492	case EEH_RESET_FUNDAMENTAL:
..	..	@@ -1807,22 +1612,256 @@
1807	1612	return 0;
1808	1613	}
1809	1614
1810		-static int eeh_freeze_dbgfs_set(void *data, u64 val)
	1615	+DEFINE_DEBUGFS_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
	1616	+ eeh_enable_dbgfs_set, "0x%llx\n");
	1617	+
	1618	+static ssize_t eeh_force_recover_write(struct file *filp,
	1619	+ const char __user *user_buf,
	1620	+ size_t count, loff_t *ppos)
1811	1621	{
1812		- eeh_max_freezes = val;
	1622	+ struct pci_controller *hose;
	1623	+ uint32_t phbid, pe_no;
	1624	+ struct eeh_pe *pe;
	1625	+ char buf[20];
	1626	+ int ret;
	1627	+
	1628	+ ret = simple_write_to_buffer(buf, sizeof(buf), ppos, user_buf, count);
	1629	+ if (!ret)
	1630	+ return -EFAULT;
	1631	+
	1632	+ /*
	1633	+ * When PE is NULL the event is a "special" event. Rather than
	1634	+ * recovering a specific PE it forces the EEH core to scan for failed
	1635	+ * PHBs and recovers each. This needs to be done before any device
	1636	+ * recoveries can occur.
	1637	+ */
	1638	+ if (!strncmp(buf, "hwcheck", 7)) {
	1639	+ __eeh_send_failure_event(NULL);
	1640	+ return count;
	1641	+ }
	1642	+
	1643	+ ret = sscanf(buf, "%x:%x", &phbid, &pe_no);
	1644	+ if (ret != 2)
	1645	+ return -EINVAL;
	1646	+
	1647	+ hose = pci_find_controller_for_domain(phbid);
	1648	+ if (!hose)
	1649	+ return -ENODEV;
	1650	+
	1651	+ /* Retrieve PE */
	1652	+ pe = eeh_pe_get(hose, pe_no);
	1653	+ if (!pe)
	1654	+ return -ENODEV;
	1655	+
	1656	+ /*
	1657	+ * We don't do any state checking here since the detection
	1658	+ * process is async to the recovery process. The recovery
	1659	+ * thread should not break even if we schedule a recovery
	1660	+ * from an odd state (e.g. PE removed, or recovery of a
	1661	+ * non-isolated PE)
	1662	+ */
	1663	+ __eeh_send_failure_event(pe);
	1664	+
	1665	+ return ret < 0 ? ret : count;
	1666	+}
	1667	+
	1668	+static const struct file_operations eeh_force_recover_fops = {
	1669	+ .open = simple_open,
	1670	+ .llseek = no_llseek,
	1671	+ .write = eeh_force_recover_write,
	1672	+};
	1673	+
	1674	+static ssize_t eeh_debugfs_dev_usage(struct file *filp,
	1675	+ char __user *user_buf,
	1676	+ size_t count, loff_t *ppos)
	1677	+{
	1678	+ static const char usage[] = "input format: <domain>:<bus>:<dev>.<fn>\n";
	1679	+
	1680	+ return simple_read_from_buffer(user_buf, count, ppos,
	1681	+ usage, sizeof(usage) - 1);
	1682	+}
	1683	+
	1684	+static ssize_t eeh_dev_check_write(struct file *filp,
	1685	+ const char __user *user_buf,
	1686	+ size_t count, loff_t *ppos)
	1687	+{
	1688	+ uint32_t domain, bus, dev, fn;
	1689	+ struct pci_dev *pdev;
	1690	+ struct eeh_dev *edev;
	1691	+ char buf[20];
	1692	+ int ret;
	1693	+
	1694	+ memset(buf, 0, sizeof(buf));
	1695	+ ret = simple_write_to_buffer(buf, sizeof(buf)-1, ppos, user_buf, count);
	1696	+ if (!ret)
	1697	+ return -EFAULT;
	1698	+
	1699	+ ret = sscanf(buf, "%x:%x:%x.%x", &domain, &bus, &dev, &fn);
	1700	+ if (ret != 4) {
	1701	+ pr_err("%s: expected 4 args, got %d\n", __func__, ret);
	1702	+ return -EINVAL;
	1703	+ }
	1704	+
	1705	+ pdev = pci_get_domain_bus_and_slot(domain, bus, (dev << 3) \| fn);
	1706	+ if (!pdev)
	1707	+ return -ENODEV;
	1708	+
	1709	+ edev = pci_dev_to_eeh_dev(pdev);
	1710	+ if (!edev) {
	1711	+ pci_err(pdev, "No eeh_dev for this device!\n");
	1712	+ pci_dev_put(pdev);
	1713	+ return -ENODEV;
	1714	+ }
	1715	+
	1716	+ ret = eeh_dev_check_failure(edev);
	1717	+ pci_info(pdev, "eeh_dev_check_failure(%04x:%02x:%02x.%01x) = %d\n",
	1718	+ domain, bus, dev, fn, ret);
	1719	+
	1720	+ pci_dev_put(pdev);
	1721	+
	1722	+ return count;
	1723	+}
	1724	+
	1725	+static const struct file_operations eeh_dev_check_fops = {
	1726	+ .open = simple_open,
	1727	+ .llseek = no_llseek,
	1728	+ .write = eeh_dev_check_write,
	1729	+ .read = eeh_debugfs_dev_usage,
	1730	+};
	1731	+
	1732	+static int eeh_debugfs_break_device(struct pci_dev *pdev)
	1733	+{
	1734	+ struct resource *bar = NULL;
	1735	+ void __iomem *mapped;
	1736	+ u16 old, bit;
	1737	+ int i, pos;
	1738	+
	1739	+ /* Do we have an MMIO BAR to disable? */
	1740	+ for (i = 0; i <= PCI_STD_RESOURCE_END; i++) {
	1741	+ struct resource *r = &pdev->resource[i];
	1742	+
	1743	+ if (!r->flags \|\| !r->start)
	1744	+ continue;
	1745	+ if (r->flags & IORESOURCE_IO)
	1746	+ continue;
	1747	+ if (r->flags & IORESOURCE_UNSET)
	1748	+ continue;
	1749	+
	1750	+ bar = r;
	1751	+ break;
	1752	+ }
	1753	+
	1754	+ if (!bar) {
	1755	+ pci_err(pdev, "Unable to find Memory BAR to cause EEH with\n");
	1756	+ return -ENXIO;
	1757	+ }
	1758	+
	1759	+ pci_err(pdev, "Going to break: %pR\n", bar);
	1760	+
	1761	+ if (pdev->is_virtfn) {
	1762	+#ifndef CONFIG_PCI_IOV
	1763	+ return -ENXIO;
	1764	+#else
	1765	+ /*
	1766	+ * VFs don't have a per-function COMMAND register, so the best
	1767	+ * we can do is clear the Memory Space Enable bit in the PF's
	1768	+ * SRIOV control reg.
	1769	+ *
	1770	+ * Unfortunately, this requires that we have a PF (i.e doesn't
	1771	+ * work for a passed-through VF) and it has the potential side
	1772	+ * effect of also causing an EEH on every other VF under the
	1773	+ * PF. Oh well.
	1774	+ */
	1775	+ pdev = pdev->physfn;
	1776	+ if (!pdev)
	1777	+ return -ENXIO; /* passed through VFs have no PF */
	1778	+
	1779	+ pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
	1780	+ pos += PCI_SRIOV_CTRL;
	1781	+ bit = PCI_SRIOV_CTRL_MSE;
	1782	+#endif /* !CONFIG_PCI_IOV */
	1783	+ } else {
	1784	+ bit = PCI_COMMAND_MEMORY;
	1785	+ pos = PCI_COMMAND;
	1786	+ }
	1787	+
	1788	+ /*
	1789	+ * Process here is:
	1790	+ *
	1791	+ * 1. Disable Memory space.
	1792	+ *
	1793	+ * 2. Perform an MMIO to the device. This should result in an error
	1794	+ * (CA / UR) being raised by the device which results in an EEH
	1795	+ * PE freeze. Using the in_8() accessor skips the eeh detection hook
	1796	+ * so the freeze hook so the EEH Detection machinery won't be
	1797	+ * triggered here. This is to match the usual behaviour of EEH
	1798	+ * where the HW will asyncronously freeze a PE and it's up to
	1799	+ * the kernel to notice and deal with it.
	1800	+ *
	1801	+ * 3. Turn Memory space back on. This is more important for VFs
	1802	+ * since recovery will probably fail if we don't. For normal
	1803	+ * the COMMAND register is reset as a part of re-initialising
	1804	+ * the device.
	1805	+ *
	1806	+ * Breaking stuff is the point so who cares if it's racy ;)
	1807	+ */
	1808	+ pci_read_config_word(pdev, pos, &old);
	1809	+
	1810	+ mapped = ioremap(bar->start, PAGE_SIZE);
	1811	+ if (!mapped) {
	1812	+ pci_err(pdev, "Unable to map MMIO BAR %pR\n", bar);
	1813	+ return -ENXIO;
	1814	+ }
	1815	+
	1816	+ pci_write_config_word(pdev, pos, old & ~bit);
	1817	+ in_8(mapped);
	1818	+ pci_write_config_word(pdev, pos, old);
	1819	+
	1820	+ iounmap(mapped);
	1821	+
1813	1822	return 0;
1814	1823	}
1815	1824
1816		-static int eeh_freeze_dbgfs_get(void data, u64 val)
	1825	+static ssize_t eeh_dev_break_write(struct file *filp,
	1826	+ const char __user *user_buf,
	1827	+ size_t count, loff_t *ppos)
1817	1828	{
1818		- *val = eeh_max_freezes;
1819		- return 0;
	1829	+ uint32_t domain, bus, dev, fn;
	1830	+ struct pci_dev *pdev;
	1831	+ char buf[20];
	1832	+ int ret;
	1833	+
	1834	+ memset(buf, 0, sizeof(buf));
	1835	+ ret = simple_write_to_buffer(buf, sizeof(buf)-1, ppos, user_buf, count);
	1836	+ if (!ret)
	1837	+ return -EFAULT;
	1838	+
	1839	+ ret = sscanf(buf, "%x:%x:%x.%x", &domain, &bus, &dev, &fn);
	1840	+ if (ret != 4) {
	1841	+ pr_err("%s: expected 4 args, got %d\n", __func__, ret);
	1842	+ return -EINVAL;
	1843	+ }
	1844	+
	1845	+ pdev = pci_get_domain_bus_and_slot(domain, bus, (dev << 3) \| fn);
	1846	+ if (!pdev)
	1847	+ return -ENODEV;
	1848	+
	1849	+ ret = eeh_debugfs_break_device(pdev);
	1850	+ pci_dev_put(pdev);
	1851	+
	1852	+ if (ret < 0)
	1853	+ return ret;
	1854	+
	1855	+ return count;
1820	1856	}
1821	1857
1822		-DEFINE_SIMPLE_ATTRIBUTE(eeh_enable_dbgfs_ops, eeh_enable_dbgfs_get,
1823		- eeh_enable_dbgfs_set, "0x%llx\n");
1824		-DEFINE_SIMPLE_ATTRIBUTE(eeh_freeze_dbgfs_ops, eeh_freeze_dbgfs_get,
1825		- eeh_freeze_dbgfs_set, "0x%llx\n");
	1858	+static const struct file_operations eeh_dev_break_fops = {
	1859	+ .open = simple_open,
	1860	+ .llseek = no_llseek,
	1861	+ .write = eeh_dev_break_write,
	1862	+ .read = eeh_debugfs_dev_usage,
	1863	+};
	1864	+
1826	1865	#endif
1827	1866
1828	1867	static int __init eeh_init_proc(void)
..	..	@@ -1830,12 +1869,24 @@
1830	1869	if (machine_is(pseries) \|\| machine_is(powernv)) {
1831	1870	proc_create_single("powerpc/eeh", 0, NULL, proc_eeh_show);
1832	1871	#ifdef CONFIG_DEBUG_FS
1833		- debugfs_create_file("eeh_enable", 0600,
1834		- powerpc_debugfs_root, NULL,
1835		- &eeh_enable_dbgfs_ops);
1836		- debugfs_create_file("eeh_max_freezes", 0600,
1837		- powerpc_debugfs_root, NULL,
1838		- &eeh_freeze_dbgfs_ops);
	1872	+ debugfs_create_file_unsafe("eeh_enable", 0600,
	1873	+ powerpc_debugfs_root, NULL,
	1874	+ &eeh_enable_dbgfs_ops);
	1875	+ debugfs_create_u32("eeh_max_freezes", 0600,
	1876	+ powerpc_debugfs_root, &eeh_max_freezes);
	1877	+ debugfs_create_bool("eeh_disable_recovery", 0600,
	1878	+ powerpc_debugfs_root,
	1879	+ &eeh_debugfs_no_recover);
	1880	+ debugfs_create_file_unsafe("eeh_dev_check", 0600,
	1881	+ powerpc_debugfs_root, NULL,
	1882	+ &eeh_dev_check_fops);
	1883	+ debugfs_create_file_unsafe("eeh_dev_break", 0600,
	1884	+ powerpc_debugfs_root, NULL,
	1885	+ &eeh_dev_break_fops);
	1886	+ debugfs_create_file_unsafe("eeh_force_recover", 0600,
	1887	+ powerpc_debugfs_root, NULL,
	1888	+ &eeh_force_recover_fops);
	1889	+ eeh_cache_debugfs_init();
1839	1890	#endif
1840	1891	}
1841	1892