change wifi driver to cypress

hc

2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390

 kernel/arch/powerpc/include/asm/sstep.h
..
..
@@ -1,11 +1,8 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
1
2
 /*
2
3
  * Copyright (C) 2004 Paul Mackerras <paulus@au.ibm.com>, IBM
3
- *
4
- * This program is free software; you can redistribute it and/or
5
- * modify it under the terms of the GNU General Public License
6
- * as published by the Free Software Foundation; either version
7
- * 2 of the License, or (at your option) any later version.
8
4
  */
5
+#include <asm/inst.h>
9
6
 
10
7
 struct pt_regs;
11
8
 
..
..
@@ -19,9 +16,9 @@
19
16
  * Note that IS_MTMSRD returns true for both an mtmsr (32-bit)
20
17
  * and an mtmsrd (64-bit).
21
18
  */
22
-#define IS_MTMSRD(instr)	(((instr) & 0xfc0007be) == 0x7c000124)
23
-#define IS_RFID(instr)		(((instr) & 0xfc0007fe) == 0x4c000024)
24
-#define IS_RFI(instr)		(((instr) & 0xfc0007fe) == 0x4c000064)
19
+#define IS_MTMSRD(instr)	((ppc_inst_val(instr) & 0xfc0007be) == 0x7c000124)
20
+#define IS_RFID(instr)		((ppc_inst_val(instr) & 0xfc0007fe) == 0x4c000024)
21
+#define IS_RFI(instr)		((ppc_inst_val(instr) & 0xfc0007fe) == 0x4c000064)
25
22
 
26
23
 enum instruction_type {
27
24
 	COMPUTE,		/* arith/logical/CR op, etc. */
..
..
@@ -43,6 +40,7 @@
43
40
 	CACHEOP,
44
41
 	BARRIER,
45
42
 	SYSCALL,
43
+	SYSCALL_VECTORED_0,
46
44
 	MFMSR,
47
45
 	MTMSR,
48
46
 	RFI,
..
..
@@ -52,6 +50,8 @@
52
50
 
53
51
 #define INSTR_TYPE_MASK	0x1f
54
52
 
53
+#define OP_IS_LOAD(type)	((LOAD <= (type) && (type) <= LOAD_VSX) || (type) == LARX)
54
+#define OP_IS_STORE(type)	((STORE <= (type) && (type) <= STORE_VSX) || (type) == STCX)
55
55
 #define OP_IS_LOAD_STORE(type)	(LOAD <= (type) && (type) <= STCX)
56
56
 
57
57
 /* Compute flags, ORed in with type */
..
..
@@ -93,13 +93,23 @@
93
93
 #define VSX_LDLEFT	4	/* load VSX register from left */
94
94
 #define VSX_CHECK_VEC	8	/* check MSR_VEC not MSR_VSX for reg >= 32 */
95
95
 
96
+/* Prefixed flag, ORed in with type */
97
+#define PREFIXED       0x800
98
+
96
99
 /* Size field in type word */
97
100
 #define SIZE(n)		((n) << 12)
98
101
 #define GETSIZE(w)	((w) >> 12)
99
102
 
100
103
 #define GETTYPE(t)	((t) & INSTR_TYPE_MASK)
104
+#define GETLENGTH(t)   (((t) & PREFIXED) ? 8 : 4)
101
105
 
102
106
 #define MKOP(t, f, s)	((t) | (f) | SIZE(s))
107
+
108
+/* Prefix instruction operands */
109
+#define GET_PREFIX_RA(i)	(((i) >> 16) & 0x1f)
110
+#define GET_PREFIX_R(i)		((i) & (1ul << 20))
111
+
112
+extern s32 patch__exec_instr;
103
113
 
104
114
 struct instruction_op {
105
115
 	int type;
..
..
@@ -136,7 +146,7 @@
136
146
  * otherwise.
137
147
  */
138
148
 extern int analyse_instr(struct instruction_op *op, const struct pt_regs *regs,
139
-			 unsigned int instr);
149
+			 struct ppc_inst instr);
140
150
 
141
151
 /*
142
152
  * Emulate an instruction that can be executed just by updating
..
..
@@ -153,7 +163,7 @@
153
163
  * 0 if it could not be emulated, or -1 for an instruction that
154
164
  * should not be emulated (rfid, mtmsrd clearing MSR_RI, etc.).
155
165
  */
156
-extern int emulate_step(struct pt_regs *regs, unsigned int instr);
166
+extern int emulate_step(struct pt_regs *regs, struct ppc_inst instr);
157
167
 
158
168
 /*
159
169
  * Emulate a load or store instruction by reading/writing the