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2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/arch/powerpc/include/asm/ppc-opcode.h
....@@ -1,10 +1,6 @@
1
+/* SPDX-License-Identifier: GPL-2.0-or-later */
12 /*
23  * Copyright 2009 Freescale Semiconductor, Inc.
3
- *
4
- * This program is free software; you can redistribute it and/or
5
- * modify it under the terms of the GNU General Public License
6
- * as published by the Free Software Foundation; either version
7
- * 2 of the License, or (at your option) any later version.
84  *
95  * provides masks and opcode images for use by code generation, emulation
106  * and for instructions that older assemblers might not know about
....@@ -80,6 +76,19 @@
8076 #define	__REGA0_R30	30
8177 #define	__REGA0_R31	31
8278 
79
+#define IMM_L(i)               ((uintptr_t)(i) & 0xffff)
80
+#define IMM_DS(i)              ((uintptr_t)(i) & 0xfffc)
81
+
82
+/*
83
+ * 16-bit immediate helper macros: HA() is for use with sign-extending instrs
84
+ * (e.g. LD, ADDI).  If the bottom 16 bits is "-ve", add another bit into the
85
+ * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
86
+ */
87
+#define IMM_H(i)                ((uintptr_t)(i)>>16)
88
+#define IMM_HA(i)               (((uintptr_t)(i)>>16) +                       \
89
+					(((uintptr_t)(i) & 0x8000) >> 15))
90
+
91
+
8392 /* opcode and xopcode for instructions */
8493 #define OP_TRAP 3
8594 #define OP_TRAP_64 2
....@@ -104,6 +113,7 @@
104113 #define OP_31_XOP_LHZUX     311
105114 #define OP_31_XOP_MSGSNDP   142
106115 #define OP_31_XOP_MSGCLRP   174
116
+#define OP_31_XOP_TLBIE     306
107117 #define OP_31_XOP_MFSPR     339
108118 #define OP_31_XOP_LWAX      341
109119 #define OP_31_XOP_LHAX      343
....@@ -161,6 +171,9 @@
161171 /* VMX Vector Store Instructions */
162172 #define OP_31_XOP_STVX          231
163173 
174
+/* Prefixed Instructions */
175
+#define OP_PREFIX		1
176
+
164177 #define OP_31   31
165178 #define OP_LWZ  32
166179 #define OP_STFS 52
....@@ -195,56 +208,29 @@
195208 #define OP_LQ    56
196209 
197210 /* sorted alphabetically */
198
-#define PPC_INST_BHRBE			0x7c00025c
199
-#define PPC_INST_CLRBHRB		0x7c00035c
211
+#define PPC_INST_BCCTR_FLUSH		0x4c400420
200212 #define PPC_INST_COPY			0x7c20060c
201
-#define PPC_INST_CP_ABORT		0x7c00068c
202
-#define PPC_INST_DARN			0x7c0005e6
203213 #define PPC_INST_DCBA			0x7c0005ec
204214 #define PPC_INST_DCBA_MASK		0xfc0007fe
205
-#define PPC_INST_DCBAL			0x7c2005ec
206
-#define PPC_INST_DCBZL			0x7c2007ec
207
-#define PPC_INST_ICBT			0x7c00002c
208
-#define PPC_INST_ICSWX			0x7c00032d
209
-#define PPC_INST_ICSWEPX		0x7c00076d
215
+#define PPC_INST_DSSALL			0x7e00066c
210216 #define PPC_INST_ISEL			0x7c00001e
211217 #define PPC_INST_ISEL_MASK		0xfc00003e
212
-#define PPC_INST_LDARX			0x7c0000a8
213
-#define PPC_INST_STDCX			0x7c0001ad
214
-#define PPC_INST_LQARX			0x7c000228
215
-#define PPC_INST_STQCX			0x7c00016d
216218 #define PPC_INST_LSWI			0x7c0004aa
217219 #define PPC_INST_LSWX			0x7c00042a
218
-#define PPC_INST_LWARX			0x7c000028
219
-#define PPC_INST_STWCX			0x7c00012d
220220 #define PPC_INST_LWSYNC			0x7c2004ac
221221 #define PPC_INST_SYNC			0x7c0004ac
222222 #define PPC_INST_SYNC_MASK		0xfc0007fe
223223 #define PPC_INST_ISYNC			0x4c00012c
224
-#define PPC_INST_LXVD2X			0x7c000698
225224 #define PPC_INST_MCRXR			0x7c000400
226225 #define PPC_INST_MCRXR_MASK		0xfc0007fe
227226 #define PPC_INST_MFSPR_PVR		0x7c1f42a6
228227 #define PPC_INST_MFSPR_PVR_MASK		0xfc1ffffe
229
-#define PPC_INST_MFTMR			0x7c0002dc
230
-#define PPC_INST_MSGSND			0x7c00019c
231
-#define PPC_INST_MSGCLR			0x7c0001dc
232
-#define PPC_INST_MSGSYNC		0x7c0006ec
233
-#define PPC_INST_MSGSNDP		0x7c00011c
234
-#define PPC_INST_MSGCLRP		0x7c00015c
235228 #define PPC_INST_MTMSRD			0x7c000164
236
-#define PPC_INST_MTTMR			0x7c0003dc
237229 #define PPC_INST_NOP			0x60000000
238
-#define PPC_INST_PASTE			0x7c20070d
239230 #define PPC_INST_POPCNTB		0x7c0000f4
240231 #define PPC_INST_POPCNTB_MASK		0xfc0007fe
241
-#define PPC_INST_POPCNTD		0x7c0003f4
242
-#define PPC_INST_POPCNTW		0x7c0002f4
243232 #define PPC_INST_RFEBB			0x4c000124
244
-#define PPC_INST_RFCI			0x4c000066
245
-#define PPC_INST_RFDI			0x4c00004e
246233 #define PPC_INST_RFID			0x4c000024
247
-#define PPC_INST_RFMCI			0x4c00004c
248234 #define PPC_INST_MFSPR			0x7c0002a6
249235 #define PPC_INST_MFSPR_DSCR		0x7c1102a6
250236 #define PPC_INST_MFSPR_DSCR_MASK	0xfc1ffffe
....@@ -254,127 +240,48 @@
254240 #define PPC_INST_MFSPR_DSCR_USER_MASK	0xfc1ffffe
255241 #define PPC_INST_MTSPR_DSCR_USER	0x7c0303a6
256242 #define PPC_INST_MTSPR_DSCR_USER_MASK	0xfc1ffffe
257
-#define PPC_INST_MFVSRD			0x7c000066
258
-#define PPC_INST_MTVSRD			0x7c000166
259
-#define PPC_INST_SLBFEE			0x7c0007a7
260
-#define PPC_INST_SLBIA			0x7c0003e4
261
-
243
+#define PPC_INST_SC			0x44000002
262244 #define PPC_INST_STRING			0x7c00042a
263245 #define PPC_INST_STRING_MASK		0xfc0007fe
264246 #define PPC_INST_STRING_GEN_MASK	0xfc00067e
265
-
266247 #define PPC_INST_STSWI			0x7c0005aa
267248 #define PPC_INST_STSWX			0x7c00052a
268
-#define PPC_INST_STXVD2X		0x7c000798
269
-#define PPC_INST_TLBIE			0x7c000264
270
-#define PPC_INST_TLBIEL			0x7c000224
271
-#define PPC_INST_TLBILX			0x7c000024
272
-#define PPC_INST_WAIT			0x7c00007c
273
-#define PPC_INST_TLBIVAX		0x7c000624
274
-#define PPC_INST_TLBSRX_DOT		0x7c0006a5
275
-#define PPC_INST_VPMSUMW		0x10000488
276
-#define PPC_INST_VPMSUMD		0x100004c8
277
-#define PPC_INST_VPERMXOR		0x1000002d
278
-#define PPC_INST_XXLOR			0xf0000490
279
-#define PPC_INST_XXSWAPD		0xf0000250
280
-#define PPC_INST_XVCPSGNDP		0xf0000780
281249 #define PPC_INST_TRECHKPT		0x7c0007dd
282250 #define PPC_INST_TRECLAIM		0x7c00075d
283
-#define PPC_INST_TABORT			0x7c00071d
284251 #define PPC_INST_TSR			0x7c0005dd
285
-
286
-#define PPC_INST_NAP			0x4c000364
287
-#define PPC_INST_SLEEP			0x4c0003a4
288
-#define PPC_INST_WINKLE			0x4c0003e4
289
-
290
-#define PPC_INST_STOP			0x4c0002e4
291
-
292
-/* A2 specific instructions */
293
-#define PPC_INST_ERATWE			0x7c0001a6
294
-#define PPC_INST_ERATRE			0x7c000166
295
-#define PPC_INST_ERATILX		0x7c000066
296
-#define PPC_INST_ERATIVAX		0x7c000666
297
-#define PPC_INST_ERATSX			0x7c000126
298
-#define PPC_INST_ERATSX_DOT		0x7c000127
299
-
300
-/* Misc instructions for BPF compiler */
301
-#define PPC_INST_LBZ			0x88000000
302252 #define PPC_INST_LD			0xe8000000
303
-#define PPC_INST_LDX			0x7c00002a
304
-#define PPC_INST_LHZ			0xa0000000
305
-#define PPC_INST_LWZ			0x80000000
306
-#define PPC_INST_LHBRX			0x7c00062c
307
-#define PPC_INST_LDBRX			0x7c000428
308
-#define PPC_INST_STB			0x98000000
309
-#define PPC_INST_STH			0xb0000000
310253 #define PPC_INST_STD			0xf8000000
311
-#define PPC_INST_STDX			0x7c00012a
312
-#define PPC_INST_STDU			0xf8000001
313
-#define PPC_INST_STW			0x90000000
314
-#define PPC_INST_STWU			0x94000000
315254 #define PPC_INST_MFLR			0x7c0802a6
316
-#define PPC_INST_MTLR			0x7c0803a6
317255 #define PPC_INST_MTCTR			0x7c0903a6
318
-#define PPC_INST_CMPWI			0x2c000000
319
-#define PPC_INST_CMPDI			0x2c200000
320
-#define PPC_INST_CMPW			0x7c000000
321
-#define PPC_INST_CMPD			0x7c200000
322
-#define PPC_INST_CMPLW			0x7c000040
323
-#define PPC_INST_CMPLD			0x7c200040
324
-#define PPC_INST_CMPLWI			0x28000000
325
-#define PPC_INST_CMPLDI			0x28200000
326256 #define PPC_INST_ADDI			0x38000000
327257 #define PPC_INST_ADDIS			0x3c000000
328258 #define PPC_INST_ADD			0x7c000214
329
-#define PPC_INST_SUB			0x7c000050
330259 #define PPC_INST_BLR			0x4e800020
331
-#define PPC_INST_BLRL			0x4e800021
332260 #define PPC_INST_BCTR			0x4e800420
333
-#define PPC_INST_MULLD			0x7c0001d2
334
-#define PPC_INST_MULLW			0x7c0001d6
335
-#define PPC_INST_MULHWU			0x7c000016
336
-#define PPC_INST_MULLI			0x1c000000
337
-#define PPC_INST_DIVWU			0x7c000396
261
+#define PPC_INST_BCTRL			0x4e800421
338262 #define PPC_INST_DIVD			0x7c0003d2
339
-#define PPC_INST_DIVDU			0x7c000392
340
-#define PPC_INST_RLWINM			0x54000000
341
-#define PPC_INST_RLWIMI			0x50000000
342
-#define PPC_INST_RLDICL			0x78000000
343263 #define PPC_INST_RLDICR			0x78000004
344
-#define PPC_INST_SLW			0x7c000030
345
-#define PPC_INST_SLD			0x7c000036
346
-#define PPC_INST_SRW			0x7c000430
347
-#define PPC_INST_SRD			0x7c000436
348
-#define PPC_INST_SRAD			0x7c000634
349
-#define PPC_INST_SRADI			0x7c000674
350
-#define PPC_INST_AND			0x7c000038
351
-#define PPC_INST_ANDDOT			0x7c000039
352
-#define PPC_INST_OR			0x7c000378
353
-#define PPC_INST_XOR			0x7c000278
354
-#define PPC_INST_ANDI			0x70000000
355264 #define PPC_INST_ORI			0x60000000
356265 #define PPC_INST_ORIS			0x64000000
357
-#define PPC_INST_XORI			0x68000000
358
-#define PPC_INST_XORIS			0x6c000000
359
-#define PPC_INST_NEG			0x7c0000d0
360
-#define PPC_INST_EXTSW			0x7c0007b4
361266 #define PPC_INST_BRANCH			0x48000000
362267 #define PPC_INST_BRANCH_COND		0x40800000
363
-#define PPC_INST_LBZCIX			0x7c0006aa
364
-#define PPC_INST_STBCIX			0x7c0007aa
365
-#define PPC_INST_LWZX			0x7c00002e
366
-#define PPC_INST_LFSX			0x7c00042e
367
-#define PPC_INST_STFSX			0x7c00052e
368
-#define PPC_INST_LFDX			0x7c0004ae
369
-#define PPC_INST_STFDX			0x7c0005ae
370
-#define PPC_INST_LVX			0x7c0000ce
371
-#define PPC_INST_STVX			0x7c0001ce
372
-#define PPC_INST_VCMPEQUD		0x100000c7
373
-#define PPC_INST_VCMPEQUB		0x10000006
268
+
269
+/* Prefixes */
270
+#define PPC_INST_LFS			0xc0000000
271
+#define PPC_INST_STFS			0xd0000000
272
+#define PPC_INST_LFD			0xc8000000
273
+#define PPC_INST_STFD			0xd8000000
274
+#define PPC_PREFIX_MLS			0x06000000
275
+#define PPC_PREFIX_8LS			0x04000000
276
+
277
+/* Prefixed instructions */
278
+#define PPC_INST_PLD			0xe4000000
279
+#define PPC_INST_PSTD			0xf4000000
374280 
375281 /* macros to insert fields into opcodes */
376282 #define ___PPC_RA(a)	(((a) & 0x1f) << 16)
377283 #define ___PPC_RB(b)	(((b) & 0x1f) << 11)
284
+#define ___PPC_RC(c)	(((c) & 0x1f) << 6)
378285 #define ___PPC_RS(s)	(((s) & 0x1f) << 21)
379286 #define ___PPC_RT(t)	___PPC_RS(t)
380287 #define ___PPC_R(r)	(((r) & 0x1) << 16)
....@@ -394,7 +301,7 @@
394301 #define __PPC_WS(w)	(((w) & 0x1f) << 11)
395302 #define __PPC_SH(s)	__PPC_WS(s)
396303 #define __PPC_SH64(s)	(__PPC_SH(s) | (((s) & 0x20) >> 4))
397
-#define __PPC_MB(s)	(((s) & 0x1f) << 6)
304
+#define __PPC_MB(s)	___PPC_RC(s)
398305 #define __PPC_ME(s)	(((s) & 0x1f) << 1)
399306 #define __PPC_MB64(s)	(__PPC_MB(s) | ((s) & 0x20))
400307 #define __PPC_ME64(s)	__PPC_MB64(s)
....@@ -402,6 +309,16 @@
402309 #define __PPC_CT(t)	(((t) & 0x0f) << 21)
403310 #define __PPC_SPR(r)	((((r) & 0x1f) << 16) | ((((r) >> 5) & 0x1f) << 11))
404311 #define __PPC_RC21	(0x1 << 10)
312
+#define __PPC_PRFX_R(r)	(((r) & 0x1) << 20)
313
+
314
+/*
315
+ * Both low and high 16 bits are added as SIGNED additions, so if low 16 bits
316
+ * has high bit set, high 16 bits must be adjusted. These macros do that (stolen
317
+ * from binutils).
318
+ */
319
+#define PPC_LO(v)	((v) & 0xffff)
320
+#define PPC_HI(v)	(((v) >> 16) & 0xffff)
321
+#define PPC_HA(v)	PPC_HI((v) + 0x8000)
405322 
406323 /*
407324  * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
....@@ -413,172 +330,293 @@
413330 #define __PPC_EH(eh)	0
414331 #endif
415332 
416
-/* Deal with instructions that older assemblers aren't aware of */
417
-#define	PPC_CP_ABORT		stringify_in_c(.long PPC_INST_CP_ABORT)
418
-#define	PPC_COPY(a, b)		stringify_in_c(.long PPC_INST_COPY | \
419
-					___PPC_RA(a) | ___PPC_RB(b))
420
-#define PPC_DARN(t, l)		stringify_in_c(.long PPC_INST_DARN |  \
421
-						___PPC_RT(t)	   |  \
422
-						(((l) & 0x3) << 16))
423
-#define	PPC_DCBAL(a, b)		stringify_in_c(.long PPC_INST_DCBAL | \
424
-					__PPC_RA(a) | __PPC_RB(b))
425
-#define	PPC_DCBZL(a, b)		stringify_in_c(.long PPC_INST_DCBZL | \
426
-					__PPC_RA(a) | __PPC_RB(b))
427
-#define PPC_LQARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LQARX | \
428
-					___PPC_RT(t) | ___PPC_RA(a) | \
429
-					___PPC_RB(b) | __PPC_EH(eh))
430
-#define PPC_LDARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LDARX | \
431
-					___PPC_RT(t) | ___PPC_RA(a) | \
432
-					___PPC_RB(b) | __PPC_EH(eh))
433
-#define PPC_LWARX(t, a, b, eh)	stringify_in_c(.long PPC_INST_LWARX | \
434
-					___PPC_RT(t) | ___PPC_RA(a) | \
435
-					___PPC_RB(b) | __PPC_EH(eh))
436
-#define PPC_STQCX(t, a, b)	stringify_in_c(.long PPC_INST_STQCX | \
437
-					___PPC_RT(t) | ___PPC_RA(a) | \
438
-					___PPC_RB(b))
439
-#define PPC_MSGSND(b)		stringify_in_c(.long PPC_INST_MSGSND | \
440
-					___PPC_RB(b))
441
-#define PPC_MSGSYNC		stringify_in_c(.long PPC_INST_MSGSYNC)
442
-#define PPC_MSGCLR(b)		stringify_in_c(.long PPC_INST_MSGCLR | \
443
-					___PPC_RB(b))
444
-#define PPC_MSGSNDP(b)		stringify_in_c(.long PPC_INST_MSGSNDP | \
445
-					___PPC_RB(b))
446
-#define PPC_MSGCLRP(b)		stringify_in_c(.long PPC_INST_MSGCLRP | \
447
-					___PPC_RB(b))
448
-#define PPC_PASTE(a, b)		stringify_in_c(.long PPC_INST_PASTE | \
449
-					___PPC_RA(a) | ___PPC_RB(b))
450
-#define PPC_POPCNTB(a, s)	stringify_in_c(.long PPC_INST_POPCNTB | \
451
-					__PPC_RA(a) | __PPC_RS(s))
452
-#define PPC_POPCNTD(a, s)	stringify_in_c(.long PPC_INST_POPCNTD | \
453
-					__PPC_RA(a) | __PPC_RS(s))
454
-#define PPC_POPCNTW(a, s)	stringify_in_c(.long PPC_INST_POPCNTW | \
455
-					__PPC_RA(a) | __PPC_RS(s))
456
-#define PPC_RFCI		stringify_in_c(.long PPC_INST_RFCI)
457
-#define PPC_RFDI		stringify_in_c(.long PPC_INST_RFDI)
458
-#define PPC_RFMCI		stringify_in_c(.long PPC_INST_RFMCI)
459
-#define PPC_TLBILX(t, a, b)	stringify_in_c(.long PPC_INST_TLBILX | \
460
-					__PPC_T_TLB(t) | __PPC_RA0(a) | __PPC_RB(b))
461
-#define PPC_TLBILX_ALL(a, b)	PPC_TLBILX(0, a, b)
462
-#define PPC_TLBILX_PID(a, b)	PPC_TLBILX(1, a, b)
463
-#define PPC_TLBILX_VA(a, b)	PPC_TLBILX(3, a, b)
464
-#define PPC_WAIT(w)		stringify_in_c(.long PPC_INST_WAIT | \
465
-					__PPC_WC(w))
466
-#define PPC_TLBIE(lp,a) 	stringify_in_c(.long PPC_INST_TLBIE | \
467
-					       ___PPC_RB(a) | ___PPC_RS(lp))
468
-#define	PPC_TLBIE_5(rb,rs,ric,prs,r) \
469
-				stringify_in_c(.long PPC_INST_TLBIE | \
470
-					___PPC_RB(rb) | ___PPC_RS(rs) | \
471
-					___PPC_RIC(ric) | ___PPC_PRS(prs) | \
472
-					___PPC_R(r))
473
-#define	PPC_TLBIEL(rb,rs,ric,prs,r) \
474
-				stringify_in_c(.long PPC_INST_TLBIEL | \
475
-					___PPC_RB(rb) | ___PPC_RS(rs) | \
476
-					___PPC_RIC(ric) | ___PPC_PRS(prs) | \
477
-					___PPC_R(r))
478
-#define PPC_TLBSRX_DOT(a,b)	stringify_in_c(.long PPC_INST_TLBSRX_DOT | \
479
-					__PPC_RA0(a) | __PPC_RB(b))
480
-#define PPC_TLBIVAX(a,b)	stringify_in_c(.long PPC_INST_TLBIVAX | \
481
-					__PPC_RA0(a) | __PPC_RB(b))
482
-
483
-#define PPC_ERATWE(s, a, w)	stringify_in_c(.long PPC_INST_ERATWE | \
484
-					__PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
485
-#define PPC_ERATRE(s, a, w)	stringify_in_c(.long PPC_INST_ERATRE | \
486
-					__PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
487
-#define PPC_ERATILX(t, a, b)	stringify_in_c(.long PPC_INST_ERATILX | \
488
-					__PPC_T_TLB(t) | __PPC_RA0(a) | \
489
-					__PPC_RB(b))
490
-#define PPC_ERATIVAX(s, a, b)	stringify_in_c(.long PPC_INST_ERATIVAX | \
491
-					__PPC_RS(s) | __PPC_RA0(a) | __PPC_RB(b))
492
-#define PPC_ERATSX(t, a, w)	stringify_in_c(.long PPC_INST_ERATSX | \
493
-					__PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
494
-#define PPC_ERATSX_DOT(t, a, w)	stringify_in_c(.long PPC_INST_ERATSX_DOT | \
495
-					__PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
496
-#define PPC_SLBFEE_DOT(t, b)	stringify_in_c(.long PPC_INST_SLBFEE | \
497
-					__PPC_RT(t) | __PPC_RB(b))
498
-#define PPC_ICBT(c,a,b)		stringify_in_c(.long PPC_INST_ICBT | \
499
-				       __PPC_CT(c) | __PPC_RA0(a) | __PPC_RB(b))
500
-/* PASemi instructions */
501
-#define LBZCIX(t,a,b)		stringify_in_c(.long PPC_INST_LBZCIX | \
502
-				       __PPC_RT(t) | __PPC_RA(a) | __PPC_RB(b))
503
-#define STBCIX(s,a,b)		stringify_in_c(.long PPC_INST_STBCIX | \
504
-				       __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b))
505
-
333
+/* Base instruction encoding */
334
+#define PPC_RAW_CP_ABORT		(0x7c00068c)
335
+#define PPC_RAW_COPY(a, b)		(PPC_INST_COPY | ___PPC_RA(a) | ___PPC_RB(b))
336
+#define PPC_RAW_DARN(t, l)		(0x7c0005e6 | ___PPC_RT(t) | (((l) & 0x3) << 16))
337
+#define PPC_RAW_DCBAL(a, b)		(0x7c2005ec | __PPC_RA(a) | __PPC_RB(b))
338
+#define PPC_RAW_DCBZL(a, b)		(0x7c2007ec | __PPC_RA(a) | __PPC_RB(b))
339
+#define PPC_RAW_LQARX(t, a, b, eh)	(0x7c000228 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | __PPC_EH(eh))
340
+#define PPC_RAW_LDARX(t, a, b, eh)	(0x7c0000a8 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | __PPC_EH(eh))
341
+#define PPC_RAW_LWARX(t, a, b, eh)	(0x7c000028 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | __PPC_EH(eh))
342
+#define PPC_RAW_PHWSYNC			(0x7c8004ac)
343
+#define PPC_RAW_PLWSYNC			(0x7ca004ac)
344
+#define PPC_RAW_STQCX(t, a, b)		(0x7c00016d | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
345
+#define PPC_RAW_MADDHD(t, a, b, c)	(0x10000030 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | ___PPC_RC(c))
346
+#define PPC_RAW_MADDHDU(t, a, b, c)	(0x10000031 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | ___PPC_RC(c))
347
+#define PPC_RAW_MADDLD(t, a, b, c)	(0x10000033 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | ___PPC_RC(c))
348
+#define PPC_RAW_MSGSND(b)		(0x7c00019c | ___PPC_RB(b))
349
+#define PPC_RAW_MSGSYNC			(0x7c0006ec)
350
+#define PPC_RAW_MSGCLR(b)		(0x7c0001dc | ___PPC_RB(b))
351
+#define PPC_RAW_MSGSNDP(b)		(0x7c00011c | ___PPC_RB(b))
352
+#define PPC_RAW_MSGCLRP(b)		(0x7c00015c | ___PPC_RB(b))
353
+#define PPC_RAW_PASTE(a, b)		(0x7c20070d | ___PPC_RA(a) | ___PPC_RB(b))
354
+#define PPC_RAW_POPCNTB(a, s)		(PPC_INST_POPCNTB | __PPC_RA(a) | __PPC_RS(s))
355
+#define PPC_RAW_POPCNTD(a, s)		(0x7c0003f4 | __PPC_RA(a) | __PPC_RS(s))
356
+#define PPC_RAW_POPCNTW(a, s)		(0x7c0002f4 | __PPC_RA(a) | __PPC_RS(s))
357
+#define PPC_RAW_RFCI			(0x4c000066)
358
+#define PPC_RAW_RFDI			(0x4c00004e)
359
+#define PPC_RAW_RFMCI			(0x4c00004c)
360
+#define PPC_RAW_TLBILX(t, a, b)		(0x7c000024 | __PPC_T_TLB(t) | 	__PPC_RA0(a) | __PPC_RB(b))
361
+#define PPC_RAW_WAIT(w)			(0x7c00007c | __PPC_WC(w))
362
+#define PPC_RAW_TLBIE(lp, a)		(0x7c000264 | ___PPC_RB(a) | ___PPC_RS(lp))
363
+#define PPC_RAW_TLBIE_5(rb, rs, ric, prs, r) \
364
+	(0x7c000264 | ___PPC_RB(rb) | ___PPC_RS(rs) | ___PPC_RIC(ric) | ___PPC_PRS(prs) | ___PPC_R(r))
365
+#define PPC_RAW_TLBIEL(rb, rs, ric, prs, r) \
366
+	(0x7c000224 | ___PPC_RB(rb) | ___PPC_RS(rs) | ___PPC_RIC(ric) | ___PPC_PRS(prs) | ___PPC_R(r))
367
+#define PPC_RAW_TLBSRX_DOT(a, b)	(0x7c0006a5 | __PPC_RA0(a) | __PPC_RB(b))
368
+#define PPC_RAW_TLBIVAX(a, b)		(0x7c000624 | __PPC_RA0(a) | __PPC_RB(b))
369
+#define PPC_RAW_ERATWE(s, a, w)		(0x7c0001a6 | __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
370
+#define PPC_RAW_ERATRE(s, a, w)		(0x7c000166 | __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
371
+#define PPC_RAW_ERATILX(t, a, b)	(0x7c000066 | __PPC_T_TLB(t) | __PPC_RA0(a) | __PPC_RB(b))
372
+#define PPC_RAW_ERATIVAX(s, a, b)	(0x7c000666 | __PPC_RS(s) | __PPC_RA0(a) | __PPC_RB(b))
373
+#define PPC_RAW_ERATSX(t, a, w)		(0x7c000126 | __PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
374
+#define PPC_RAW_ERATSX_DOT(t, a, w)	(0x7c000127 | __PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
375
+#define PPC_RAW_SLBFEE_DOT(t, b)	(0x7c0007a7 | __PPC_RT(t) | __PPC_RB(b))
376
+#define __PPC_RAW_SLBFEE_DOT(t, b)	(0x7c0007a7 | ___PPC_RT(t) | ___PPC_RB(b))
377
+#define PPC_RAW_ICBT(c, a, b)		(0x7c00002c | __PPC_CT(c) | __PPC_RA0(a) | __PPC_RB(b))
378
+#define PPC_RAW_LBZCIX(t, a, b)		(0x7c0006aa | __PPC_RT(t) | __PPC_RA(a) | __PPC_RB(b))
379
+#define PPC_RAW_STBCIX(s, a, b)		(0x7c0007aa | __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b))
380
+#define PPC_RAW_DCBFPS(a, b)		(0x7c0000ac | ___PPC_RA(a) | ___PPC_RB(b) | (4 << 21))
381
+#define PPC_RAW_DCBSTPS(a, b)		(0x7c0000ac | ___PPC_RA(a) | ___PPC_RB(b) | (6 << 21))
506382 /*
507383  * Define what the VSX XX1 form instructions will look like, then add
508384  * the 128 bit load store instructions based on that.
509385  */
510
-#define VSX_XX1(s, a, b)	(__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
511
-#define VSX_XX3(t, a, b)	(__PPC_XT(t) | __PPC_XA(a) | __PPC_XB(b))
512
-#define STXVD2X(s, a, b)	stringify_in_c(.long PPC_INST_STXVD2X | \
513
-					       VSX_XX1((s), a, b))
514
-#define LXVD2X(s, a, b)		stringify_in_c(.long PPC_INST_LXVD2X | \
515
-					       VSX_XX1((s), a, b))
516
-#define MFVRD(a, t)		stringify_in_c(.long PPC_INST_MFVSRD | \
517
-					       VSX_XX1((t)+32, a, R0))
518
-#define MTVRD(t, a)		stringify_in_c(.long PPC_INST_MTVSRD | \
519
-					       VSX_XX1((t)+32, a, R0))
520
-#define VPMSUMW(t, a, b)	stringify_in_c(.long PPC_INST_VPMSUMW | \
521
-					       VSX_XX3((t), a, b))
522
-#define VPMSUMD(t, a, b)	stringify_in_c(.long PPC_INST_VPMSUMD | \
523
-					       VSX_XX3((t), a, b))
524
-#define XXLOR(t, a, b)		stringify_in_c(.long PPC_INST_XXLOR | \
525
-					       VSX_XX3((t), a, b))
526
-#define XXSWAPD(t, a)		stringify_in_c(.long PPC_INST_XXSWAPD | \
527
-					       VSX_XX3((t), a, a))
528
-#define XVCPSGNDP(t, a, b)	stringify_in_c(.long (PPC_INST_XVCPSGNDP | \
529
-					       VSX_XX3((t), (a), (b))))
386
+#define VSX_XX1(s, a, b)		(__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
387
+#define VSX_XX3(t, a, b)		(__PPC_XT(t) | __PPC_XA(a) | __PPC_XB(b))
388
+#define PPC_RAW_STXVD2X(s, a, b)	(0x7c000798 | VSX_XX1((s), a, b))
389
+#define PPC_RAW_LXVD2X(s, a, b)		(0x7c000698 | VSX_XX1((s), a, b))
390
+#define PPC_RAW_MFVRD(a, t)		(0x7c000066 | VSX_XX1((t) + 32, a, R0))
391
+#define PPC_RAW_MTVRD(t, a)		(0x7c000166 | VSX_XX1((t) + 32, a, R0))
392
+#define PPC_RAW_VPMSUMW(t, a, b)	(0x10000488 | VSX_XX3((t), a, b))
393
+#define PPC_RAW_VPMSUMD(t, a, b)	(0x100004c8 | VSX_XX3((t), a, b))
394
+#define PPC_RAW_XXLOR(t, a, b)		(0xf0000490 | VSX_XX3((t), a, b))
395
+#define PPC_RAW_XXSWAPD(t, a)		(0xf0000250 | VSX_XX3((t), a, a))
396
+#define PPC_RAW_XVCPSGNDP(t, a, b)	((0xf0000780 | VSX_XX3((t), (a), (b))))
397
+#define PPC_RAW_VPERMXOR(vrt, vra, vrb, vrc) \
398
+	((0x1000002d | ___PPC_RT(vrt) | ___PPC_RA(vra) | ___PPC_RB(vrb) | (((vrc) & 0x1f) << 6)))
399
+#define PPC_RAW_NAP			(0x4c000364)
400
+#define PPC_RAW_SLEEP			(0x4c0003a4)
401
+#define PPC_RAW_WINKLE			(0x4c0003e4)
402
+#define PPC_RAW_STOP			(0x4c0002e4)
403
+#define PPC_RAW_CLRBHRB			(0x7c00035c)
404
+#define PPC_RAW_MFBHRBE(r, n)		(0x7c00025c | __PPC_RT(r) | (((n) & 0x3ff) << 11))
405
+#define PPC_RAW_TRECHKPT		(PPC_INST_TRECHKPT)
406
+#define PPC_RAW_TRECLAIM(r)		(PPC_INST_TRECLAIM | __PPC_RA(r))
407
+#define PPC_RAW_TABORT(r)		(0x7c00071d | __PPC_RA(r))
408
+#define TMRN(x)				((((x) & 0x1f) << 16) | (((x) & 0x3e0) << 6))
409
+#define PPC_RAW_MTTMR(tmr, r)		(0x7c0003dc | TMRN(tmr) | ___PPC_RS(r))
410
+#define PPC_RAW_MFTMR(tmr, r)		(0x7c0002dc | TMRN(tmr) | ___PPC_RT(r))
411
+#define PPC_RAW_ICSWX(s, a, b)		(0x7c00032d | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
412
+#define PPC_RAW_ICSWEPX(s, a, b)	(0x7c00076d | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
413
+#define PPC_RAW_SLBIA(IH)		(0x7c0003e4 | (((IH) & 0x7) << 21))
414
+#define PPC_RAW_VCMPEQUD_RC(vrt, vra, vrb) \
415
+	(0x100000c7 | ___PPC_RT(vrt) | ___PPC_RA(vra) | ___PPC_RB(vrb) | __PPC_RC21)
416
+#define PPC_RAW_VCMPEQUB_RC(vrt, vra, vrb) \
417
+	(0x10000006 | ___PPC_RT(vrt) | ___PPC_RA(vra) | ___PPC_RB(vrb) | __PPC_RC21)
418
+#define PPC_RAW_LD(r, base, i)		(PPC_INST_LD | ___PPC_RT(r) | ___PPC_RA(base) | IMM_DS(i))
419
+#define PPC_RAW_LWZ(r, base, i)		(0x80000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))
420
+#define PPC_RAW_LWZX(t, a, b)		(0x7c00002e | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
421
+#define PPC_RAW_STD(r, base, i)		(PPC_INST_STD | ___PPC_RS(r) | ___PPC_RA(base) | IMM_DS(i))
422
+#define PPC_RAW_STDCX(s, a, b)		(0x7c0001ad | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
423
+#define PPC_RAW_LFSX(t, a, b)		(0x7c00042e | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
424
+#define PPC_RAW_STFSX(s, a, b)		(0x7c00052e | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
425
+#define PPC_RAW_LFDX(t, a, b)		(0x7c0004ae | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
426
+#define PPC_RAW_STFDX(s, a, b)		(0x7c0005ae | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
427
+#define PPC_RAW_LVX(t, a, b)		(0x7c0000ce | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
428
+#define PPC_RAW_STVX(s, a, b)		(0x7c0001ce | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
429
+#define PPC_RAW_ADD(t, a, b)		(PPC_INST_ADD | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
430
+#define PPC_RAW_ADD_DOT(t, a, b)	(PPC_INST_ADD | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | 0x1)
431
+#define PPC_RAW_ADDC(t, a, b)		(0x7c000014 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
432
+#define PPC_RAW_ADDC_DOT(t, a, b)	(0x7c000014 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | 0x1)
433
+#define PPC_RAW_NOP()			(PPC_INST_NOP)
434
+#define PPC_RAW_BLR()			(PPC_INST_BLR)
435
+#define PPC_RAW_BLRL()			(0x4e800021)
436
+#define PPC_RAW_MTLR(r)			(0x7c0803a6 | ___PPC_RT(r))
437
+#define PPC_RAW_BCTR()			(PPC_INST_BCTR)
438
+#define PPC_RAW_MTCTR(r)		(PPC_INST_MTCTR | ___PPC_RT(r))
439
+#define PPC_RAW_ADDI(d, a, i)		(PPC_INST_ADDI | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
440
+#define PPC_RAW_LI(r, i)		PPC_RAW_ADDI(r, 0, i)
441
+#define PPC_RAW_ADDIS(d, a, i)		(PPC_INST_ADDIS | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
442
+#define PPC_RAW_LIS(r, i)		PPC_RAW_ADDIS(r, 0, i)
443
+#define PPC_RAW_STDX(r, base, b)	(0x7c00012a | ___PPC_RS(r) | ___PPC_RA(base) | ___PPC_RB(b))
444
+#define PPC_RAW_STDU(r, base, i)	(0xf8000001 | ___PPC_RS(r) | ___PPC_RA(base) | ((i) & 0xfffc))
445
+#define PPC_RAW_STW(r, base, i)		(0x90000000 | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))
446
+#define PPC_RAW_STWU(r, base, i)	(0x94000000 | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))
447
+#define PPC_RAW_STH(r, base, i)		(0xb0000000 | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))
448
+#define PPC_RAW_STB(r, base, i)		(0x98000000 | ___PPC_RS(r) | ___PPC_RA(base) | IMM_L(i))
449
+#define PPC_RAW_LBZ(r, base, i)		(0x88000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))
450
+#define PPC_RAW_LDX(r, base, b)		(0x7c00002a | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
451
+#define PPC_RAW_LHZ(r, base, i)		(0xa0000000 | ___PPC_RT(r) | ___PPC_RA(base) | IMM_L(i))
452
+#define PPC_RAW_LHBRX(r, base, b)	(0x7c00062c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
453
+#define PPC_RAW_LWBRX(r, base, b)	(0x7c00042c | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
454
+#define PPC_RAW_LDBRX(r, base, b)	(0x7c000428 | ___PPC_RT(r) | ___PPC_RA(base) | ___PPC_RB(b))
455
+#define PPC_RAW_STWCX(s, a, b)		(0x7c00012d | ___PPC_RS(s) | ___PPC_RA(a) | ___PPC_RB(b))
456
+#define PPC_RAW_CMPWI(a, i)		(0x2c000000 | ___PPC_RA(a) | IMM_L(i))
457
+#define PPC_RAW_CMPDI(a, i)		(0x2c200000 | ___PPC_RA(a) | IMM_L(i))
458
+#define PPC_RAW_CMPW(a, b)		(0x7c000000 | ___PPC_RA(a) | ___PPC_RB(b))
459
+#define PPC_RAW_CMPD(a, b)		(0x7c200000 | ___PPC_RA(a) | ___PPC_RB(b))
460
+#define PPC_RAW_CMPLWI(a, i)		(0x28000000 | ___PPC_RA(a) | IMM_L(i))
461
+#define PPC_RAW_CMPLDI(a, i)		(0x28200000 | ___PPC_RA(a) | IMM_L(i))
462
+#define PPC_RAW_CMPLW(a, b)		(0x7c000040 | ___PPC_RA(a) | ___PPC_RB(b))
463
+#define PPC_RAW_CMPLD(a, b)		(0x7c200040 | ___PPC_RA(a) | ___PPC_RB(b))
464
+#define PPC_RAW_SUB(d, a, b)		(0x7c000050 | ___PPC_RT(d) | ___PPC_RB(a) | ___PPC_RA(b))
465
+#define PPC_RAW_MULD(d, a, b)		(0x7c0001d2 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
466
+#define PPC_RAW_MULW(d, a, b)		(0x7c0001d6 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
467
+#define PPC_RAW_MULHWU(d, a, b)		(0x7c000016 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
468
+#define PPC_RAW_MULI(d, a, i)		(0x1c000000 | ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
469
+#define PPC_RAW_DIVWU(d, a, b)		(0x7c000396 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
470
+#define PPC_RAW_DIVDU(d, a, b)		(0x7c000392 | ___PPC_RT(d) | ___PPC_RA(a) | ___PPC_RB(b))
471
+#define PPC_RAW_DIVDE(t, a, b)		(0x7c000352 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
472
+#define PPC_RAW_DIVDE_DOT(t, a, b)	(0x7c000352 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | 0x1)
473
+#define PPC_RAW_DIVDEU(t, a, b)		(0x7c000312 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b))
474
+#define PPC_RAW_DIVDEU_DOT(t, a, b)	(0x7c000312 | ___PPC_RT(t) | ___PPC_RA(a) | ___PPC_RB(b) | 0x1)
475
+#define PPC_RAW_AND(d, a, b)		(0x7c000038 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))
476
+#define PPC_RAW_ANDI(d, a, i)		(0x70000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))
477
+#define PPC_RAW_AND_DOT(d, a, b)	(0x7c000039 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))
478
+#define PPC_RAW_OR(d, a, b)		(0x7c000378 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))
479
+#define PPC_RAW_MR(d, a)		PPC_RAW_OR(d, a, a)
480
+#define PPC_RAW_ORI(d, a, i)		(PPC_INST_ORI | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))
481
+#define PPC_RAW_ORIS(d, a, i)		(PPC_INST_ORIS | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))
482
+#define PPC_RAW_XOR(d, a, b)		(0x7c000278 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(b))
483
+#define PPC_RAW_XORI(d, a, i)		(0x68000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))
484
+#define PPC_RAW_XORIS(d, a, i)		(0x6c000000 | ___PPC_RA(d) | ___PPC_RS(a) | IMM_L(i))
485
+#define PPC_RAW_EXTSW(d, a)		(0x7c0007b4 | ___PPC_RA(d) | ___PPC_RS(a))
486
+#define PPC_RAW_SLW(d, a, s)		(0x7c000030 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))
487
+#define PPC_RAW_SLD(d, a, s)		(0x7c000036 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))
488
+#define PPC_RAW_SRW(d, a, s)		(0x7c000430 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))
489
+#define PPC_RAW_SRAW(d, a, s)		(0x7c000630 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))
490
+#define PPC_RAW_SRAWI(d, a, i)		(0x7c000670 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i))
491
+#define PPC_RAW_SRD(d, a, s)		(0x7c000436 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))
492
+#define PPC_RAW_SRAD(d, a, s)		(0x7c000634 | ___PPC_RA(d) | ___PPC_RS(a) | ___PPC_RB(s))
493
+#define PPC_RAW_SRADI(d, a, i)		(0x7c000674 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i))
494
+#define PPC_RAW_RLWINM(d, a, i, mb, me)	(0x54000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))
495
+#define PPC_RAW_RLWINM_DOT(d, a, i, mb, me) \
496
+					(0x54000001 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))
497
+#define PPC_RAW_RLWIMI(d, a, i, mb, me) (0x50000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH(i) | __PPC_MB(mb) | __PPC_ME(me))
498
+#define PPC_RAW_RLDICL(d, a, i, mb)     (0x78000000 | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_MB64(mb))
499
+#define PPC_RAW_RLDICR(d, a, i, me)     (PPC_INST_RLDICR | ___PPC_RA(d) | ___PPC_RS(a) | __PPC_SH64(i) | __PPC_ME64(me))
500
+
501
+/* slwi = rlwinm Rx, Ry, n, 0, 31-n */
502
+#define PPC_RAW_SLWI(d, a, i)		PPC_RAW_RLWINM(d, a, i, 0, 31-(i))
503
+/* srwi = rlwinm Rx, Ry, 32-n, n, 31 */
504
+#define PPC_RAW_SRWI(d, a, i)		PPC_RAW_RLWINM(d, a, 32-(i), i, 31)
505
+/* sldi = rldicr Rx, Ry, n, 63-n */
506
+#define PPC_RAW_SLDI(d, a, i)		PPC_RAW_RLDICR(d, a, i, 63-(i))
507
+/* sldi = rldicl Rx, Ry, 64-n, n */
508
+#define PPC_RAW_SRDI(d, a, i)		PPC_RAW_RLDICL(d, a, 64-(i), i)
509
+
510
+#define PPC_RAW_NEG(d, a)		(0x7c0000d0 | ___PPC_RT(d) | ___PPC_RA(a))
511
+
512
+/* Deal with instructions that older assemblers aren't aware of */
513
+#define	PPC_BCCTR_FLUSH		stringify_in_c(.long PPC_INST_BCCTR_FLUSH)
514
+#define	PPC_CP_ABORT		stringify_in_c(.long PPC_RAW_CP_ABORT)
515
+#define	PPC_COPY(a, b)		stringify_in_c(.long PPC_RAW_COPY(a, b))
516
+#define PPC_DARN(t, l)		stringify_in_c(.long PPC_RAW_DARN(t, l))
517
+#define	PPC_DCBAL(a, b)		stringify_in_c(.long PPC_RAW_DCBAL(a, b))
518
+#define	PPC_DCBZL(a, b)		stringify_in_c(.long PPC_RAW_DCBZL(a, b))
519
+#define	PPC_DIVDE(t, a, b)	stringify_in_c(.long PPC_RAW_DIVDE(t, a, b))
520
+#define	PPC_DIVDEU(t, a, b)	stringify_in_c(.long PPC_RAW_DIVDEU(t, a, b))
521
+#define PPC_DSSALL		stringify_in_c(.long PPC_INST_DSSALL)
522
+#define PPC_LQARX(t, a, b, eh)	stringify_in_c(.long PPC_RAW_LQARX(t, a, b, eh))
523
+#define PPC_LDARX(t, a, b, eh)	stringify_in_c(.long PPC_RAW_LDARX(t, a, b, eh))
524
+#define PPC_LWARX(t, a, b, eh)	stringify_in_c(.long PPC_RAW_LWARX(t, a, b, eh))
525
+#define PPC_STQCX(t, a, b)	stringify_in_c(.long PPC_RAW_STQCX(t, a, b))
526
+#define PPC_MADDHD(t, a, b, c)	stringify_in_c(.long PPC_RAW_MADDHD(t, a, b, c))
527
+#define PPC_MADDHDU(t, a, b, c)	stringify_in_c(.long PPC_RAW_MADDHDU(t, a, b, c))
528
+#define PPC_MADDLD(t, a, b, c)	stringify_in_c(.long PPC_RAW_MADDLD(t, a, b, c))
529
+#define PPC_MSGSND(b)		stringify_in_c(.long PPC_RAW_MSGSND(b))
530
+#define PPC_MSGSYNC		stringify_in_c(.long PPC_RAW_MSGSYNC)
531
+#define PPC_MSGCLR(b)		stringify_in_c(.long PPC_RAW_MSGCLR(b))
532
+#define PPC_MSGSNDP(b)		stringify_in_c(.long PPC_RAW_MSGSNDP(b))
533
+#define PPC_MSGCLRP(b)		stringify_in_c(.long PPC_RAW_MSGCLRP(b))
534
+#define PPC_PASTE(a, b)		stringify_in_c(.long PPC_RAW_PASTE(a, b))
535
+#define PPC_POPCNTB(a, s)	stringify_in_c(.long PPC_RAW_POPCNTB(a, s))
536
+#define PPC_POPCNTD(a, s)	stringify_in_c(.long PPC_RAW_POPCNTD(a, s))
537
+#define PPC_POPCNTW(a, s)	stringify_in_c(.long PPC_RAW_POPCNTW(a, s))
538
+#define PPC_RFCI		stringify_in_c(.long PPC_RAW_RFCI)
539
+#define PPC_RFDI		stringify_in_c(.long PPC_RAW_RFDI)
540
+#define PPC_RFMCI		stringify_in_c(.long PPC_RAW_RFMCI)
541
+#define PPC_TLBILX(t, a, b)	stringify_in_c(.long PPC_RAW_TLBILX(t, a, b))
542
+#define PPC_TLBILX_ALL(a, b)	PPC_TLBILX(0, a, b)
543
+#define PPC_TLBILX_PID(a, b)	PPC_TLBILX(1, a, b)
544
+#define PPC_TLBILX_VA(a, b)	PPC_TLBILX(3, a, b)
545
+#define PPC_WAIT(w)		stringify_in_c(.long PPC_RAW_WAIT(w))
546
+#define PPC_TLBIE(lp, a) 	stringify_in_c(.long PPC_RAW_TLBIE(lp, a))
547
+#define	PPC_TLBIE_5(rb, rs, ric, prs, r) \
548
+				stringify_in_c(.long PPC_RAW_TLBIE_5(rb, rs, ric, prs, r))
549
+#define	PPC_TLBIEL(rb,rs,ric,prs,r) \
550
+				stringify_in_c(.long PPC_RAW_TLBIEL(rb, rs, ric, prs, r))
551
+#define PPC_TLBSRX_DOT(a, b)	stringify_in_c(.long PPC_RAW_TLBSRX_DOT(a, b))
552
+#define PPC_TLBIVAX(a, b)	stringify_in_c(.long PPC_RAW_TLBIVAX(a, b))
553
+
554
+#define PPC_ERATWE(s, a, w)	stringify_in_c(.long PPC_RAW_ERATWE(s, a, w))
555
+#define PPC_ERATRE(s, a, w)	stringify_in_c(.long PPC_RAW_ERATRE(a, a, w))
556
+#define PPC_ERATILX(t, a, b)	stringify_in_c(.long PPC_RAW_ERATILX(t, a, b))
557
+#define PPC_ERATIVAX(s, a, b)	stringify_in_c(.long PPC_RAW_ERATIVAX(s, a, b))
558
+#define PPC_ERATSX(t, a, w)	stringify_in_c(.long PPC_RAW_ERATSX(t, a, w))
559
+#define PPC_ERATSX_DOT(t, a, w)	stringify_in_c(.long PPC_RAW_ERATSX_DOT(t, a, w))
560
+#define PPC_SLBFEE_DOT(t, b)	stringify_in_c(.long PPC_RAW_SLBFEE_DOT(t, b))
561
+#define __PPC_SLBFEE_DOT(t, b)	stringify_in_c(.long __PPC_RAW_SLBFEE_DOT(t, b))
562
+#define PPC_ICBT(c, a, b)	stringify_in_c(.long PPC_RAW_ICBT(c, a, b))
563
+/* PASemi instructions */
564
+#define LBZCIX(t, a, b)		stringify_in_c(.long PPC_RAW_LBZCIX(t, a, b))
565
+#define STBCIX(s, a, b)		stringify_in_c(.long PPC_RAW_STBCIX(s, a, b))
566
+#define PPC_DCBFPS(a, b)	stringify_in_c(.long PPC_RAW_DCBFPS(a, b))
567
+#define PPC_DCBSTPS(a, b)	stringify_in_c(.long PPC_RAW_DCBSTPS(a, b))
568
+#define PPC_PHWSYNC		stringify_in_c(.long PPC_RAW_PHWSYNC)
569
+#define PPC_PLWSYNC		stringify_in_c(.long PPC_RAW_PLWSYNC)
570
+#define STXVD2X(s, a, b)	stringify_in_c(.long PPC_RAW_STXVD2X(s, a, b))
571
+#define LXVD2X(s, a, b)		stringify_in_c(.long PPC_RAW_LXVD2X(s, a, b))
572
+#define MFVRD(a, t)		stringify_in_c(.long PPC_RAW_MFVRD(a, t))
573
+#define MTVRD(t, a)		stringify_in_c(.long PPC_RAW_MTVRD(t, a))
574
+#define VPMSUMW(t, a, b)	stringify_in_c(.long PPC_RAW_VPMSUMW(t, a, b))
575
+#define VPMSUMD(t, a, b)	stringify_in_c(.long PPC_RAW_VPMSUMD(t, a, b))
576
+#define XXLOR(t, a, b)		stringify_in_c(.long PPC_RAW_XXLOR(t, a, b))
577
+#define XXSWAPD(t, a)		stringify_in_c(.long PPC_RAW_XXSWAPD(t, a))
578
+#define XVCPSGNDP(t, a, b)	stringify_in_c(.long (PPC_RAW_XVCPSGNDP(t, a, b)))
530579 
531580 #define VPERMXOR(vrt, vra, vrb, vrc)				\
532
-	stringify_in_c(.long (PPC_INST_VPERMXOR |		\
533
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
534
-			      ___PPC_RB(vrb) | (((vrc) & 0x1f) << 6)))
581
+	stringify_in_c(.long (PPC_RAW_VPERMXOR(vrt, vra, vrb, vrc)))
535582 
536
-#define PPC_NAP			stringify_in_c(.long PPC_INST_NAP)
537
-#define PPC_SLEEP		stringify_in_c(.long PPC_INST_SLEEP)
538
-#define PPC_WINKLE		stringify_in_c(.long PPC_INST_WINKLE)
583
+#define PPC_NAP			stringify_in_c(.long PPC_RAW_NAP)
584
+#define PPC_SLEEP		stringify_in_c(.long PPC_RAW_SLEEP)
585
+#define PPC_WINKLE		stringify_in_c(.long PPC_RAW_WINKLE)
539586 
540
-#define PPC_STOP		stringify_in_c(.long PPC_INST_STOP)
587
+#define PPC_STOP		stringify_in_c(.long PPC_RAW_STOP)
541588 
542589 /* BHRB instructions */
543
-#define PPC_CLRBHRB		stringify_in_c(.long PPC_INST_CLRBHRB)
544
-#define PPC_MFBHRBE(r, n)	stringify_in_c(.long PPC_INST_BHRBE | \
545
-						__PPC_RT(r) | \
546
-							(((n) & 0x3ff) << 11))
590
+#define PPC_CLRBHRB		stringify_in_c(.long PPC_RAW_CLRBHRB)
591
+#define PPC_MFBHRBE(r, n)	stringify_in_c(.long PPC_RAW_MFBHRBE(r, n))
547592 
548593 /* Transactional memory instructions */
549
-#define TRECHKPT		stringify_in_c(.long PPC_INST_TRECHKPT)
550
-#define TRECLAIM(r)		stringify_in_c(.long PPC_INST_TRECLAIM \
551
-					       | __PPC_RA(r))
552
-#define TABORT(r)		stringify_in_c(.long PPC_INST_TABORT \
553
-					       | __PPC_RA(r))
594
+#define TRECHKPT		stringify_in_c(.long PPC_RAW_TRECHKPT)
595
+#define TRECLAIM(r)		stringify_in_c(.long PPC_RAW_TRECLAIM(r))
596
+#define TABORT(r)		stringify_in_c(.long PPC_RAW_TABORT(r))
554597 
555598 /* book3e thread control instructions */
556
-#define TMRN(x)			((((x) & 0x1f) << 16) | (((x) & 0x3e0) << 6))
557
-#define MTTMR(tmr, r)		stringify_in_c(.long PPC_INST_MTTMR | \
558
-					       TMRN(tmr) | ___PPC_RS(r))
559
-#define MFTMR(tmr, r)		stringify_in_c(.long PPC_INST_MFTMR | \
560
-					       TMRN(tmr) | ___PPC_RT(r))
599
+#define MTTMR(tmr, r)		stringify_in_c(.long PPC_RAW_MTTMR(tmr, r))
600
+#define MFTMR(tmr, r)		stringify_in_c(.long PPC_RAW_MFTMR(tmr, r))
561601 
562602 /* Coprocessor instructions */
563
-#define PPC_ICSWX(s, a, b)	stringify_in_c(.long PPC_INST_ICSWX |	\
564
-					       ___PPC_RS(s) |		\
565
-					       ___PPC_RA(a) |		\
566
-					       ___PPC_RB(b))
567
-#define PPC_ICSWEPX(s, a, b)	stringify_in_c(.long PPC_INST_ICSWEPX | \
568
-					       ___PPC_RS(s) |		\
569
-					       ___PPC_RA(a) |		\
570
-					       ___PPC_RB(b))
603
+#define PPC_ICSWX(s, a, b)	stringify_in_c(.long PPC_RAW_ICSWX(s, a, b))
604
+#define PPC_ICSWEPX(s, a, b)	stringify_in_c(.long PPC_RAW_ICSWEPX(s, a, b))
571605 
572
-#define PPC_SLBIA(IH)	stringify_in_c(.long PPC_INST_SLBIA | \
573
-				       ((IH & 0x7) << 21))
574
-#define PPC_INVALIDATE_ERAT	PPC_SLBIA(7)
606
+#define PPC_SLBIA(IH)	stringify_in_c(.long PPC_RAW_SLBIA(IH))
575607 
576
-#define VCMPEQUD_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_INST_VCMPEQUD | \
577
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
578
-			      ___PPC_RB(vrb) | __PPC_RC21)
608
+/*
609
+ * These may only be used on ISA v3.0 or later (aka. CPU_FTR_ARCH_300, radix
610
+ * implies CPU_FTR_ARCH_300). USER/GUEST invalidates may only be used by radix
611
+ * mode (on HPT these would also invalidate various SLBEs which may not be
612
+ * desired).
613
+ */
614
+#define PPC_ISA_3_0_INVALIDATE_ERAT	PPC_SLBIA(7)
615
+#define PPC_RADIX_INVALIDATE_ERAT_USER	PPC_SLBIA(3)
616
+#define PPC_RADIX_INVALIDATE_ERAT_GUEST	PPC_SLBIA(6)
579617 
580
-#define VCMPEQUB_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_INST_VCMPEQUB | \
581
-			      ___PPC_RT(vrt) | ___PPC_RA(vra) | \
582
-			      ___PPC_RB(vrb) | __PPC_RC21)
618
+#define VCMPEQUD_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_RAW_VCMPEQUD_RC(vrt, vra, vrb))
619
+
620
+#define VCMPEQUB_RC(vrt, vra, vrb)	stringify_in_c(.long PPC_RAW_VCMPEQUB_RC(vrt, vra, vrb))
583621 
584622 #endif /* _ASM_POWERPC_PPC_OPCODE_H */