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| 3 | 3 | #define _ASM_POWERPC_PGTABLE_TYPES_H |
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| 4 | 4 | |
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| 5 | 5 | /* PTE level */ |
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| 6 | +#if defined(CONFIG_PPC_8xx) && defined(CONFIG_PPC_16K_PAGES) |
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| 7 | +typedef struct { pte_basic_t pte, pte1, pte2, pte3; } pte_t; |
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| 8 | +#else |
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| 6 | 9 | typedef struct { pte_basic_t pte; } pte_t; |
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| 10 | +#endif |
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| 7 | 11 | #define __pte(x) ((pte_t) { (x) }) |
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| 8 | 12 | static inline pte_basic_t pte_val(pte_t x) |
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| 9 | 13 | { |
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| .. | .. |
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| 19 | 23 | return x.pmd; |
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| 20 | 24 | } |
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| 21 | 25 | |
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| 22 | | -/* |
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| 23 | | - * 64 bit hash always use 4 level table. Everybody else use 4 level |
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| 24 | | - * only for 4K page size. |
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| 25 | | - */ |
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| 26 | | -#if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES) |
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| 26 | +/* 64 bit always use 4 level table. */ |
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| 27 | 27 | typedef struct { unsigned long pud; } pud_t; |
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| 28 | 28 | #define __pud(x) ((pud_t) { (x) }) |
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| 29 | 29 | static inline unsigned long pud_val(pud_t x) |
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| 30 | 30 | { |
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| 31 | 31 | return x.pud; |
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| 32 | 32 | } |
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| 33 | | -#endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */ |
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| 34 | 33 | #endif /* CONFIG_PPC64 */ |
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| 35 | 34 | |
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| 36 | 35 | /* PGD level */ |
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| .. | .. |
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| 50 | 49 | * With hash config 64k pages additionally define a bigger "real PTE" type that |
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| 51 | 50 | * gathers the "second half" part of the PTE for pseudo 64k pages |
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| 52 | 51 | */ |
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| 53 | | -#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_BOOK3S_64) |
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| 52 | +#ifdef CONFIG_PPC_64K_PAGES |
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| 54 | 53 | typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; |
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| 55 | 54 | #else |
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| 56 | 55 | typedef struct { pte_t pte; } real_pte_t; |
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