| .. | .. |
|---|
| 1 | +/* SPDX-License-Identifier: GPL-2.0-or-later */ |
|---|
| 1 | 2 | /* |
|---|
| 2 | 3 | * Performance event support - hardware-specific disambiguation |
|---|
| 3 | 4 | * |
|---|
| .. | .. |
|---|
| 7 | 8 | * devices other than the core which provide their own performance counters. |
|---|
| 8 | 9 | * |
|---|
| 9 | 10 | * Copyright 2010 Freescale Semiconductor, Inc. |
|---|
| 10 | | - * |
|---|
| 11 | | - * This program is free software; you can redistribute it and/or |
|---|
| 12 | | - * modify it under the terms of the GNU General Public License |
|---|
| 13 | | - * as published by the Free Software Foundation; either version |
|---|
| 14 | | - * 2 of the License, or (at your option) any later version. |
|---|
| 15 | 11 | */ |
|---|
| 16 | 12 | |
|---|
| 17 | 13 | #ifdef CONFIG_PPC_PERF_CTRS |
|---|
| 18 | 14 | #include <asm/perf_event_server.h> |
|---|
| 15 | +#else |
|---|
| 16 | +static inline bool is_sier_available(void) { return false; } |
|---|
| 19 | 17 | #endif |
|---|
| 20 | 18 | |
|---|
| 21 | 19 | #ifdef CONFIG_FSL_EMB_PERF_EVENT |
|---|
| .. | .. |
|---|
| 26 | 24 | #include <asm/ptrace.h> |
|---|
| 27 | 25 | #include <asm/reg.h> |
|---|
| 28 | 26 | |
|---|
| 27 | +#define perf_arch_bpf_user_pt_regs(regs) ®s->user_regs |
|---|
| 28 | + |
|---|
| 29 | 29 | /* |
|---|
| 30 | 30 | * Overload regs->result to specify whether we should use the MSR (result |
|---|
| 31 | 31 | * is zero) or the SIAR (result is non zero). |
|---|
| .. | .. |
|---|
| 34 | 34 | do { \ |
|---|
| 35 | 35 | (regs)->result = 0; \ |
|---|
| 36 | 36 | (regs)->nip = __ip; \ |
|---|
| 37 | | - (regs)->gpr[1] = current_stack_pointer(); \ |
|---|
| 37 | + (regs)->gpr[1] = current_stack_frame(); \ |
|---|
| 38 | 38 | asm volatile("mfmsr %0" : "=r" ((regs)->msr)); \ |
|---|
| 39 | 39 | } while (0) |
|---|
| 40 | + |
|---|
| 41 | +/* To support perf_regs sier update */ |
|---|
| 42 | +extern bool is_sier_available(void); |
|---|
| 43 | +/* To define perf extended regs mask value */ |
|---|
| 44 | +extern u64 PERF_REG_EXTENDED_MASK; |
|---|
| 45 | +#define PERF_REG_EXTENDED_MASK PERF_REG_EXTENDED_MASK |
|---|
| 40 | 46 | #endif |
|---|