forked from ~ljy/RK356X_SDK_RELEASE
blame | history | patch | commit | commitdiff
hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390 
 kernel/arch/powerpc/include/asm/cpm.h
....@@ -1,171 +1 @@
1
-/* SPDX-License-Identifier: GPL-2.0 */
2
-#ifndef __CPM_H
3
-#define __CPM_H
4
-
5
-#include <linux/compiler.h>
6
-#include <linux/types.h>
7
-#include <linux/errno.h>
8
-#include <linux/of.h>
9
-#include <soc/fsl/qe/qe.h>
10
-
11
-/*
12
- * SPI Parameter RAM common to QE and CPM.
13
- */
14
-struct spi_pram {
15
-	__be16	rbase;	/* Rx Buffer descriptor base address */
16
-	__be16	tbase;	/* Tx Buffer descriptor base address */
17
-	u8	rfcr;	/* Rx function code */
18
-	u8	tfcr;	/* Tx function code */
19
-	__be16	mrblr;	/* Max receive buffer length */
20
-	__be32	rstate;	/* Internal */
21
-	__be32	rdp;	/* Internal */
22
-	__be16	rbptr;	/* Internal */
23
-	__be16	rbc;	/* Internal */
24
-	__be32	rxtmp;	/* Internal */
25
-	__be32	tstate;	/* Internal */
26
-	__be32	tdp;	/* Internal */
27
-	__be16	tbptr;	/* Internal */
28
-	__be16	tbc;	/* Internal */
29
-	__be32	txtmp;	/* Internal */
30
-	__be32	res;	/* Tx temp. */
31
-	__be16  rpbase;	/* Relocation pointer (CPM1 only) */
32
-	__be16	res1;	/* Reserved */
33
-};
34
-
35
-/*
36
- * USB Controller pram common to QE and CPM.
37
- */
38
-struct usb_ctlr {
39
-	u8	usb_usmod;
40
-	u8	usb_usadr;
41
-	u8	usb_uscom;
42
-	u8	res1[1];
43
-	__be16	usb_usep[4];
44
-	u8	res2[4];
45
-	__be16	usb_usber;
46
-	u8	res3[2];
47
-	__be16	usb_usbmr;
48
-	u8	res4[1];
49
-	u8	usb_usbs;
50
-	/* Fields down below are QE-only */
51
-	__be16	usb_ussft;
52
-	u8	res5[2];
53
-	__be16	usb_usfrn;
54
-	u8	res6[0x22];
55
-} __attribute__ ((packed));
56
-
57
-/*
58
- * Function code bits, usually generic to devices.
59
- */
60
-#ifdef CONFIG_CPM1
61
-#define CPMFCR_GBL	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
62
-#define CPMFCR_TC2	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
63
-#define CPMFCR_DTB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
64
-#define CPMFCR_BDB	((u_char)0x00)	/* Flag doesn't exist in CPM1 */
65
-#else
66
-#define CPMFCR_GBL	((u_char)0x20)	/* Set memory snooping */
67
-#define CPMFCR_TC2	((u_char)0x04)	/* Transfer code 2 value */
68
-#define CPMFCR_DTB	((u_char)0x02)	/* Use local bus for data when set */
69
-#define CPMFCR_BDB	((u_char)0x01)	/* Use local bus for BD when set */
70
-#endif
71
-#define CPMFCR_EB	((u_char)0x10)	/* Set big endian byte order */
72
-
73
-/* Opcodes common to CPM1 and CPM2
74
-*/
75
-#define CPM_CR_INIT_TRX		((ushort)0x0000)
76
-#define CPM_CR_INIT_RX		((ushort)0x0001)
77
-#define CPM_CR_INIT_TX		((ushort)0x0002)
78
-#define CPM_CR_HUNT_MODE	((ushort)0x0003)
79
-#define CPM_CR_STOP_TX		((ushort)0x0004)
80
-#define CPM_CR_GRA_STOP_TX	((ushort)0x0005)
81
-#define CPM_CR_RESTART_TX	((ushort)0x0006)
82
-#define CPM_CR_CLOSE_RX_BD	((ushort)0x0007)
83
-#define CPM_CR_SET_GADDR	((ushort)0x0008)
84
-#define CPM_CR_SET_TIMER	((ushort)0x0008)
85
-#define CPM_CR_STOP_IDMA	((ushort)0x000b)
86
-
87
-/* Buffer descriptors used by many of the CPM protocols. */
88
-typedef struct cpm_buf_desc {
89
-	ushort	cbd_sc;		/* Status and Control */
90
-	ushort	cbd_datlen;	/* Data length in buffer */
91
-	uint	cbd_bufaddr;	/* Buffer address in host memory */
92
-} cbd_t;
93
-
94
-/* Buffer descriptor control/status used by serial
95
- */
96
-
97
-#define BD_SC_EMPTY	(0x8000)	/* Receive is empty */
98
-#define BD_SC_READY	(0x8000)	/* Transmit is ready */
99
-#define BD_SC_WRAP	(0x2000)	/* Last buffer descriptor */
100
-#define BD_SC_INTRPT	(0x1000)	/* Interrupt on change */
101
-#define BD_SC_LAST	(0x0800)	/* Last buffer in frame */
102
-#define BD_SC_TC	(0x0400)	/* Transmit CRC */
103
-#define BD_SC_CM	(0x0200)	/* Continuous mode */
104
-#define BD_SC_ID	(0x0100)	/* Rec'd too many idles */
105
-#define BD_SC_P		(0x0100)	/* xmt preamble */
106
-#define BD_SC_BR	(0x0020)	/* Break received */
107
-#define BD_SC_FR	(0x0010)	/* Framing error */
108
-#define BD_SC_PR	(0x0008)	/* Parity error */
109
-#define BD_SC_NAK	(0x0004)	/* NAK - did not respond */
110
-#define BD_SC_OV	(0x0002)	/* Overrun */
111
-#define BD_SC_UN	(0x0002)	/* Underrun */
112
-#define BD_SC_CD	(0x0001)	/* */
113
-#define BD_SC_CL	(0x0001)	/* Collision */
114
-
115
-/* Buffer descriptor control/status used by Ethernet receive.
116
- * Common to SCC and FCC.
117
- */
118
-#define BD_ENET_RX_EMPTY	(0x8000)
119
-#define BD_ENET_RX_WRAP		(0x2000)
120
-#define BD_ENET_RX_INTR		(0x1000)
121
-#define BD_ENET_RX_LAST		(0x0800)
122
-#define BD_ENET_RX_FIRST	(0x0400)
123
-#define BD_ENET_RX_MISS		(0x0100)
124
-#define BD_ENET_RX_BC		(0x0080)	/* FCC Only */
125
-#define BD_ENET_RX_MC		(0x0040)	/* FCC Only */
126
-#define BD_ENET_RX_LG		(0x0020)
127
-#define BD_ENET_RX_NO		(0x0010)
128
-#define BD_ENET_RX_SH		(0x0008)
129
-#define BD_ENET_RX_CR		(0x0004)
130
-#define BD_ENET_RX_OV		(0x0002)
131
-#define BD_ENET_RX_CL		(0x0001)
132
-#define BD_ENET_RX_STATS	(0x01ff)	/* All status bits */
133
-
134
-/* Buffer descriptor control/status used by Ethernet transmit.
135
- * Common to SCC and FCC.
136
- */
137
-#define BD_ENET_TX_READY	(0x8000)
138
-#define BD_ENET_TX_PAD		(0x4000)
139
-#define BD_ENET_TX_WRAP		(0x2000)
140
-#define BD_ENET_TX_INTR		(0x1000)
141
-#define BD_ENET_TX_LAST		(0x0800)
142
-#define BD_ENET_TX_TC		(0x0400)
143
-#define BD_ENET_TX_DEF		(0x0200)
144
-#define BD_ENET_TX_HB		(0x0100)
145
-#define BD_ENET_TX_LC		(0x0080)
146
-#define BD_ENET_TX_RL		(0x0040)
147
-#define BD_ENET_TX_RCMASK	(0x003c)
148
-#define BD_ENET_TX_UN		(0x0002)
149
-#define BD_ENET_TX_CSL		(0x0001)
150
-#define BD_ENET_TX_STATS	(0x03ff)	/* All status bits */
151
-
152
-/* Buffer descriptor control/status used by Transparent mode SCC.
153
- */
154
-#define BD_SCC_TX_LAST		(0x0800)
155
-
156
-/* Buffer descriptor control/status used by I2C.
157
- */
158
-#define BD_I2C_START		(0x0400)
159
-
160
-#ifdef CONFIG_CPM
161
-int cpm_command(u32 command, u8 opcode);
162
-#else
163
-static inline int cpm_command(u32 command, u8 opcode)
164
-{
165
-	return -ENOSYS;
166
-}
167
-#endif /* CONFIG_CPM */
168
-
169
-int cpm2_gpiochip_add32(struct device *dev);
170
-
171
-#endif
1
+#include <soc/fsl/cpm.h>