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| 7 | 7 | |
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| 8 | 8 | #include <asm/asm-const.h> |
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| 9 | 9 | |
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| 10 | +#ifndef __ASSEMBLY__ |
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| 11 | +#include <asm/ppc-opcode.h> |
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| 12 | +#endif |
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| 13 | + |
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| 10 | 14 | /* |
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| 11 | 15 | * Memory barrier. |
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| 12 | 16 | * The sync instruction guarantees that all memory accesses initiated |
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| .. | .. |
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| 18 | 22 | * mb() prevents loads and stores being reordered across this point. |
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| 19 | 23 | * rmb() prevents loads being reordered across this point. |
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| 20 | 24 | * wmb() prevents stores being reordered across this point. |
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| 21 | | - * read_barrier_depends() prevents data-dependent loads being reordered |
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| 22 | | - * across this point (nop on PPC). |
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| 23 | 25 | * |
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| 24 | 26 | * *mb() variants without smp_ prefix must order all types of memory |
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| 25 | 27 | * operations with one another. sync is the only instruction sufficient |
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| .. | .. |
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| 80 | 82 | ___p1; \ |
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| 81 | 83 | }) |
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| 82 | 84 | |
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| 85 | +#ifdef CONFIG_PPC64 |
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| 86 | +#define smp_cond_load_relaxed(ptr, cond_expr) ({ \ |
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| 87 | + typeof(ptr) __PTR = (ptr); \ |
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| 88 | + __unqual_scalar_typeof(*ptr) VAL; \ |
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| 89 | + VAL = READ_ONCE(*__PTR); \ |
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| 90 | + if (unlikely(!(cond_expr))) { \ |
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| 91 | + spin_begin(); \ |
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| 92 | + do { \ |
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| 93 | + VAL = READ_ONCE(*__PTR); \ |
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| 94 | + } while (!(cond_expr)); \ |
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| 95 | + spin_end(); \ |
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| 96 | + } \ |
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| 97 | + (typeof(*ptr))VAL; \ |
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| 98 | +}) |
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| 99 | +#endif |
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| 100 | + |
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| 83 | 101 | #ifdef CONFIG_PPC_BOOK3S_64 |
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| 84 | 102 | #define NOSPEC_BARRIER_SLOT nop |
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| 85 | 103 | #elif defined(CONFIG_PPC_FSL_BOOK3E) |
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| .. | .. |
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| 101 | 119 | #define barrier_nospec() |
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| 102 | 120 | #endif /* CONFIG_PPC_BARRIER_NOSPEC */ |
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| 103 | 121 | |
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| 122 | +/* |
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| 123 | + * pmem_wmb() ensures that all stores for which the modification |
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| 124 | + * are written to persistent storage by preceding dcbfps/dcbstps |
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| 125 | + * instructions have updated persistent storage before any data |
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| 126 | + * access or data transfer caused by subsequent instructions is |
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| 127 | + * initiated. |
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| 128 | + */ |
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| 129 | +#define pmem_wmb() __asm__ __volatile__(PPC_PHWSYNC ::: "memory") |
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| 130 | + |
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| 104 | 131 | #include <asm-generic/barrier.h> |
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| 105 | 132 | |
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| 106 | 133 | #endif /* _ASM_POWERPC_BARRIER_H */ |
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