hc
2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390
kernel/arch/parisc/include/asm/barrier.h
....@@ -2,11 +2,15 @@
22 #ifndef __ASM_BARRIER_H
33 #define __ASM_BARRIER_H
44
5
+#include <asm/alternative.h>
6
+
57 #ifndef __ASSEMBLY__
68
79 /* The synchronize caches instruction executes as a nop on systems in
810 which all memory references are performed in order. */
9
-#define synchronize_caches() __asm__ __volatile__ ("sync" : : : "memory")
11
+#define synchronize_caches() asm volatile("sync" \
12
+ ALTERNATIVE(ALT_COND_NO_SMP, INSN_NOP) \
13
+ : : : "memory")
1014
1115 #if defined(CONFIG_SMP)
1216 #define mb() do { synchronize_caches(); } while (0)