change wifi driver to cypress

hc

2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390

 kernel/arch/mips/include/asm/octeon/cvmx-gpio-defs.h
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@@ -90,10 +90,6 @@
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 		uint64_t reserved_12_63:52;
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 #endif
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 	} cn30xx;
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-	struct cvmx_gpio_bit_cfgx_cn30xx cn31xx;
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-	struct cvmx_gpio_bit_cfgx_cn30xx cn38xx;
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-	struct cvmx_gpio_bit_cfgx_cn30xx cn38xxp2;
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-	struct cvmx_gpio_bit_cfgx_cn30xx cn50xx;
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 	struct cvmx_gpio_bit_cfgx_cn52xx {
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 #ifdef __BIG_ENDIAN_BITFIELD
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 		uint64_t reserved_15_63:49;
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@@ -117,20 +113,6 @@
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 		uint64_t reserved_15_63:49;
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 #endif
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 	} cn52xx;
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-	struct cvmx_gpio_bit_cfgx_cn52xx cn52xxp1;
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-	struct cvmx_gpio_bit_cfgx_cn52xx cn56xx;
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-	struct cvmx_gpio_bit_cfgx_cn52xx cn56xxp1;
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-	struct cvmx_gpio_bit_cfgx_cn30xx cn58xx;
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-	struct cvmx_gpio_bit_cfgx_cn30xx cn58xxp1;
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-	struct cvmx_gpio_bit_cfgx_s cn61xx;
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-	struct cvmx_gpio_bit_cfgx_s cn63xx;
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-	struct cvmx_gpio_bit_cfgx_s cn63xxp1;
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-	struct cvmx_gpio_bit_cfgx_s cn66xx;
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-	struct cvmx_gpio_bit_cfgx_s cn68xx;
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-	struct cvmx_gpio_bit_cfgx_s cn68xxp1;
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-	struct cvmx_gpio_bit_cfgx_s cn70xx;
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-	struct cvmx_gpio_bit_cfgx_s cn73xx;
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-	struct cvmx_gpio_bit_cfgx_s cnf71xx;
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 };
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 union cvmx_gpio_boot_ena {
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@@ -146,9 +128,6 @@
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 		uint64_t reserved_12_63:52;
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 #endif
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 	} s;
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-	struct cvmx_gpio_boot_ena_s cn30xx;
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-	struct cvmx_gpio_boot_ena_s cn31xx;
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-	struct cvmx_gpio_boot_ena_s cn50xx;
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 };
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 union cvmx_gpio_clk_genx {
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@@ -162,17 +141,6 @@
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 		uint64_t reserved_32_63:32;
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 #endif
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 	} s;
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-	struct cvmx_gpio_clk_genx_s cn52xx;
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-	struct cvmx_gpio_clk_genx_s cn52xxp1;
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-	struct cvmx_gpio_clk_genx_s cn56xx;
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-	struct cvmx_gpio_clk_genx_s cn56xxp1;
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-	struct cvmx_gpio_clk_genx_s cn61xx;
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-	struct cvmx_gpio_clk_genx_s cn63xx;
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-	struct cvmx_gpio_clk_genx_s cn63xxp1;
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-	struct cvmx_gpio_clk_genx_s cn66xx;
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-	struct cvmx_gpio_clk_genx_s cn68xx;
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-	struct cvmx_gpio_clk_genx_s cn68xxp1;
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-	struct cvmx_gpio_clk_genx_s cnf71xx;
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 };
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 union cvmx_gpio_clk_qlmx {
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@@ -218,11 +186,6 @@
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 		uint64_t reserved_3_63:61;
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 #endif
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 	} cn63xx;
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-	struct cvmx_gpio_clk_qlmx_cn63xx cn63xxp1;
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-	struct cvmx_gpio_clk_qlmx_cn61xx cn66xx;
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-	struct cvmx_gpio_clk_qlmx_s cn68xx;
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-	struct cvmx_gpio_clk_qlmx_s cn68xxp1;
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-	struct cvmx_gpio_clk_qlmx_cn61xx cnf71xx;
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 };
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 union cvmx_gpio_dbg_ena {
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@@ -236,9 +199,6 @@
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 		uint64_t reserved_21_63:43;
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 #endif
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 	} s;
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-	struct cvmx_gpio_dbg_ena_s cn30xx;
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-	struct cvmx_gpio_dbg_ena_s cn31xx;
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-	struct cvmx_gpio_dbg_ena_s cn50xx;
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 };
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 union cvmx_gpio_int_clr {
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@@ -252,24 +212,6 @@
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 		uint64_t reserved_16_63:48;
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 #endif
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 	} s;
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-	struct cvmx_gpio_int_clr_s cn30xx;
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-	struct cvmx_gpio_int_clr_s cn31xx;
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-	struct cvmx_gpio_int_clr_s cn38xx;
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-	struct cvmx_gpio_int_clr_s cn38xxp2;
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-	struct cvmx_gpio_int_clr_s cn50xx;
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-	struct cvmx_gpio_int_clr_s cn52xx;
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-	struct cvmx_gpio_int_clr_s cn52xxp1;
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-	struct cvmx_gpio_int_clr_s cn56xx;
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-	struct cvmx_gpio_int_clr_s cn56xxp1;
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-	struct cvmx_gpio_int_clr_s cn58xx;
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-	struct cvmx_gpio_int_clr_s cn58xxp1;
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-	struct cvmx_gpio_int_clr_s cn61xx;
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-	struct cvmx_gpio_int_clr_s cn63xx;
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-	struct cvmx_gpio_int_clr_s cn63xxp1;
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-	struct cvmx_gpio_int_clr_s cn66xx;
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-	struct cvmx_gpio_int_clr_s cn68xx;
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-	struct cvmx_gpio_int_clr_s cn68xxp1;
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-	struct cvmx_gpio_int_clr_s cnf71xx;
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 };
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 union cvmx_gpio_multi_cast {
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@@ -283,8 +225,6 @@
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 		uint64_t reserved_1_63:63;
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 #endif
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 	} s;
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-	struct cvmx_gpio_multi_cast_s cn61xx;
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-	struct cvmx_gpio_multi_cast_s cnf71xx;
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 };
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 union cvmx_gpio_pin_ena {
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@@ -302,7 +242,6 @@
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 		uint64_t reserved_20_63:44;
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 #endif
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 	} s;
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-	struct cvmx_gpio_pin_ena_s cn66xx;
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 };
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 union cvmx_gpio_rx_dat {
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@@ -316,8 +255,6 @@
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 		uint64_t reserved_24_63:40;
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 #endif
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 	} s;
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-	struct cvmx_gpio_rx_dat_s cn30xx;
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-	struct cvmx_gpio_rx_dat_s cn31xx;
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 	struct cvmx_gpio_rx_dat_cn38xx {
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 #ifdef __BIG_ENDIAN_BITFIELD
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 		uint64_t reserved_16_63:48;
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@@ -327,14 +264,6 @@
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 		uint64_t reserved_16_63:48;
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 #endif
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 	} cn38xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn38xxp2;
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-	struct cvmx_gpio_rx_dat_s cn50xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn52xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn52xxp1;
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-	struct cvmx_gpio_rx_dat_cn38xx cn56xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn56xxp1;
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-	struct cvmx_gpio_rx_dat_cn38xx cn58xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn58xxp1;
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 	struct cvmx_gpio_rx_dat_cn61xx {
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 #ifdef __BIG_ENDIAN_BITFIELD
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 		uint64_t reserved_20_63:44;
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@@ -344,12 +273,6 @@
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 		uint64_t reserved_20_63:44;
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 #endif
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 	} cn61xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn63xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn63xxp1;
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-	struct cvmx_gpio_rx_dat_cn61xx cn66xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn68xx;
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-	struct cvmx_gpio_rx_dat_cn38xx cn68xxp1;
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-	struct cvmx_gpio_rx_dat_cn61xx cnf71xx;
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 };
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 union cvmx_gpio_tim_ctl {
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@@ -363,8 +286,6 @@
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 		uint64_t reserved_4_63:60;
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 #endif
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 	} s;
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-	struct cvmx_gpio_tim_ctl_s cn68xx;
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-	struct cvmx_gpio_tim_ctl_s cn68xxp1;
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 };
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 union cvmx_gpio_tx_clr {
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@@ -378,8 +299,6 @@
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 		uint64_t reserved_24_63:40;
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 #endif
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 	} s;
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-	struct cvmx_gpio_tx_clr_s cn30xx;
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-	struct cvmx_gpio_tx_clr_s cn31xx;
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 	struct cvmx_gpio_tx_clr_cn38xx {
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 #ifdef __BIG_ENDIAN_BITFIELD
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 		uint64_t reserved_16_63:48;
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@@ -389,14 +308,6 @@
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 		uint64_t reserved_16_63:48;
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 #endif
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 	} cn38xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn38xxp2;
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-	struct cvmx_gpio_tx_clr_s cn50xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn52xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn52xxp1;
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-	struct cvmx_gpio_tx_clr_cn38xx cn56xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn56xxp1;
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-	struct cvmx_gpio_tx_clr_cn38xx cn58xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn58xxp1;
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 	struct cvmx_gpio_tx_clr_cn61xx {
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 #ifdef __BIG_ENDIAN_BITFIELD
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 		uint64_t reserved_20_63:44;
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@@ -406,12 +317,6 @@
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 		uint64_t reserved_20_63:44;
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 #endif
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 	} cn61xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn63xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn63xxp1;
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-	struct cvmx_gpio_tx_clr_cn61xx cn66xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn68xx;
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-	struct cvmx_gpio_tx_clr_cn38xx cn68xxp1;
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-	struct cvmx_gpio_tx_clr_cn61xx cnf71xx;
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 };
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 union cvmx_gpio_tx_set {
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@@ -425,8 +330,6 @@
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 		uint64_t reserved_24_63:40;
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 #endif
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 	} s;
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-	struct cvmx_gpio_tx_set_s cn30xx;
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-	struct cvmx_gpio_tx_set_s cn31xx;
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 	struct cvmx_gpio_tx_set_cn38xx {
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 #ifdef __BIG_ENDIAN_BITFIELD
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 		uint64_t reserved_16_63:48;
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@@ -436,14 +339,6 @@
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 		uint64_t reserved_16_63:48;
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 #endif
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 	} cn38xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn38xxp2;
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-	struct cvmx_gpio_tx_set_s cn50xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn52xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn52xxp1;
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-	struct cvmx_gpio_tx_set_cn38xx cn56xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn56xxp1;
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-	struct cvmx_gpio_tx_set_cn38xx cn58xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn58xxp1;
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 	struct cvmx_gpio_tx_set_cn61xx {
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 #ifdef __BIG_ENDIAN_BITFIELD
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 		uint64_t reserved_20_63:44;
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@@ -453,12 +348,6 @@
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 		uint64_t reserved_20_63:44;
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 #endif
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 	} cn61xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn63xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn63xxp1;
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-	struct cvmx_gpio_tx_set_cn61xx cn66xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn68xx;
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-	struct cvmx_gpio_tx_set_cn38xx cn68xxp1;
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-	struct cvmx_gpio_tx_set_cn61xx cnf71xx;
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 };
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 union cvmx_gpio_xbit_cfgx {
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@@ -505,11 +394,6 @@
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 		uint64_t reserved_12_63:52;
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 #endif
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 	} cn30xx;
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-	struct cvmx_gpio_xbit_cfgx_cn30xx cn31xx;
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-	struct cvmx_gpio_xbit_cfgx_cn30xx cn50xx;
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-	struct cvmx_gpio_xbit_cfgx_s cn61xx;
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-	struct cvmx_gpio_xbit_cfgx_s cn66xx;
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-	struct cvmx_gpio_xbit_cfgx_s cnf71xx;
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 };
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 #endif