| .. | .. |
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| 1 | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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| 2 | 2 | /* |
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| 3 | | - * Copyright (c) 2020~2021 Rockchip Electronics Co., Ltd. |
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| 3 | + * Copyright (c) 2021 Rockchip Electronics Co., Ltd. |
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| 4 | 4 | */ |
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| 5 | 5 | |
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| 6 | 6 | &pinctrl { |
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| 7 | | - |
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| 8 | 7 | /omit-if-no-ref/ |
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| 9 | 8 | pcfg_pull_up: pcfg-pull-up { |
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| 10 | 9 | bias-pull-up; |
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| .. | .. |
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| 334 | 333 | }; |
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| 335 | 334 | |
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| 336 | 335 | /omit-if-no-ref/ |
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| 336 | + pcfg_pull_none_drv_level_1_smt: pcfg-pull-none-drv-level-1-smt { |
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| 337 | + bias-disable; |
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| 338 | + drive-strength = <1>; |
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| 339 | + input-schmitt-enable; |
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| 340 | + }; |
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| 341 | + |
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| 342 | + /omit-if-no-ref/ |
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| 343 | + pcfg_pull_none_drv_level_2_smt: pcfg-pull-none-drv-level-2-smt { |
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| 344 | + bias-disable; |
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| 345 | + drive-strength = <2>; |
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| 346 | + input-schmitt-enable; |
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| 347 | + }; |
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| 348 | + |
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| 349 | + /omit-if-no-ref/ |
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| 350 | + pcfg_pull_none_drv_level_3_smt: pcfg-pull-none-drv-level-3-smt { |
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| 351 | + bias-disable; |
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| 352 | + drive-strength = <3>; |
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| 353 | + input-schmitt-enable; |
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| 354 | + }; |
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| 355 | + |
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| 356 | + /omit-if-no-ref/ |
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| 357 | + pcfg_pull_none_drv_level_4_smt: pcfg-pull-none-drv-level-4-smt { |
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| 358 | + bias-disable; |
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| 359 | + drive-strength = <4>; |
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| 360 | + input-schmitt-enable; |
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| 361 | + }; |
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| 362 | + |
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| 363 | + /omit-if-no-ref/ |
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| 364 | + pcfg_pull_none_drv_level_5_smt: pcfg-pull-none-drv-level-5-smt { |
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| 365 | + bias-disable; |
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| 366 | + drive-strength = <5>; |
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| 367 | + input-schmitt-enable; |
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| 368 | + }; |
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| 369 | + |
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| 370 | + /omit-if-no-ref/ |
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| 337 | 371 | pcfg_output_high: pcfg-output-high { |
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| 338 | 372 | output-high; |
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| 339 | 373 | }; |
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| .. | .. |
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| 379 | 413 | bias-disable; |
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| 380 | 414 | }; |
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| 381 | 415 | }; |
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| 382 | | - |
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