| .. | .. |
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| 12 | 12 | clock-frequency = <25000000>; |
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| 13 | 13 | clock-output-names = "max96712-dphy3-osc0"; |
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| 14 | 14 | }; |
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| 15 | + |
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| 16 | + max96712_dphy3_vcc1v2: max96712-dphy3-vcc1v2 { |
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| 17 | + compatible = "regulator-fixed"; |
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| 18 | + regulator-name = "max96712_dphy3_vcc1v2"; |
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| 19 | + regulator-boot-on; |
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| 20 | + regulator-always-on; |
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| 21 | + regulator-min-microvolt = <1200000>; |
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| 22 | + regulator-max-microvolt = <1200000>; |
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| 23 | + startup-delay-us = <850>; |
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| 24 | + vin-supply = <&vcc5v0_sys>; |
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| 25 | + }; |
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| 26 | + |
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| 27 | + max96712_dphy3_vcc1v8: max96712-dphy3-vcc1v8 { |
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| 28 | + compatible = "regulator-fixed"; |
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| 29 | + regulator-name = "max96712_dphy3_vcc1v8"; |
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| 30 | + regulator-boot-on; |
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| 31 | + regulator-always-on; |
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| 32 | + regulator-min-microvolt = <1800000>; |
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| 33 | + regulator-max-microvolt = <1800000>; |
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| 34 | + startup-delay-us = <200>; |
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| 35 | + vin-supply = <&vcc_3v3_s3>; |
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| 36 | + }; |
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| 37 | + |
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| 38 | + max96712_dphy3_poc: max96712-dphy3-poc { |
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| 39 | + compatible = "regulator-fixed"; |
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| 40 | + regulator-name = "max96712_dphy3_poc"; |
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| 41 | + regulator-boot-on; |
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| 42 | + regulator-min-microvolt = <12000000>; |
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| 43 | + regulator-max-microvolt = <12000000>; |
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| 44 | + enable-active-high; |
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| 45 | + gpio = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; |
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| 46 | + startup-delay-us = <1050>; |
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| 47 | + off-on-delay-us = <515000>; |
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| 48 | + vin-supply = <&vcc12v_dcin>; |
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| 49 | + }; |
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| 15 | 50 | }; |
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| 16 | 51 | |
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| 17 | 52 | &csi2_dphy1_hw { |
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| .. | .. |
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| 64 | 99 | power-domains = <&power RK3588_PD_VI>; |
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| 65 | 100 | rockchip,grf = <&sys_grf>; |
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| 66 | 101 | pwdn-gpios = <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; |
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| 67 | | - pocen-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_HIGH>; |
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| 68 | 102 | lock-gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_HIGH>; |
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| 103 | + vcc1v2-supply = <&max96712_dphy3_vcc1v2>; |
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| 104 | + vcc1v8-supply = <&max96712_dphy3_vcc1v8>; |
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| 105 | + poc-supply = <&max96712_dphy3_poc>; |
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| 69 | 106 | |
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| 70 | 107 | rockchip,camera-module-index = <0>; |
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| 71 | 108 | rockchip,camera-module-facing = "back"; |
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| .. | .. |
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| 599 | 636 | &pinctrl { |
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| 600 | 637 | max96712-dphy3 { |
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| 601 | 638 | max96712_dphy3_pwdn: max96712-dphy3-pwdn { |
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| 602 | | - rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; |
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| 639 | + rockchip,pins = <4 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>; |
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| 603 | 640 | }; |
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| 604 | 641 | |
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| 605 | 642 | max96712_dphy3_errb: max96712-dphy3-errb { |
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| 606 | | - rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; |
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| 643 | + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none_smt>; |
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| 607 | 644 | }; |
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| 608 | 645 | |
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| 609 | 646 | max96712_dphy3_lock: max96712-dphy3-lock { |
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| 610 | | - rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; |
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| 647 | + rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none_smt>; |
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| 611 | 648 | }; |
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| 612 | 649 | }; |
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| 613 | 650 | }; |
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