~hc/RK356X_SDK_RELEASE.git

..	..	@@ -8,21 +8,12 @@
8	8
9	9	#include <dt-bindings/gpio/gpio.h>
10	10	#include <dt-bindings/pinctrl/rockchip.h>
11		-#include <dt-bindings/display/media-bus-format.h>
12	11	#include "rk3568.dtsi"
13	12	#include "rk3568-evb.dtsi"
14	13
15	14	/ {
16	15	model = "Rockchip RK3568 EVB1 DDR4 V10 Board";
17	16	compatible = "rockchip,rk3568-evb1-ddr4-v10", "rockchip,rk3568";
18		-
19		- rk_headset: rk-headset {
20		- compatible = "rockchip_headset";
21		- headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>;
22		- spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3
23		- pinctrl-names = "default";
24		- pinctrl-0 = <&hp_det>;
25		- };
26	17
27	18	vcc2v5_sys: vcc2v5-ddr {
28	19	compatible = "regulator-fixed";
..	..	@@ -84,7 +75,7 @@
84	75	regulator-max-microvolt = <3300000>;
85	76	vin-supply = <&vcc5v0_sys>;
86	77	};
87		-#if 0
	78	+
88	79	vcc_camera: vcc-camera-regulator {
89	80	compatible = "regulator-fixed";
90	81	gpio = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
..	..	@@ -94,174 +85,7 @@
94	85	enable-active-high;
95	86	regulator-always-on;
96	87	regulator-boot-on;
97		- };
98		-#endif
99		- ndj_io_init {
100		- compatible = "nk_io_control";
101		- pinctrl-names = "default";
102		- pinctrl-0 = <&nk_io_gpio>;
103		-
104		- //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>;
105		-
106		- vcc_5v {
107		- gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
108		- gpio_function = <0>;
109		- };
110		-
111		- vcc_12v {
112		- gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
113		- gpio_function = <0>;
114		- };
115		-
116		- hub_host2_rst {
117		- gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
118		- gpio_function = <3>;
119		- };
120		-
121		- hub_host3 {
122		- gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
123		- gpio_function = <0>;
124		- };
125		-
126		- wake_4g {
127		- gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3
128		- gpio_function = <0>;
129		- };
130		-
131		- air_mode_4g {
132		- gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3
133		- gpio_function = <0>;
134		- };
135		-
136		- reset_4g {
137		- gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3
138		- gpio_function = <3>;
139		- };
140		-
141		- en_4g {
142		- gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
143		- gpio_function = <0>;
144		- };
145		-
146		- hp_en {
147		- gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
148		- gpio_function = <0>;
149		- };
150		-
151		- usb_ogt {
152		- gpio_num = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>; //OTG_EN_OC_GPIO0_C2
153		- gpio_function = <0>;
154		- };
155		-
156		- m2_wifi_pwr {
157		- gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>;//WIFI_PWREN_GPIO3_C6_1V8
158		- gpio_function = <0>;
159		- };
160		-
161		-
162		- #if 0
163		- do1 {
164		- gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>;
165		- gpio_function = <0>;
166		- };
167		-
168		- do2 {
169		- gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
170		- gpio_function = <0>;
171		- };
172		-
173		- do3 {
174		- gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>;
175		- gpio_function = <0>;
176		- };
177		-
178		- do4 {
179		- gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>;
180		- gpio_function = <0>;
181		- };
182		-
183		- do5 {
184		- gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
185		- gpio_function = <0>;
186		- };
187		-
188		- do6 {
189		- gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>;
190		- gpio_function = <0>;
191		- };
192		-
193		- do7 {
194		- gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>;
195		- gpio_function = <0>;
196		- };
197		-
198		- di1 {
199		- gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
200		- gpio_function = <1>;
201		- };
202		- #endif
203		- };
204		-#if 0
205		- nk_io_init {
206		- compatible = "nk_io_control";
207		-// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3
208		- hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3
209		- hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8
210		- vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3
211		- vcc_12v_io = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3
212		- en_4g_gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6
213		- reset_4g_gpio = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; //4G_RST_GPIO01_B2_3V3
214		- air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3
215		- wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3
216		- hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3
217		-// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3
218		- wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8
219		-// pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4
220		- pinctrl-names = "default";
221		- pinctrl-0 = <&nk_io_gpio>;
222		- };
223		-#endif
224		- panel: panel {
225		- compatible = "simple-panel";
226		- backlight = <&backlight>;
227		- power-supply = <&vcc3v3_lcd0_n>;
228		- enable-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>; //LCD0_VDD_H_GPIO2_D4
229		- edp-bl-gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; //LCD0_PWBLK_H_GPIO0_B7
230		- edp-bl-en = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; //LCD0_BKLT_EN_3V3
231		- bus-format = <MEDIA_BUS_FMT_RGB888_1X24>;
232		- bpc = <8>;
233		- prepare-delay-ms = <200>;
234		- enable-delay-ms = <20>;
235		- lvds-gpio0 = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>; //7511_GPIO0-GPIO3_D2
236		- lvds-gpio1 = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>; //7511_GPIO1-GPIO3_D3
237		- lvds-gpio2 = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>; //7511_GPIO2-GPIO3_D4
238		- lvds-gpio3 = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; //7511_GPIO3-GPIO3_D5
239		- nodka-lvds = <15>;
240		-
241		- display-timings {
242		- native-mode = <&timing>;
243		- timing: timing {
244		- clock-frequency = <72500000>;
245		- hactive = <1280>;
246		- vactive = <800>;
247		- hfront-porch = <70>;
248		- hsync-len = <2>;
249		- hback-porch = <88>;
250		- vfront-porch = <7>;
251		- vsync-len = <4>;
252		- vback-porch = <17>;
253		- hsync-active = <21>;
254		- vsync-active = <0>;
255		- de-active = <0>;
256		- pixelclk-active = <0>;
257		- };
258		- };
259		- port {
260		- panel_in_lvds: endpoint {
261		- remote-endpoint = <&lvds_out>;
262		- };
263		- };
264		- };
	88	+ };
265	89	};
266	90
267	91	&combphy0_us {
..	..	@@ -277,11 +101,11 @@
277	101	};
278	102
279	103	&csi2_dphy_hw {
280		- status = "disabled";
	104	+ status = "okay";
281	105	};
282	106
283	107	&csi2_dphy0 {
284		- status = "disabled";
	108	+ status = "okay";
285	109
286	110	ports {
287	111	#address-cells = <1>;
..	..	@@ -324,12 +148,8 @@
324	148	* video_phy0 needs to be enabled
325	149	* when dsi0 is enabled
326	150	*/
327		-&video_phy0 {
328		- status = "disabled";
329		-};
330		-
331	151	&dsi0 {
332		- status = "disabled";
	152	+ status = "okay";
333	153	};
334	154
335	155	&dsi0_in_vp0 {
..	..	@@ -337,7 +157,7 @@
337	157	};
338	158
339	159	&dsi0_in_vp1 {
340		- status = "disabled";
	160	+ status = "okay";
341	161	};
342	162
343	163	&dsi0_panel {
..	..	@@ -365,30 +185,7 @@
365	185	};
366	186
367	187	&edp {
368		- //hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
369		- force-hpd;
370		- status = "disabled";
371		-};
372		-
373		-&lvds {
374		- status = "disabled";
375		- ports {
376		- port@1 {
377		- reg = <1>;
378		- lvds_out: endpoint {
379		- remote-endpoint = <&panel_in_lvds>;
380		- };
381		- };
382		-
383		- };
384		-};
385		-
386		-&route_lvds{
387		- status = "disabled";
388		- connect = <&vp2_out_lvds>;
389		-};
390		-
391		-&lvds_in_vp2 {
	188	+ hpd-gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_HIGH>;
392	189	status = "okay";
393	190	};
394	191
..	..	@@ -397,65 +194,18 @@
397	194	};
398	195
399	196	&edp_in_vp0 {
400		- status = "disabled";
	197	+ status = "okay";
401	198	};
402	199
403	200	&edp_in_vp1 {
404		- status = "okay";
405		-
406		-};
407		-
408		-&route_edp {
409		- status = "okay";
410		- connect = <&vp1_out_edp>;
411		-};
412		-
413		-
414		-/*
415		-* edp_end
416		-*/
417		-
418		-/*
419		-* Hdmi_start
420		-*/
421		-
422		-&hdmi {
423		- status = "okay";
424		- rockchip,phy-table =
425		- <92812500 0x8009 0x0000 0x0270>,
426		- <165000000 0x800b 0x0000 0x026d>,
427		- <185625000 0x800b 0x0000 0x01ed>,
428		- <297000000 0x800b 0x0000 0x01ad>,
429		- <594000000 0x8029 0x0000 0x0088>,
430		- <000000000 0x0000 0x0000 0x0000>;
431		-};
432		-
433		-&route_hdmi {
434		- status = "okay";
435		- connect = <&vp0_out_hdmi>;
436		-};
437		-
438		-&hdmi_in_vp0 {
439		- status = "okay";
440		-};
441		-
442		-&hdmi_in_vp1 {
443	201	status = "disabled";
444	202	};
445		-
446		-&hdmi_sound {
447		- status = "okay";
448		-};
449		-
450		-/*
451		- * Hdmi_END
452		-*/
453	203
454	204	&gmac0 {
455	205	phy-mode = "rgmii";
456	206	clock_in_out = "output";
457	207
458		- snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>;
	208	+ snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>;
459	209	snps,reset-active-low;
460	210	/* Reset time is 20ms, 100ms for rtl8211f */
461	211	snps,reset-delays-us = <0 20000 100000>;
..	..	@@ -475,16 +225,14 @@
475	225	rx_delay = <0x2f>;
476	226
477	227	phy-handle = <&rgmii_phy0>;
478		-
479		- status = "disabled";
480		-
	228	+ status = "okay";
481	229	};
482	230
483	231	&gmac1 {
484	232	phy-mode = "rgmii";
485	233	clock_in_out = "output";
486	234
487		- snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>;
	235	+ snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>;
488	236	snps,reset-active-low;
489	237	/* Reset time is 20ms, 100ms for rtl8211f */
490	238	snps,reset-delays-us = <0 20000 100000>;
..	..	@@ -511,26 +259,12 @@
511	259	* power-supply should switche to vcc3v3_lcd1_n
512	260	* when mipi panel is connected to dsi1.
513	261	*/
514		-
515		-
516		-&i2c3 {
517		- status = "okay";
518		- //mac eeprom
519		- eeprom@51 {
520		- //compatible = "atmel,24c02";
521		- compatible = "atmel,24c256";
522		- reg = <0x51>;
523		- };
524		-
525		- //nk-mcu
526		- nkmcu@15 {
527		- compatible = "nk_mcu";
528		- reg = <0x15>;
529		- };
	262	+&gt1x {
	263	+ power-supply = <&vcc3v3_lcd0_n>;
530	264	};
531	265
532	266	&i2c4 {
533		- status = "disabled";
	267	+ status = "okay";
534	268	gc8034: gc8034@37 {
535	269	compatible = "galaxycore,gc8034";
536	270	status = "okay";
..	..	@@ -539,6 +273,7 @@
539	273	clock-names = "xvclk";
540	274	pinctrl-names = "default";
541	275	pinctrl-0 = <&cif_clk>;
	276	+ power-domains = <&power RK3568_PD_VI>;
542	277	reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>;
543	278	pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>;
544	279	rockchip,grf = <&grf>;
..	..	@@ -575,7 +310,7 @@
575	310	};
576	311	};
577	312	ov5695: ov5695@36 {
578		- status = "disabled";
	313	+ status = "okay";
579	314	compatible = "ovti,ov5695";
580	315	reg = <0x36>;
581	316	clocks = <&cru CLK_CIF_OUT>;
..	..	@@ -595,19 +330,6 @@
595	330	data-lanes = <1 2>;
596	331	};
597	332	};
598		- };
599		-};
600		-
601		-&i2c5 {
602		- status = "okay";
603		-
604		- hym8563: hym8563@51 {
605		- compatible = "haoyu,hym8563";
606		- reg = <0x51>;
607		- #clock-cells = <0>;
608		- clock-frequency = <32768>;
609		- clock-output-names = "xin32k";
610		- /* rtc_int is not connected */
611	333	};
612	334	};
613	335
..	..	@@ -644,75 +366,46 @@
644	366	};
645	367
646	368	&pinctrl {
647		-// cam {
648		-// camera_pwr: camera-pwr {
649		-// rockchip,pins =
650		-// /* camera power en */
651		-// <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
652		-// };
653		-// };
	369	+ cam {
	370	+ camera_pwr: camera-pwr {
	371	+ rockchip,pins =
	372	+ /* camera power en */
	373	+ <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
	374	+ };
	375	+ };
654	376	headphone {
655	377	hp_det: hp-det {
656		- rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>,
657		- <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
	378	+ rockchip,pins = <3 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>;
658	379	};
659	380	};
660	381
661	382	wireless-wlan {
662	383	wifi_host_wake_irq: wifi-host-wake-irq {
663		- rockchip,pins = <2 RK_PB2 RK_FUNC_GPIO &pcfg_pull_down>;
	384	+ rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_down>;
664	385	};
665	386	};
666	387
667	388	wireless-bluetooth {
668		- uart1_gpios: uart1-gpios {
669		- rockchip,pins = <2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
	389	+ uart8_gpios: uart8-gpios {
	390	+ rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
670	391	};
671	392	};
672		-
673		- lcd1 {
674		- lcd1_rst_gpio: lcd1-rst-gpio {
675		- rockchip,pins = <3 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>;
676		- };
677		- };
678		-
679		- nk_io_init{
680		- nk_io_gpio: nk-io-gpio{
681		- rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
682		- <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>,
683		- <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>,
684		- <4 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
685		- <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
686		- <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>,
687		- <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>,
688		- <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>,
689		- <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>,
690		- <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>,
691		- <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>,
692		- <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>,
693		- <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
694		- <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>,
695		- <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,
696		- <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>,
697		- <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3
698		- <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3
699		- <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3
700		- <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3
701		- <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>;
702		- };
703		- };
	393	+};
	394	+
	395	+&rk809_sound {
	396	+ hp-det-gpio = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>;
704	397	};
705	398
706	399	&rkisp {
707		- status = "disabled";
	400	+ status = "okay";
708	401	};
709	402
710	403	&rkisp_mmu {
711		- status = "disabled";
	404	+ status = "okay";
712	405	};
713	406
714	407	&rkisp_vir0 {
715		- status = "disabled";
	408	+ status = "okay";
716	409
717	410	port {
718	411	#address-cells = <1>;
..	..	@@ -725,30 +418,35 @@
725	418	};
726	419	};
727	420
	421	+&route_dsi0 {
	422	+ status = "okay";
	423	+ connect = <&vp1_out_dsi0>;
	424	+};
728	425
	426	+&route_edp {
	427	+ status = "okay";
	428	+ connect = <&vp0_out_edp>;
	429	+};
729	430
730	431	&sata2 {
731	432	status = "okay";
732	433	};
733	434
734	435	&sdmmc2 {
735		- status = "disabled";
736		-};
737		-
738		-&sdmmc1 {
739		- max-frequency = <150000000>;
740		- supports-sdio;
741		- bus-width = <4>;
742		- disable-wp;
743		- cap-sd-highspeed;
744		- cap-sdio-irq;
745		- keep-power-in-suspend;
746		- mmc-pwrseq = <&sdio_pwrseq>;
747		- non-removable;
748		- pinctrl-names = "default";
749		- pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>;
750		- sd-uhs-sdr104;
751		- status = "okay";
	436	+ max-frequency = <150000000>;
	437	+ no-sd;
	438	+ no-mmc;
	439	+ bus-width = <4>;
	440	+ disable-wp;
	441	+ cap-sd-highspeed;
	442	+ cap-sdio-irq;
	443	+ keep-power-in-suspend;
	444	+ mmc-pwrseq = <&sdio_pwrseq>;
	445	+ non-removable;
	446	+ pinctrl-names = "default";
	447	+ pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>;
	448	+ sd-uhs-sdr104;
	449	+ status = "okay";
752	450	};
753	451
754	452	&spdif_8ch {
..	..	@@ -758,25 +456,25 @@
758	456	};
759	457
760	458	&uart8 {
761		- status = "disabled";
	459	+ status = "okay";
762	460	pinctrl-names = "default";
763	461	pinctrl-0 = <&uart8m0_xfer &uart8m0_ctsn>;
764	462	};
765	463
766	464	&vcc3v3_lcd0_n {
767		- gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
	465	+ gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>;
768	466	enable-active-high;
769	467	};
770	468
771	469	&vcc3v3_lcd1_n {
772		- gpio = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>; //MIPI_3V3EN_GPIO3_A3_d_3V3
	470	+ gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
773	471	enable-active-high;
774	472	};
775	473
776	474	&wireless_wlan {
777	475	pinctrl-names = "default";
778	476	pinctrl-0 = <&wifi_host_wake_irq>;
779		- WIFI,host_wake_irq = <&gpio2 RK_PB2 GPIO_ACTIVE_HIGH>;
	477	+ WIFI,host_wake_irq = <&gpio3 RK_PD4 GPIO_ACTIVE_HIGH>;
780	478	};
781	479
782	480	&wireless_bluetooth {
..	..	@@ -784,47 +482,12 @@
784	482	clocks = <&rk809 1>;
785	483	clock-names = "ext_clock";
786	484	//wifi-bt-power-toggle;
787		- uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>;
	485	+ uart_rts_gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>;
788	486	pinctrl-names = "default", "rts_gpio";
789		- pinctrl-0 = <&uart1m0_rtsn>;
790		- pinctrl-1 = <&uart1_gpios>;
791		- BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>;
792		- BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>;
793		- BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>;
	487	+ pinctrl-0 = <&uart8m0_rtsn>;
	488	+ pinctrl-1 = <&uart8_gpios>;
	489	+ BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>;
	490	+ BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>;
	491	+ BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>;
794	492	status = "okay";
795		-};
796		-
797		-&uart0 {
798		- status = "disabled";
799		-};
800		-
801		-&uart1 {
802		- pinctrl-names = "default";
803		- pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>;
804		- status = "disabled";
805		-};
806		-
807		-&uart3 {
808		- status = "okay";
809		- pinctrl-0 = <&uart3m1_xfer>;
810		-};
811		-
812		-&uart4 {
813		- status = "okay";
814		- pinctrl-0 = <&uart4m1_xfer>;
815		-};
816		-
817		-&uart5 {
818		- status = "okay";
819		- pinctrl-0 = <&uart5m1_xfer>;
820		-};
821		-
822		-&uart7 {
823		- status = "disabled";
824		- pinctrl-0 = <&uart7m1_xfer>;
825		-};
826		-
827		-&uart9 {
828		- status = "disabled";
829		- pinctrl-0 = <&uart9m1_xfer>;
830	493	};