change wifi driver to cypress

hc

2024-01-05 071106ecf68c401173c58808b1cf5f68cc50d390

 kernel/arch/arm64/boot/dts/rockchip/rk3568-evb.dtsi
..
..
@@ -141,6 +141,27 @@
141
141
 		default-brightness-level = <200>;
142
142
 	};
143
143
 
144
+	bt_sco: bt-sco {
145
+		status = "disabled";
146
+		compatible = "delta,dfbmcs320";
147
+		#sound-dai-cells = <1>;
148
+	};
149
+
150
+	bt_sound: bt-sound {
151
+		status = "disabled";
152
+		compatible = "simple-audio-card";
153
+		simple-audio-card,format = "dsp_a";
154
+		simple-audio-card,bitclock-inversion = <0>;
155
+		simple-audio-card,mclk-fs = <256>;
156
+		simple-audio-card,name = "rockchip,bt";
157
+		simple-audio-card,cpu {
158
+			sound-dai = <&i2s3_2ch>;
159
+		};
160
+		simple-audio-card,codec {
161
+			sound-dai = <&bt_sco 1>;
162
+		};
163
+	};
164
+
144
165
 	dc_12v: dc-12v {
145
166
 		compatible = "regulator-fixed";
146
167
 		regulator-name = "dc_12v";
..
..
@@ -151,12 +172,18 @@
151
172
 	};
152
173
 
153
174
 	hdmi_sound: hdmi-sound {
175
+		compatible = "simple-audio-card";
176
+		simple-audio-card,format = "i2s";
177
+		simple-audio-card,mclk-fs = <128>;
178
+		simple-audio-card,name = "rockchip,hdmi";
154
179
 		status = "disabled";
155
-		compatible = "rockchip,hdmi";
156
-		rockchip,mclk-fs = <128>;
157
-		rockchip,card-name = "rockchip,hdmi";
158
-		rockchip,cpu = <&i2s0_8ch>;
159
-		rockchip,codec = <&hdmi>;
180
+
181
+		simple-audio-card,cpu {
182
+				sound-dai = <&i2s0_8ch>;
183
+		};
184
+		simple-audio-card,codec {
185
+				sound-dai = <&hdmi>;
186
+		};
160
187
 	};
161
188
 
162
189
 	leds: leds {
..
..
@@ -335,6 +362,8 @@
335
362
 		compatible = "wlan-platdata";
336
363
 		rockchip,grf = <&grf>;
337
364
 		wifi_chip_type = "ap6398s";
365
+		clocks = <&rk809 1>;
366
+		clock-names = "ext_clock";
338
367
 		status = "okay";
339
368
 	};
340
369
 
..
..
@@ -364,30 +393,6 @@
364
393
 	status = "okay";
365
394
 };
366
395
 
367
-&can0 {
368
-	assigned-clocks = <&cru CLK_CAN0>;
369
-	assigned-clock-rates = <150000000>;
370
-	pinctrl-names = "default";
371
-	pinctrl-0 = <&can0m1_pins>;
372
-	status = "disabled";
373
-};
374
-
375
-&can1 {
376
-	assigned-clocks = <&cru CLK_CAN1>;
377
-	assigned-clock-rates = <150000000>;
378
-	pinctrl-names = "default";
379
-	pinctrl-0 = <&can1m1_pins>;
380
-	status = "disabled";
381
-};
382
-
383
-&can2 {
384
-	assigned-clocks = <&cru CLK_CAN2>;
385
-	assigned-clock-rates = <150000000>;
386
-	pinctrl-names = "default";
387
-	pinctrl-0 = <&can2m1_pins>;
388
-	status = "disabled";
389
-};
390
-
391
396
 &cpu0 {
392
397
 	cpu-supply = <&vdd_cpu>;
393
398
 };
..
..
@@ -395,6 +400,7 @@
395
400
 &dfi {
396
401
 	status = "okay";
397
402
 };
403
+
398
404
 
399
405
 &dmc {
400
406
 	center-supply = <&vdd_logic>;
..
..
@@ -884,10 +890,10 @@
884
890
             15 05 01 29 
885
891
         ];
886
892
 
887
-        panel-exit-sequence = [
888
-                05 00 01 28
889
-                05 00 01 10
890
-        ];
893
+		panel-exit-sequence = [
894
+			05 00 01 28
895
+			05 00 01 10
896
+		];
891
897
 
892
898
          disp_timings1: display-timings {
893
899
                                         native-mode = <&dsi1_timing0>;
..
..
@@ -940,13 +946,34 @@
940
946
 	status = "okay";
941
947
 };
942
948
 
949
+&hdmi {
950
+	status = "okay";
951
+	rockchip,phy-table =
952
+		<92812500  0x8009 0x0000 0x0270>,
953
+		<165000000 0x800b 0x0000 0x026d>,
954
+		<185625000 0x800b 0x0000 0x01ed>,
955
+		<297000000 0x800b 0x0000 0x01ad>,
956
+		<594000000 0x8029 0x0000 0x0088>,
957
+		<000000000 0x0000 0x0000 0x0000>;
958
+};
943
959
 
960
+&hdmi_in_vp0 {
961
+	status = "okay";
962
+};
963
+
964
+&hdmi_in_vp1 {
965
+	status = "disabled";
966
+};
967
+
968
+&hdmi_sound {
969
+	status = "okay";
970
+};
944
971
 
945
972
 &i2c0 {
946
973
 	status = "okay";
947
974
 
948
975
 	vdd_cpu: tcs4525@1c {
949
-		compatible = "tcs,tcs452x";
976
+		compatible = "tcs,tcs4525";
950
977
 		reg = <0x1c>;
951
978
 		vin-supply = <&vcc5v0_sys>;
952
979
 		regulator-compatible = "fan53555-reg";
..
..
@@ -954,7 +981,6 @@
954
981
 		regulator-min-microvolt = <712500>;
955
982
 		regulator-max-microvolt = <1390000>;
956
983
 		regulator-init-microvolt = <900000>;
957
-		regulator-initial-mode = <1>;
958
984
 		regulator-ramp-delay = <2300>;
959
985
 		fcs,suspend-voltage-selector = <1>;
960
986
 		regulator-boot-on;
..
..
@@ -1116,8 +1142,8 @@
1116
1142
 			vccio_acodec: LDO_REG4 {
1117
1143
 				regulator-always-on;
1118
1144
 				regulator-boot-on;
1119
-				regulator-min-microvolt = <3300000>;
1120
-				regulator-max-microvolt = <3300000>;
1145
+				regulator-min-microvolt = <3000000>;
1146
+				regulator-max-microvolt = <3000000>;
1121
1147
 				regulator-name = "vccio_acodec";
1122
1148
 				regulator-state-mem {
1123
1149
 					regulator-off-in-suspend;
..
..
@@ -1231,15 +1257,6 @@
1231
1257
 
1232
1258
 &i2c1 {
1233
1259
 	status = "okay";
1234
-
1235
-	gt1x: gt1x@14 {
1236
-		compatible = "goodix,gt1x";
1237
-		reg = <0x14>;
1238
-		pinctrl-names = "default";
1239
-		pinctrl-0 = <&touch_gpio>;
1240
-		goodix,rst-gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_HIGH>;
1241
-		goodix,irq-gpio = <&gpio0 RK_PB5 IRQ_TYPE_LEVEL_LOW>;
1242
-	};
1243
1260
 };
1244
1261
 
1245
1262
 &i2c5 {
..
..
@@ -1272,6 +1289,12 @@
1272
1289
 		     &i2s1m0_lrcktx
1273
1290
 		     &i2s1m0_sdi0
1274
1291
 		     &i2s1m0_sdo0>;
1292
+};
1293
+
1294
+&i2s3_2ch {
1295
+	pinctrl-0 = <&i2s3m0_sclk &i2s3m0_lrck &i2s3m0_sdi &i2s3m0_sdo>;
1296
+	rockchip,bclk-fs = <32>;
1297
+	status = "disabled";
1275
1298
 };
1276
1299
 
1277
1300
 &iep {
..
..
@@ -1310,6 +1333,7 @@
1310
1333
 
1311
1334
 &pinctrl {
1312
1335
 
1336
+
1313
1337
 	mxc6655xa {
1314
1338
 		mxc6655xa_irq_gpio: mxc6655xa_irq_gpio {
1315
1339
 			rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
..
..
@@ -1324,12 +1348,12 @@
1324
1348
 
1325
1349
 		soc_slppin_gpio: soc_slppin_gpio {
1326
1350
 			rockchip,pins =
1327
-				<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low_pull_down>;
1351
+				<0 RK_PA2 RK_FUNC_GPIO &pcfg_output_low>;
1328
1352
 		};
1329
1353
 
1330
1354
 		soc_slppin_slp: soc_slppin_slp {
1331
1355
 			rockchip,pins =
1332
-				<0 RK_PA2 1 &pcfg_pull_up>;
1356
+				<0 RK_PA2 1 &pcfg_pull_none>;
1333
1357
 		};
1334
1358
 
1335
1359
 		soc_slppin_rst: soc_slppin_rst {
..
..
@@ -1544,7 +1568,10 @@
1544
1568
 	status = "okay";
1545
1569
 };
1546
1570
 
1547
-
1571
+&route_hdmi {
1572
+	status = "okay";
1573
+	connect = <&vp0_out_hdmi>;
1574
+};
1548
1575
 
1549
1576
 &saradc {
1550
1577
 	status = "okay";
..
..
@@ -1553,15 +1580,18 @@
1553
1580
 
1554
1581
 &sdhci {
1555
1582
 	bus-width = <8>;
1556
-	supports-emmc;
1583
+	no-sdio;
1584
+	no-sd;
1557
1585
 	non-removable;
1558
1586
 	max-frequency = <200000000>;
1587
+	full-pwr-cycle-in-suspend;
1559
1588
 	status = "okay";
1560
1589
 };
1561
1590
 
1562
1591
 &sdmmc0 {
1563
1592
 	max-frequency = <150000000>;
1564
-	supports-sd;
1593
+	no-sdio;
1594
+	no-mmc;
1565
1595
 	bus-width = <4>;
1566
1596
 	cap-mmc-highspeed;
1567
1597
 	cap-sd-highspeed;
..
..
@@ -1641,15 +1671,6 @@
1641
1671
 };
1642
1672
 
1643
1673
 &usbhost_dwc3 {
1644
-//	phys = <&u2phy0_host>;
1645
-//	phy-names = "usb2-phy";
1646
-//	maximum-speed = "high-speed";
1647
-//	snps,dis_u2_susphy_quirk;
1648
-	status = "okay";
1649
-};
1650
-
1651
-&combphy1_usq {
1652
-//	rockchip,dis-u3otg1-port;
1653
1674
 	status = "okay";
1654
1675
 };
1655
1676
 
..
..
@@ -1682,8 +1703,8 @@
1682
1703
 
1683
1704
 &vop {
1684
1705
 	status = "okay";
1685
-	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>;
1686
-	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>;
1706
+	assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
1707
+	assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>, <&cru PLL_GPLL>;
1687
1708
 };
1688
1709
 
1689
1710
 &vop_mmu {