| .. | .. |
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| 19 | 19 | rk_headset: rk-headset { |
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| 20 | 20 | compatible = "rockchip_headset"; |
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| 21 | 21 | headset_gpio = <&gpio0 RK_PD5 GPIO_ACTIVE_LOW>; |
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| 22 | + spk_ctl_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;//AMP_SD_GPIO4_C2_3V3 |
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| 22 | 23 | pinctrl-names = "default"; |
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| 23 | 24 | pinctrl-0 = <&hp_det>; |
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| 24 | 25 | }; |
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| .. | .. |
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| 88 | 89 | regulator-boot-on; |
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| 89 | 90 | }; |
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| 90 | 91 | #endif |
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| 91 | | - |
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| 92 | + ndj_io_init { |
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| 93 | + compatible = "nk_io_control"; |
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| 94 | + pinctrl-names = "default"; |
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| 95 | + pinctrl-0 = <&nk_io_gpio>; |
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| 96 | + |
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| 97 | + //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; |
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| 98 | + |
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| 99 | + vcc_5v { |
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| 100 | + gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 |
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| 101 | + gpio_function = <0>; |
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| 102 | + }; |
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| 103 | + |
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| 104 | + vcc_12v { |
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| 105 | + gpio_num = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; //VCC12_IO_EN_GPIO0_C7_3V3 |
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| 106 | + gpio_function = <0>; |
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| 107 | + }; |
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| 108 | + |
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| 109 | + hub_host2_rst { |
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| 110 | + gpio_num = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3 |
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| 111 | + gpio_function = <3>; |
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| 112 | + }; |
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| 113 | + |
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| 114 | + hub_host3 { |
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| 115 | + gpio_num = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8 |
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| 116 | + gpio_function = <0>; |
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| 117 | + }; |
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| 118 | + |
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| 119 | + wake_4g { |
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| 120 | + gpio_num = <&gpio1 RK_PB1 GPIO_ACTIVE_LOW>; //4G_WAKEUP_GPIO01_B1_3V3 |
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| 121 | + gpio_function = <0>; |
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| 122 | + }; |
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| 123 | + |
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| 124 | + air_mode_4g { |
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| 125 | + gpio_num = <&gpio1 RK_PB0 GPIO_ACTIVE_LOW>; //4G_AIR_MODE_GPIO01_B0_3V3 |
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| 126 | + gpio_function = <0>; |
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| 127 | + }; |
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| 128 | + |
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| 129 | + reset_4g { |
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| 130 | + gpio_num = <&gpio1 RK_PB2 GPIO_ACTIVE_LOW>; //4G_RST_GPIO01_B2_3V3 |
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| 131 | + gpio_function = <3>; |
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| 132 | + }; |
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| 133 | + |
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| 134 | + en_4g { |
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| 135 | + gpio_num = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; //4G_PWREN_H_GPIO0_C6 |
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| 136 | + gpio_function = <0>; |
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| 137 | + }; |
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| 138 | + |
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| 139 | + hp_en { |
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| 140 | + gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3 |
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| 141 | + gpio_function = <0>; |
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| 142 | + }; |
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| 143 | + |
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| 144 | + wifi_power_en { |
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| 145 | + gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8 |
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| 146 | + gpio_function = <0>; |
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| 147 | + }; |
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| 148 | + #if 0 |
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| 149 | + do1 { |
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| 150 | + gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; |
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| 151 | + gpio_function = <0>; |
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| 152 | + }; |
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| 153 | + |
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| 154 | + do2 { |
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| 155 | + gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; |
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| 156 | + gpio_function = <0>; |
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| 157 | + }; |
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| 158 | + |
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| 159 | + do3 { |
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| 160 | + gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; |
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| 161 | + gpio_function = <0>; |
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| 162 | + }; |
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| 163 | + |
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| 164 | + do4 { |
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| 165 | + gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; |
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| 166 | + gpio_function = <0>; |
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| 167 | + }; |
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| 168 | + |
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| 169 | + do5 { |
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| 170 | + gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; |
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| 171 | + gpio_function = <0>; |
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| 172 | + }; |
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| 173 | + |
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| 174 | + do6 { |
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| 175 | + gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; |
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| 176 | + gpio_function = <0>; |
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| 177 | + }; |
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| 178 | + |
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| 179 | + do7 { |
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| 180 | + gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; |
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| 181 | + gpio_function = <0>; |
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| 182 | + }; |
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| 183 | + |
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| 184 | + di1 { |
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| 185 | + gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>; |
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| 186 | + gpio_function = <1>; |
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| 187 | + }; |
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| 188 | + #endif |
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| 189 | + }; |
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| 190 | +#if 0 |
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| 92 | 191 | nk_io_init { |
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| 93 | 192 | compatible = "nk_io_control"; |
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| 94 | | - vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3 |
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| 193 | +// vcc3_io_en_gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; //VCC3_IO_EN_GPIO0_C4_3V3 |
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| 95 | 194 | hub_host2_5V_rest_gpio = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>; //HUB_RST_GPIO4_D2_3V3 |
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| 96 | 195 | hub_host3_5v_gpio = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; //HOST3_EN_GPIO4_B2_1V8 |
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| 97 | 196 | vcc_5v_io = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 |
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| .. | .. |
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| 101 | 200 | air_mode_4g_gpio = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; //4G_AIR_MODE_GPIO01_B0_3V3 |
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| 102 | 201 | wake_4g_gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; //4G_WAKEUP_GPIO01_B1_3V3 |
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| 103 | 202 | hp_en_gpio = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3 |
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| 104 | | - spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3 |
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| 203 | +// spk_out_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>;//AMP_SD_GPIO4_C2_3V3 |
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| 105 | 204 | wifi_power_en_gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8 |
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| 106 | 205 | // pcie_power_en_gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;//PCIE_PWREN_H_GPIO0_D4 |
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| 107 | 206 | pinctrl-names = "default"; |
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| 108 | 207 | pinctrl-0 = <&nk_io_gpio>; |
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| 109 | 208 | }; |
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| 110 | | - |
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| 209 | +#endif |
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| 111 | 210 | panel: panel { |
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| 112 | 211 | compatible = "simple-panel"; |
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| 113 | 212 | backlight = <&backlight>; |
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| .. | .. |
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| 281 | 380 | remote-endpoint = <&panel_in>; |
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| 282 | 381 | }; |
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| 283 | 382 | }; |
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| 284 | | - }; |
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| 383 | + |
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| 384 | + }; |
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| 285 | 385 | }; |
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| 286 | 386 | |
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| 287 | 387 | &edp_phy { |
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| 288 | | - status = "okay"; |
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| 289 | | - |
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| 388 | + status = "okay"; |
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| 290 | 389 | }; |
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| 291 | 390 | |
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| 292 | 391 | &edp_in_vp0 { |
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| .. | .. |
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| 350 | 449 | phy-mode = "rgmii"; |
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| 351 | 450 | clock_in_out = "output"; |
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| 352 | 451 | |
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| 353 | | - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; |
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| 452 | + snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; |
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| 354 | 453 | snps,reset-active-low; |
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| 355 | 454 | /* Reset time is 20ms, 100ms for rtl8211f */ |
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| 356 | 455 | snps,reset-delays-us = <0 20000 100000>; |
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| .. | .. |
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| 370 | 469 | rx_delay = <0x2f>; |
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| 371 | 470 | |
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| 372 | 471 | phy-handle = <&rgmii_phy0>; |
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| 472 | + |
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| 373 | 473 | status = "disabled"; |
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| 474 | + |
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| 374 | 475 | }; |
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| 375 | 476 | |
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| 376 | 477 | &gmac1 { |
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| .. | .. |
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| 404 | 505 | * power-supply should switche to vcc3v3_lcd1_n |
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| 405 | 506 | * when mipi panel is connected to dsi1. |
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| 406 | 507 | */ |
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| 407 | | ->1x { |
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| 408 | | - power-supply = <&vcc3v3_lcd0_n>; |
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| 409 | | -}; |
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| 508 | + |
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| 410 | 509 | |
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| 411 | 510 | &i2c3 { |
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| 412 | 511 | status = "okay"; |
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| .. | .. |
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| 425 | 524 | }; |
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| 426 | 525 | |
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| 427 | 526 | &i2c4 { |
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| 428 | | - status = "okay"; |
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| 527 | + status = "disabled"; |
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| 429 | 528 | gc8034: gc8034@37 { |
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| 430 | 529 | compatible = "galaxycore,gc8034"; |
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| 431 | 530 | status = "okay"; |
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| .. | .. |
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| 437 | 536 | reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; |
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| 438 | 537 | pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>; |
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| 439 | 538 | rockchip,grf = <&grf>; |
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| 440 | | - power-domains = <&power RK3568_PD_VI>; |
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| 441 | 539 | rockchip,camera-module-index = <0>; |
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| 442 | 540 | rockchip,camera-module-facing = "back"; |
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| 443 | 541 | rockchip,camera-module-name = "RK-CMK-8M-2-v1"; |
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| .. | .. |
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| 471 | 569 | }; |
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| 472 | 570 | }; |
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| 473 | 571 | ov5695: ov5695@36 { |
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| 474 | | - status = "okay"; |
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| 572 | + status = "disabled"; |
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| 475 | 573 | compatible = "ovti,ov5695"; |
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| 476 | 574 | reg = <0x36>; |
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| 477 | 575 | clocks = <&cru CLK_CIF_OUT>; |
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| .. | .. |
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| 543 | 641 | // }; |
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| 544 | 642 | headphone { |
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| 545 | 643 | hp_det: hp-det { |
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| 546 | | - rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; |
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| 644 | + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>, |
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| 645 | + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; |
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| 547 | 646 | }; |
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| 548 | 647 | }; |
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| 549 | 648 | |
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| .. | .. |
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| 578 | 677 | <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 579 | 678 | <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 580 | 679 | <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 581 | | - <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 582 | 680 | <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 583 | 681 | <3 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 584 | 682 | <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 585 | 683 | <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 586 | 684 | <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>, |
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| 685 | + <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>,//93 SPI2_CS0_M1_3V3 |
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| 686 | + <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>,//94 SPI2_MOSI_M1_3V3 |
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| 687 | + <2 RK_PD7 RK_FUNC_GPIO &pcfg_pull_none>,//95 SPI2_MISO_M1_3V3 |
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| 688 | + <3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>,//96 SPI2_CLK_M1_3V3 |
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| 587 | 689 | <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; |
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| 588 | 690 | }; |
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| 589 | 691 | }; |
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| .. | .. |
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| 610 | 712 | }; |
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| 611 | 713 | }; |
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| 612 | 714 | }; |
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| 613 | | - |
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| 614 | | - |
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| 615 | 715 | |
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| 616 | 716 | |
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| 617 | 717 | |
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| .. | .. |
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| 673 | 773 | clock-names = "ext_clock"; |
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| 674 | 774 | //wifi-bt-power-toggle; |
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| 675 | 775 | uart_rts_gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_LOW>; |
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| 676 | | - BT,power_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; |
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| 677 | 776 | pinctrl-names = "default", "rts_gpio"; |
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| 678 | 777 | pinctrl-0 = <&uart1m0_rtsn>; |
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| 679 | 778 | pinctrl-1 = <&uart1_gpios>; |
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| 680 | | - BT,reset_gpio = <&gpio3 RK_PA0 GPIO_ACTIVE_HIGH>; |
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| 681 | | - BT,wake_gpio = <&gpio3 RK_PA2 GPIO_ACTIVE_HIGH>; |
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| 682 | | - BT,wake_host_irq = <&gpio3 RK_PA1 GPIO_ACTIVE_HIGH>; |
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| 683 | | - status = "disabled"; |
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| 779 | + BT,reset_gpio = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; |
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| 780 | + BT,wake_gpio = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; |
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| 781 | + BT,wake_host_irq = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; |
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| 782 | + status = "okay"; |
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| 684 | 783 | }; |
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| 685 | 784 | |
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| 686 | 785 | &uart0 { |
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| 687 | 786 | status = "okay"; |
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| 688 | 787 | }; |
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| 689 | 788 | |
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| 789 | +&uart1 { |
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| 790 | + pinctrl-names = "default"; |
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| 791 | + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; |
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| 792 | + status = "okay"; |
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| 793 | +}; |
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| 794 | + |
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| 690 | 795 | &uart3 { |
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| 691 | 796 | status = "okay"; |
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| 692 | 797 | pinctrl-0 = <&uart3m1_xfer>; |
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