| .. | .. |
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| 93 | 93 | compatible = "nk_io_control"; |
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| 94 | 94 | pinctrl-names = "default"; |
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| 95 | 95 | pinctrl-0 = <&nk_io_gpio>; |
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| 96 | + |
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| 97 | + //gpio_op0 = <&gpio1 RK_PD0 GPIO_ACTIVE_HIGH>; |
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| 98 | + |
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| 96 | 99 | vcc_5v { |
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| 97 | 100 | gpio_num = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>; //VCC5_IO_EN_GPIO1_A4_3V3 |
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| 98 | 101 | gpio_function = <0>; |
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| .. | .. |
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| 134 | 137 | }; |
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| 135 | 138 | |
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| 136 | 139 | hp_en { |
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| 137 | | - gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;//HP_EN_GPIO3_A6_3V3 |
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| 140 | + gpio_num = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>;//HP_EN_GPIO3_A6_3V3 |
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| 138 | 141 | gpio_function = <0>; |
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| 139 | 142 | }; |
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| 140 | 143 | |
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| .. | .. |
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| 142 | 145 | gpio_num = <&gpio3 RK_PC6 GPIO_ACTIVE_HIGH>; //WIFI_PWREN_GPIO3_C6_1V8 |
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| 143 | 146 | gpio_function = <0>; |
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| 144 | 147 | }; |
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| 148 | + #if 0 |
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| 149 | + do1 { |
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| 150 | + gpio_num = <&gpio1 RK_PD0 GPIO_ACTIVE_LOW>; |
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| 151 | + gpio_function = <0>; |
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| 152 | + }; |
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| 153 | + |
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| 154 | + do2 { |
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| 155 | + gpio_num = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; |
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| 156 | + gpio_function = <0>; |
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| 157 | + }; |
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| 158 | + |
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| 159 | + do3 { |
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| 160 | + gpio_num = <&gpio1 RK_PD1 GPIO_ACTIVE_HIGH>; |
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| 161 | + gpio_function = <0>; |
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| 162 | + }; |
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| 163 | + |
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| 164 | + do4 { |
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| 165 | + gpio_num = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; |
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| 166 | + gpio_function = <0>; |
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| 167 | + }; |
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| 168 | + |
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| 169 | + do5 { |
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| 170 | + gpio_num = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>; |
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| 171 | + gpio_function = <0>; |
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| 172 | + }; |
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| 173 | + |
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| 174 | + do6 { |
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| 175 | + gpio_num = <&gpio2 RK_PD7 GPIO_ACTIVE_LOW>; |
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| 176 | + gpio_function = <0>; |
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| 177 | + }; |
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| 178 | + |
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| 179 | + do7 { |
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| 180 | + gpio_num = <&gpio3 RK_PA0 GPIO_ACTIVE_LOW>; |
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| 181 | + gpio_function = <0>; |
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| 182 | + }; |
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| 183 | + |
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| 184 | + di1 { |
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| 185 | + gpio_num = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>; |
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| 186 | + gpio_function = <1>; |
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| 187 | + }; |
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| 188 | + #endif |
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| 145 | 189 | }; |
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| 146 | 190 | #if 0 |
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| 147 | 191 | nk_io_init { |
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| .. | .. |
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| 336 | 380 | remote-endpoint = <&panel_in>; |
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| 337 | 381 | }; |
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| 338 | 382 | }; |
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| 339 | | - }; |
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| 383 | + |
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| 384 | + }; |
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| 340 | 385 | }; |
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| 341 | 386 | |
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| 342 | 387 | &edp_phy { |
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| 343 | | - status = "okay"; |
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| 344 | | - |
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| 388 | + status = "okay"; |
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| 345 | 389 | }; |
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| 346 | 390 | |
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| 347 | 391 | &edp_in_vp0 { |
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| .. | .. |
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| 405 | 449 | phy-mode = "rgmii"; |
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| 406 | 450 | clock_in_out = "output"; |
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| 407 | 451 | |
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| 408 | | - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; |
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| 452 | + snps,reset-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_LOW>; |
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| 409 | 453 | snps,reset-active-low; |
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| 410 | 454 | /* Reset time is 20ms, 100ms for rtl8211f */ |
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| 411 | 455 | snps,reset-delays-us = <0 20000 100000>; |
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| .. | .. |
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| 425 | 469 | rx_delay = <0x2f>; |
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| 426 | 470 | |
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| 427 | 471 | phy-handle = <&rgmii_phy0>; |
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| 472 | + |
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| 428 | 473 | status = "disabled"; |
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| 474 | + |
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| 429 | 475 | }; |
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| 430 | 476 | |
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| 431 | 477 | &gmac1 { |
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| .. | .. |
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| 459 | 505 | * power-supply should switche to vcc3v3_lcd1_n |
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| 460 | 506 | * when mipi panel is connected to dsi1. |
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| 461 | 507 | */ |
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| 462 | | ->1x { |
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| 463 | | - power-supply = <&vcc3v3_lcd0_n>; |
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| 464 | | -}; |
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| 508 | + |
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| 465 | 509 | |
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| 466 | 510 | &i2c3 { |
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| 467 | 511 | status = "okay"; |
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| .. | .. |
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| 480 | 524 | }; |
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| 481 | 525 | |
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| 482 | 526 | &i2c4 { |
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| 483 | | - status = "okay"; |
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| 527 | + status = "disabled"; |
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| 484 | 528 | gc8034: gc8034@37 { |
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| 485 | 529 | compatible = "galaxycore,gc8034"; |
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| 486 | 530 | status = "okay"; |
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| .. | .. |
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| 492 | 536 | reset-gpios = <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; |
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| 493 | 537 | pwdn-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>; |
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| 494 | 538 | rockchip,grf = <&grf>; |
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| 495 | | - power-domains = <&power RK3568_PD_VI>; |
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| 496 | 539 | rockchip,camera-module-index = <0>; |
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| 497 | 540 | rockchip,camera-module-facing = "back"; |
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| 498 | 541 | rockchip,camera-module-name = "RK-CMK-8M-2-v1"; |
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| .. | .. |
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| 526 | 569 | }; |
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| 527 | 570 | }; |
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| 528 | 571 | ov5695: ov5695@36 { |
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| 529 | | - status = "okay"; |
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| 572 | + status = "disabled"; |
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| 530 | 573 | compatible = "ovti,ov5695"; |
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| 531 | 574 | reg = <0x36>; |
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| 532 | 575 | clocks = <&cru CLK_CIF_OUT>; |
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| .. | .. |
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| 669 | 712 | }; |
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| 670 | 713 | }; |
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| 671 | 714 | }; |
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| 672 | | - |
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| 673 | | - |
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| 674 | 715 | |
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| 675 | 716 | |
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| 676 | 717 | |
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