.. | .. |
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8 | 8 | gic: interrupt-controller@2f000000 { |
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9 | 9 | compatible = "arm,gic-v3"; |
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10 | 10 | #interrupt-cells = <3>; |
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11 | | - #address-cells = <2>; |
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12 | | - #size-cells = <2>; |
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13 | | - ranges; |
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| 11 | + #address-cells = <1>; |
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| 12 | + #size-cells = <1>; |
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| 13 | + ranges = <0x0 0x0 0x2f000000 0x100000>; |
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14 | 14 | interrupt-controller; |
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15 | 15 | reg = <0x0 0x2f000000 0x0 0x10000>, |
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16 | 16 | <0x0 0x2f100000 0x0 0x200000>, |
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17 | 17 | <0x0 0x2c000000 0x0 0x2000>, |
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18 | 18 | <0x0 0x2c010000 0x0 0x2000>, |
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19 | 19 | <0x0 0x2c02f000 0x0 0x2000>; |
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20 | | - interrupts = <1 9 4>; |
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| 20 | + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; |
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21 | 21 | |
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22 | | - its: its@2f020000 { |
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| 22 | + its: msi-controller@2f020000 { |
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23 | 23 | compatible = "arm,gic-v3-its"; |
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24 | 24 | msi-controller; |
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25 | | - reg = <0x0 0x2f020000 0x0 0x20000>; |
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| 25 | + #msi-cells = <1>; |
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| 26 | + reg = <0x20000 0x20000>; |
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26 | 27 | }; |
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27 | 28 | }; |
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28 | 29 | }; |
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