| .. | .. |
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| 26 | 26 | #include "scrm44xx.h" |
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| 27 | 27 | #include "control.h" |
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| 28 | 28 | |
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| 29 | +#define OMAP4430_VDD_IVA_I2C_DISABLE BIT(14) |
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| 30 | +#define OMAP4430_VDD_MPU_I2C_DISABLE BIT(13) |
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| 31 | +#define OMAP4430_VDD_CORE_I2C_DISABLE BIT(12) |
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| 32 | +#define OMAP4430_VDD_IVA_PRESENCE BIT(9) |
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| 33 | +#define OMAP4430_VDD_MPU_PRESENCE BIT(8) |
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| 34 | +#define OMAP4430_AUTO_CTRL_VDD_IVA(x) ((x) << 4) |
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| 35 | +#define OMAP4430_AUTO_CTRL_VDD_MPU(x) ((x) << 2) |
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| 36 | +#define OMAP4430_AUTO_CTRL_VDD_CORE(x) ((x) << 0) |
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| 37 | +#define OMAP4430_AUTO_CTRL_VDD_RET 2 |
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| 38 | + |
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| 39 | +#define OMAP4430_VDD_I2C_DISABLE_MASK \ |
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| 40 | + (OMAP4430_VDD_IVA_I2C_DISABLE | \ |
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| 41 | + OMAP4430_VDD_MPU_I2C_DISABLE | \ |
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| 42 | + OMAP4430_VDD_CORE_I2C_DISABLE) |
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| 43 | + |
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| 44 | +#define OMAP4_VDD_DEFAULT_VAL \ |
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| 45 | + (OMAP4430_VDD_I2C_DISABLE_MASK | \ |
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| 46 | + OMAP4430_VDD_IVA_PRESENCE | OMAP4430_VDD_MPU_PRESENCE | \ |
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| 47 | + OMAP4430_AUTO_CTRL_VDD_IVA(OMAP4430_AUTO_CTRL_VDD_RET) | \ |
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| 48 | + OMAP4430_AUTO_CTRL_VDD_MPU(OMAP4430_AUTO_CTRL_VDD_RET) | \ |
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| 49 | + OMAP4430_AUTO_CTRL_VDD_CORE(OMAP4430_AUTO_CTRL_VDD_RET)) |
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| 50 | + |
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| 51 | +#define OMAP4_VDD_RET_VAL \ |
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| 52 | + (OMAP4_VDD_DEFAULT_VAL & ~OMAP4430_VDD_I2C_DISABLE_MASK) |
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| 53 | + |
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| 29 | 54 | /** |
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| 30 | 55 | * struct omap_vc_channel_cfg - describe the cfg_channel bitfield |
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| 31 | 56 | * @sa: bit for slave address |
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| .. | .. |
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| 278 | 303 | OMAP3_PRM_VOLTSETUP2_OFFSET); |
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| 279 | 304 | vc.voltsetup2 = voltsetup2; |
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| 280 | 305 | } |
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| 306 | +} |
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| 307 | + |
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| 308 | +void omap4_vc_set_pmic_signaling(int core_next_state) |
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| 309 | +{ |
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| 310 | + struct voltagedomain *vd = vc.vd; |
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| 311 | + u32 val; |
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| 312 | + |
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| 313 | + if (!vd) |
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| 314 | + return; |
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| 315 | + |
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| 316 | + switch (core_next_state) { |
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| 317 | + case PWRDM_POWER_RET: |
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| 318 | + val = OMAP4_VDD_RET_VAL; |
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| 319 | + break; |
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| 320 | + default: |
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| 321 | + val = OMAP4_VDD_DEFAULT_VAL; |
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| 322 | + break; |
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| 323 | + } |
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| 324 | + |
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| 325 | + vd->write(val, OMAP4_PRM_VOLTCTRL_OFFSET); |
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| 281 | 326 | } |
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| 282 | 327 | |
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| 283 | 328 | /* |
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| .. | .. |
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| 542 | 587 | writel_relaxed(val, OMAP4_SCRM_CLKSETUPTIME); |
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| 543 | 588 | } |
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| 544 | 589 | |
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| 590 | +static void __init omap4_vc_init_pmic_signaling(struct voltagedomain *voltdm) |
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| 591 | +{ |
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| 592 | + if (vc.vd) |
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| 593 | + return; |
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| 594 | + |
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| 595 | + vc.vd = voltdm; |
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| 596 | + voltdm->write(OMAP4_VDD_DEFAULT_VAL, OMAP4_PRM_VOLTCTRL_OFFSET); |
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| 597 | +} |
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| 598 | + |
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| 545 | 599 | /* OMAP4 specific voltage init functions */ |
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| 546 | 600 | static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) |
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| 547 | 601 | { |
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| 602 | + omap4_vc_init_pmic_signaling(voltdm); |
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| 548 | 603 | omap4_set_timings(voltdm, true); |
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| 549 | 604 | omap4_set_timings(voltdm, false); |
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| 550 | 605 | } |
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| .. | .. |
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| 615 | 670 | const struct i2c_init_data *i2c_data; |
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| 616 | 671 | |
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| 617 | 672 | if (!voltdm->pmic->i2c_high_speed) { |
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| 618 | | - pr_warn("%s: only high speed supported!\n", __func__); |
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| 673 | + pr_info("%s: using bootloader low-speed timings\n", __func__); |
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| 619 | 674 | return; |
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| 620 | 675 | } |
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| 621 | 676 | |
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