~hc/RK356X_SDK_RELEASE.git

..	..	@@ -1,11 +1,7 @@
	1	+/* SPDX-License-Identifier: GPL-2.0-only */
1	2	/*
2	3	* Copyright 2016 Freescale Semiconductor, Inc.
3	4	* Copyright 2017 NXP
4		- *
5		- * This program is free software; you can redistribute it and/or modify
6		- * it under the terms of the GNU General Public License version 2 as
7		- * published by the Free Software Foundation.
8		- *
9	5	*/
10	6
11	7	#ifndef __DTS_IMX7ULP_PINFUNC_H
..	..	@@ -116,6 +112,7 @@
116	112	#define IMX7ULP_PAD_PTC13__LPI2C7_SDA 0x0034 0x030c 0x5 0x1
117	113	#define IMX7ULP_PAD_PTC13__TPM7_CLKIN 0x0034 0x02f4 0x6 0x1
118	114	#define IMX7ULP_PAD_PTC13__FB_AD13 0x0034 0x0000 0x9 0x0
	115	+#define IMX7ULP_PAD_PTC13__USB0_ID 0x0034 0x0338 0xb 0x1
119	116	#define IMX7ULP_PAD_PTC14__PTC14 0x0038 0x0000 0x1 0x0
120	117	#define IMX7ULP_PAD_PTC14__TRACE_D1 0x0038 0x0000 0xa 0x0
121	118	#define IMX7ULP_PAD_PTC14__FXIO1_D10 0x0038 0x022c 0x2 0x1
..	..	@@ -136,6 +133,7 @@
136	133	#define IMX7ULP_PAD_PTC16__LPSPI3_SIN 0x0040 0x0324 0x3 0x1
137	134	#define IMX7ULP_PAD_PTC16__TPM7_CH2 0x0040 0x02e4 0x6 0x1
138	135	#define IMX7ULP_PAD_PTC16__FB_ALE_FB_CS1_B_FB_TS_B 0x0040 0x0000 0x9 0x0
	136	+#define IMX7ULP_PAD_PTC16__USB1_OC2 0x0040 0x0334 0xb 0x1
139	137	#define IMX7ULP_PAD_PTC17__PTC17 0x0044 0x0000 0x1 0x0
140	138	#define IMX7ULP_PAD_PTC17__FXIO1_D13 0x0044 0x0238 0x2 0x1
141	139	#define IMX7ULP_PAD_PTC17__LPSPI3_SOUT 0x0044 0x0328 0x3 0x1
..	..	@@ -146,11 +144,16 @@
146	144	#define IMX7ULP_PAD_PTC18__LPSPI3_SCK 0x0048 0x0320 0x3 0x1
147	145	#define IMX7ULP_PAD_PTC18__TPM6_CH0 0x0048 0x02d0 0x6 0x1
148	146	#define IMX7ULP_PAD_PTC18__FB_OE_B 0x0048 0x0000 0x9 0x0
	147	+#define IMX7ULP_PAD_PTC18__USB0_ID 0x0048 0x0338 0xb 0x2
	148	+#define IMX7ULP_PAD_PTC18__VIU_DE 0x0048 0x033c 0xc 0x1
149	149	#define IMX7ULP_PAD_PTC19__PTC19 0x004c 0x0000 0x1 0x0
150	150	#define IMX7ULP_PAD_PTC19__FXIO1_D15 0x004c 0x0240 0x2 0x1
151	151	#define IMX7ULP_PAD_PTC19__LPSPI3_PCS0 0x004c 0x0310 0x3 0x1
152	152	#define IMX7ULP_PAD_PTC19__TPM6_CH1 0x004c 0x02d4 0x6 0x1
153	153	#define IMX7ULP_PAD_PTC19__FB_A16 0x004c 0x0000 0x9 0x0
	154	+#define IMX7ULP_PAD_PTC19__USB0_ID 0x004c 0x0338 0xa 0x3
	155	+#define IMX7ULP_PAD_PTC19__USB1_PWR2 0x004c 0x0000 0xb 0x0
	156	+#define IMX7ULP_PAD_PTC19__VIU_DE 0x004c 0x033c 0xc 0x3
154	157	#define IMX7ULP_PAD_PTD0__PTD0 0x0080 0x0000 0x1 0x0
155	158	#define IMX7ULP_PAD_PTD0__SDHC0_RESET_B 0x0080 0x0000 0x8 0x0
156	159	#define IMX7ULP_PAD_PTD1__PTD1 0x0084 0x0000 0x1 0x0
..	..	@@ -218,6 +221,7 @@
218	221	#define IMX7ULP_PAD_PTE5__LPI2C5_SDA 0x0114 0x02c0 0x5 0x2
219	222	#define IMX7ULP_PAD_PTE5__TPM5_CH0 0x0114 0x02c4 0x6 0x2
220	223	#define IMX7ULP_PAD_PTE5__SDHC1_D2 0x0114 0x0000 0x8 0x0
	224	+#define IMX7ULP_PAD_PTE5__VIU_DE 0x0114 0x033c 0xc 0x2
221	225	#define IMX7ULP_PAD_PTE6__PTE6 0x0118 0x0000 0x1 0x0
222	226	#define IMX7ULP_PAD_PTE6__FXIO1_D25 0x0118 0x0000 0x2 0x0
223	227	#define IMX7ULP_PAD_PTE6__LPSPI2_SCK 0x0118 0x02ac 0x3 0x2
..	..	@@ -226,8 +230,10 @@
226	230	#define IMX7ULP_PAD_PTE6__TPM7_CH3 0x0118 0x02e8 0x6 0x2
227	231	#define IMX7ULP_PAD_PTE6__SDHC1_D4 0x0118 0x0000 0x8 0x0
228	232	#define IMX7ULP_PAD_PTE6__FB_A17 0x0118 0x0000 0x9 0x0
	233	+#define IMX7ULP_PAD_PTE6__USB0_OC 0x0118 0x0330 0xb 0x1
229	234	#define IMX7ULP_PAD_PTE7__PTE7 0x011c 0x0000 0x1 0x0
230	235	#define IMX7ULP_PAD_PTE7__TRACE_D7 0x011c 0x0000 0xa 0x0
	236	+#define IMX7ULP_PAD_PTE7__USB0_PWR 0x011c 0x0000 0xb 0x0
231	237	#define IMX7ULP_PAD_PTE7__VIU_FID 0x011c 0x0000 0xc 0x0
232	238	#define IMX7ULP_PAD_PTE7__FXIO1_D24 0x011c 0x0000 0x2 0x0
233	239	#define IMX7ULP_PAD_PTE7__LPSPI2_PCS0 0x011c 0x029c 0x3 0x2
..	..	@@ -278,6 +284,7 @@
278	284	#define IMX7ULP_PAD_PTE11__FB_A20 0x012c 0x0000 0x9 0x0
279	285	#define IMX7ULP_PAD_PTE12__PTE12 0x0130 0x0000 0x1 0x0
280	286	#define IMX7ULP_PAD_PTE12__TRACE_D2 0x0130 0x0000 0xa 0x0
	287	+#define IMX7ULP_PAD_PTE12__USB1_OC2 0x0130 0x0334 0xb 0x2
281	288	#define IMX7ULP_PAD_PTE12__VIU_D20 0x0130 0x0000 0xc 0x0
282	289	#define IMX7ULP_PAD_PTE12__FXIO1_D19 0x0130 0x0000 0x2 0x0
283	290	#define IMX7ULP_PAD_PTE12__LPSPI3_SIN 0x0130 0x0324 0x3 0x2
..	..	@@ -288,6 +295,7 @@
288	295	#define IMX7ULP_PAD_PTE12__FB_A21 0x0130 0x0000 0x9 0x0
289	296	#define IMX7ULP_PAD_PTE13__PTE13 0x0134 0x0000 0x1 0x0
290	297	#define IMX7ULP_PAD_PTE13__TRACE_D1 0x0134 0x0000 0xa 0x0
	298	+#define IMX7ULP_PAD_PTE13__USB1_PWR2 0x0134 0x0000 0xb 0x0
291	299	#define IMX7ULP_PAD_PTE13__VIU_D21 0x0134 0x0000 0xc 0x0
292	300	#define IMX7ULP_PAD_PTE13__FXIO1_D18 0x0134 0x0000 0x2 0x0
293	301	#define IMX7ULP_PAD_PTE13__LPSPI3_SOUT 0x0134 0x0328 0x3 0x2
..	..	@@ -298,6 +306,7 @@
298	306	#define IMX7ULP_PAD_PTE13__FB_A22 0x0134 0x0000 0x9 0x0
299	307	#define IMX7ULP_PAD_PTE14__PTE14 0x0138 0x0000 0x1 0x0
300	308	#define IMX7ULP_PAD_PTE14__TRACE_D0 0x0138 0x0000 0xa 0x0
	309	+#define IMX7ULP_PAD_PTE14__USB0_OC 0x0138 0x0330 0xb 0x2
301	310	#define IMX7ULP_PAD_PTE14__VIU_D22 0x0138 0x0000 0xc 0x0
302	311	#define IMX7ULP_PAD_PTE14__FXIO1_D17 0x0138 0x0000 0x2 0x0
303	312	#define IMX7ULP_PAD_PTE14__LPSPI3_SCK 0x0138 0x0320 0x3 0x2
..	..	@@ -308,6 +317,7 @@
308	317	#define IMX7ULP_PAD_PTE14__FB_A23 0x0138 0x0000 0x9 0x0
309	318	#define IMX7ULP_PAD_PTE15__PTE15 0x013c 0x0000 0x1 0x0
310	319	#define IMX7ULP_PAD_PTE15__TRACE_CLKOUT 0x013c 0x0000 0xa 0x0
	320	+#define IMX7ULP_PAD_PTE15__USB0_PWR 0x013c 0x0000 0xb 0x0
311	321	#define IMX7ULP_PAD_PTE15__VIU_D23 0x013c 0x0000 0xc 0x0
312	322	#define IMX7ULP_PAD_PTE15__FXIO1_D16 0x013c 0x0000 0x2 0x0
313	323	#define IMX7ULP_PAD_PTE15__LPSPI3_PCS0 0x013c 0x0310 0x3 0x2
..	..	@@ -315,7 +325,7 @@
315	325	#define IMX7ULP_PAD_PTE15__TPM6_CH1 0x013c 0x02d4 0x6 0x2
316	326	#define IMX7ULP_PAD_PTE15__FB_A24 0x013c 0x0000 0x9 0x0
317	327	#define IMX7ULP_PAD_PTF0__PTF0 0x0180 0x0000 0x1 0x0
318		-#define IMX7ULP_PAD_PTF0__VIU_DE 0x0180 0x0000 0xc 0x0
	328	+#define IMX7ULP_PAD_PTF0__VIU_DE 0x0180 0x033c 0xc 0x0
319	329	#define IMX7ULP_PAD_PTF0__LPUART4_CTS_B 0x0180 0x0244 0x4 0x3
320	330	#define IMX7ULP_PAD_PTF0__LPI2C4_SCL 0x0180 0x0278 0x5 0x3
321	331	#define IMX7ULP_PAD_PTF0__TPM4_CLKIN 0x0180 0x0298 0x6 0x3