| .. | .. |
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| 1 | | -/* |
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| 2 | | - * Copyright 2017 NXP |
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| 3 | | - * |
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| 4 | | - * This file is dual-licensed: you can use it either under the terms |
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| 5 | | - * of the GPL or the X11 license, at your option. Note that this dual |
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| 6 | | - * licensing only applies to this file, and not this project as a |
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| 7 | | - * whole. |
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| 8 | | - * |
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| 9 | | - * a) This file is free software; you can redistribute it and/or |
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| 10 | | - * modify it under the terms of the GNU General Public License as |
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| 11 | | - * published by the Free Software Foundation; either version 2 of the |
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| 12 | | - * License, or (at your option) any later version. |
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| 13 | | - * |
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| 14 | | - * This file is distributed in the hope that it will be useful, |
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| 15 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 16 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 17 | | - * GNU General Public License for more details. |
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| 18 | | - * |
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| 19 | | - * Or, alternatively, |
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| 20 | | - * |
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| 21 | | - * b) Permission is hereby granted, free of charge, to any person |
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| 22 | | - * obtaining a copy of this software and associated documentation |
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| 23 | | - * files (the "Software"), to deal in the Software without |
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| 24 | | - * restriction, including without limitation the rights to use, |
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| 25 | | - * copy, modify, merge, publish, distribute, sublicense, and/or |
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| 26 | | - * sell copies of the Software, and to permit persons to whom the |
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| 27 | | - * Software is furnished to do so, subject to the following |
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| 28 | | - * conditions: |
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| 29 | | - * |
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| 30 | | - * The above copyright notice and this permission notice shall be |
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| 31 | | - * included in all copies or substantial portions of the Software. |
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| 32 | | - * |
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| 33 | | - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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| 34 | | - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES |
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| 35 | | - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND |
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| 36 | | - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT |
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| 37 | | - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, |
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| 38 | | - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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| 39 | | - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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| 40 | | - * OTHER DEALINGS IN THE SOFTWARE. |
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| 41 | | - */ |
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| 1 | +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
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| 2 | +// |
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| 3 | +// Copyright 2017 NXP |
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| 42 | 4 | |
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| 43 | 5 | #include "imx7d-pico.dtsi" |
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| 44 | 6 | |
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| 45 | 7 | / { |
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| 8 | + model = "TechNexion PICO-IMX7D Board and PI baseboard"; |
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| 9 | + compatible = "technexion,imx7d-pico-pi", "fsl,imx7d"; |
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| 10 | + |
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| 11 | + leds { |
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| 12 | + compatible = "gpio-leds"; |
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| 13 | + pinctrl-names = "default"; |
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| 14 | + pinctrl-0 = <&pinctrl_gpio_leds>; |
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| 15 | + |
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| 16 | + led { |
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| 17 | + label = "gpio-led"; |
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| 18 | + gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>; |
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| 19 | + }; |
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| 20 | + }; |
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| 21 | + |
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| 46 | 22 | sound { |
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| 47 | 23 | compatible = "simple-audio-card"; |
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| 48 | 24 | simple-audio-card,name = "imx7-sgtl5000"; |
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| .. | .. |
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| 54 | 30 | }; |
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| 55 | 31 | |
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| 56 | 32 | dailink_master: simple-audio-card,codec { |
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| 57 | | - sound-dai = <&codec>; |
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| 58 | | - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; |
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| 59 | | - }; |
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| 60 | | - }; |
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| 61 | | -}; |
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| 62 | | - |
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| 63 | | -&fec1 { |
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| 64 | | - pinctrl-names = "default"; |
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| 65 | | - pinctrl-0 = <&pinctrl_enet1>; |
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| 66 | | - assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, |
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| 67 | | - <&clks IMX7D_ENET1_TIME_ROOT_CLK>; |
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| 68 | | - assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; |
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| 69 | | - assigned-clock-rates = <0>, <100000000>; |
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| 70 | | - phy-mode = "rgmii"; |
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| 71 | | - phy-handle = <ðphy0>; |
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| 72 | | - fsl,magic-packet; |
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| 73 | | - status = "okay"; |
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| 74 | | - |
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| 75 | | - mdio { |
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| 76 | | - #address-cells = <1>; |
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| 77 | | - #size-cells = <0>; |
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| 78 | | - |
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| 79 | | - ethphy0: ethernet-phy@1 { |
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| 80 | | - compatible = "ethernet-phy-ieee802.3-c22"; |
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| 81 | | - reg = <1>; |
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| 82 | | - status = "okay"; |
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| 33 | + sound-dai = <&sgtl5000>; |
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| 34 | + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; |
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| 83 | 35 | }; |
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| 84 | 36 | }; |
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| 85 | 37 | }; |
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| 86 | 38 | |
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| 87 | 39 | &i2c1 { |
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| 88 | | - clock-frequency = <100000>; |
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| 89 | | - pinctrl-names = "default"; |
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| 90 | | - pinctrl-0 = <&pinctrl_i2c1>; |
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| 91 | | - status = "okay"; |
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| 92 | | - |
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| 93 | | - codec: sgtl5000@a { |
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| 40 | + sgtl5000: codec@a { |
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| 94 | 41 | #sound-dai-cells = <0>; |
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| 95 | 42 | reg = <0x0a>; |
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| 96 | 43 | compatible = "fsl,sgtl5000"; |
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| 97 | | - clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_CLK>; |
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| 44 | + clocks = <&clks IMX7D_AUDIO_MCLK_ROOT_DIV>; |
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| 98 | 45 | VDDA-supply = <®_2p5v>; |
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| 99 | 46 | VDDIO-supply = <®_vref_1v8>; |
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| 100 | 47 | }; |
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| 101 | 48 | }; |
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| 102 | 49 | |
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| 103 | | - |
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| 104 | | -&sai1 { |
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| 105 | | - pinctrl-names = "default"; |
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| 106 | | - pinctrl-0 = <&pinctrl_sai1>; |
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| 107 | | - assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, |
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| 108 | | - <&clks IMX7D_SAI1_ROOT_CLK>; |
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| 109 | | - assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; |
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| 110 | | - assigned-clock-rates = <0>, <24576000>; |
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| 111 | | - status = "okay"; |
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| 112 | | -}; |
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| 113 | | - |
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| 114 | | -&uart5 { |
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| 115 | | - pinctrl-names = "default"; |
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| 116 | | - pinctrl-0 = <&pinctrl_uart5>; |
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| 117 | | - assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>; |
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| 118 | | - assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; |
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| 119 | | - status = "okay"; |
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| 120 | | -}; |
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| 121 | | - |
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| 122 | | -&usbotg1 { |
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| 123 | | - vbus-supply = <®_usb_otg1_vbus>; |
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| 124 | | - status = "okay"; |
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| 125 | | -}; |
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| 126 | | - |
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| 127 | | -&usbotg2 { |
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| 128 | | - vbus-supply = <®_usb_otg2_vbus>; |
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| 129 | | - dr_mode = "host"; |
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| 130 | | - status = "okay"; |
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| 50 | +&i2c4 { |
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| 51 | + polytouch: touchscreen@38 { |
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| 52 | + compatible = "edt,edt-ft5x06"; |
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| 53 | + reg = <0x38>; |
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| 54 | + pinctrl-names = "default"; |
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| 55 | + pinctrl-0 = <&pinctrl_touchscreen>; |
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| 56 | + interrupt-parent = <&gpio2>; |
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| 57 | + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; |
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| 58 | + reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; |
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| 59 | + touchscreen-size-x = <800>; |
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| 60 | + touchscreen-size-y = <480>; |
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| 61 | + }; |
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| 131 | 62 | }; |
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| 132 | 63 | |
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| 133 | 64 | &iomuxc { |
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| 134 | | - pinctrl_enet1: enet1grp { |
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| 65 | + pinctrl-names = "default"; |
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| 66 | + pinctrl-0 = <&pinctrl_hog>; |
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| 67 | + |
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| 68 | + pinctrl_hog: hoggrp { |
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| 135 | 69 | fsl,pins = < |
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| 136 | | - MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 |
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| 137 | | - MX7D_PAD_SD2_WP__ENET1_MDC 0x3 |
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| 138 | | - MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 |
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| 139 | | - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 |
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| 140 | | - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 |
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| 141 | | - MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 |
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| 142 | | - MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 |
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| 143 | | - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 |
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| 144 | | - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 |
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| 145 | | - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 |
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| 146 | | - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 |
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| 147 | | - MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 |
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| 148 | | - MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 |
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| 149 | | - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 |
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| 70 | + MX7D_PAD_EPDC_DATA00__GPIO2_IO0 0x14 |
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| 71 | + MX7D_PAD_EPDC_DATA01__GPIO2_IO1 0x14 |
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| 72 | + MX7D_PAD_EPDC_DATA02__GPIO2_IO2 0x14 |
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| 73 | + MX7D_PAD_EPDC_DATA03__GPIO2_IO3 0x14 |
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| 74 | + MX7D_PAD_EPDC_DATA05__GPIO2_IO5 0x14 |
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| 75 | + MX7D_PAD_EPDC_DATA12__GPIO2_IO12 0x14 |
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| 76 | + MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 |
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| 150 | 77 | >; |
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| 151 | 78 | }; |
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| 152 | 79 | |
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| 153 | | - pinctrl_i2c1: i2c1grp { |
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| 80 | + pinctrl_gpio_leds: gpioledsgrp { |
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| 154 | 81 | fsl,pins = < |
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| 155 | | - MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f |
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| 156 | | - MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f |
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| 82 | + MX7D_PAD_EPDC_DATA06__GPIO2_IO6 0x14 |
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| 157 | 83 | >; |
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| 158 | 84 | }; |
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| 159 | 85 | |
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| 160 | | - pinctrl_sai1: sai1grp { |
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| 86 | + pinctrl_touchscreen: touchscreengrp { |
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| 161 | 87 | fsl,pins = < |
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| 162 | | - MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f |
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| 163 | | - MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f |
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| 164 | | - MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 |
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| 165 | | - MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f |
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| 88 | + MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x14 |
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| 89 | + MX7D_PAD_EPDC_DATA13__GPIO2_IO13 0x14 |
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| 166 | 90 | >; |
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| 167 | 91 | }; |
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| 168 | 92 | |
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| 169 | | - pinctrl_uart5: uart5grp { |
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| 170 | | - fsl,pins = < |
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| 171 | | - MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79 |
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| 172 | | - MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79 |
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| 173 | | - >; |
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| 174 | | - }; |
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| 175 | | - |
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| 176 | | - pinctrl_usbotg1_pwr: usbotg_pwr { |
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| 177 | | - fsl,pins = < |
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| 178 | | - MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14 |
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| 179 | | - >; |
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| 180 | | - }; |
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| 181 | 93 | }; |
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