add REDIRECT

hc

2024-10-09 05e59e5fb0064c97a1c10921ecd549f2d4a58565

 kernel/sound/soc/rockchip/rockchip_i2s.c
..
..
@@ -21,6 +21,8 @@
21
21
 #include <sound/dmaengine_pcm.h>
22
22
 
23
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 #include "rockchip_i2s.h"
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+#include "rockchip_dlp_pcm.h"
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+#include "rockchip_utils.h"
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26
 
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 #define DRV_NAME "rockchip-i2s"
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28
 
..
..
@@ -333,6 +335,25 @@
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 	return ret;
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 }
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337
 
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+static void rockchip_i2s_get_performance(struct snd_pcm_substream *substream,
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+					 struct snd_pcm_hw_params *params,
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+					 struct snd_soc_dai *dai,
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+					 unsigned int csr)
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+{
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+	struct rk_i2s_dev *i2s = to_info(dai);
344
+	unsigned int tdl;
345
+	int fifo;
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+
347
+	regmap_read(i2s->regmap, I2S_DMACR, &tdl);
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+
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+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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+		fifo = I2S_DMACR_TDL_V(tdl) * I2S_TXCR_CSR_V(csr);
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+	else
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+		fifo = I2S_DMACR_RDL_V(tdl) * I2S_RXCR_CSR_V(csr);
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+
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+	rockchip_utils_get_performance(substream, params, dai, fifo);
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+}
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+
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 static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
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 				  struct snd_pcm_hw_params *params,
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 				  struct snd_soc_dai *dai)
..
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@@ -400,6 +421,8 @@
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 		return -EINVAL;
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 	}
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423
 
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+	rockchip_i2s_get_performance(substream, params, dai, val);
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+
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426
 	if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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 		regmap_update_bits(i2s->regmap, I2S_RXCR,
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 				   I2S_RXCR_VDW_MASK | I2S_RXCR_CSR_MASK,
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@@ -437,6 +460,14 @@
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 			   I2S_DMACR_TDL(16));
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 	regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
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 			   I2S_DMACR_RDL(16));
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+
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+	return 0;
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+}
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+
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+static int rockchip_i2s_hw_free(struct snd_pcm_substream *substream,
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+				struct snd_soc_dai *dai)
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+{
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+	rockchip_utils_put_performance(substream, dai);
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471
 
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 	return 0;
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473
 }
..
..
@@ -571,8 +602,8 @@
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 static int rockchip_i2s_clk_compensation_get(struct snd_kcontrol *kcontrol,
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603
 					     struct snd_ctl_elem_value *ucontrol)
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604
 {
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-	struct snd_soc_dai *dai = snd_kcontrol_chip(kcontrol);
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-	struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai);
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+	struct snd_soc_component *compnt = snd_soc_kcontrol_component(kcontrol);
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+	struct rk_i2s_dev *i2s = snd_soc_component_get_drvdata(compnt);
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607
 
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 	ucontrol->value.integer.value[0] = i2s->clk_ppm;
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609
 
..
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@@ -582,8 +613,8 @@
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 static int rockchip_i2s_clk_compensation_put(struct snd_kcontrol *kcontrol,
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 					     struct snd_ctl_elem_value *ucontrol)
584
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 {
585
-	struct snd_soc_dai *dai = snd_kcontrol_chip(kcontrol);
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-	struct rk_i2s_dev *i2s = snd_soc_dai_get_drvdata(dai);
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+	struct snd_soc_component *compnt = snd_soc_kcontrol_component(kcontrol);
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+	struct rk_i2s_dev *i2s = snd_soc_component_get_drvdata(compnt);
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 	int ppm = ucontrol->value.integer.value[0];
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619
 
589
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 	if ((ucontrol->value.integer.value[0] < CLK_PPM_MIN) ||
..
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@@ -646,6 +677,7 @@
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 	.startup = rockchip_i2s_startup,
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 	.shutdown = rockchip_i2s_shutdown,
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 	.hw_params = rockchip_i2s_hw_params,
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+	.hw_free = rockchip_i2s_hw_free,
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 	.set_bclk_ratio	= rockchip_i2s_set_bclk_ratio,
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 	.set_sysclk = rockchip_i2s_set_sysclk,
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 	.set_fmt = rockchip_i2s_set_fmt,
..
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@@ -798,7 +830,8 @@
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 	case I2S_CLR:
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831
 	case I2S_TXDR:
800
832
 	case I2S_RXDR:
801
-	case I2S_FIFOLR:
833
+	case I2S_TXFIFOLR:
834
+	case I2S_RXFIFOLR:
802
835
 	case I2S_INTSR:
803
836
 		return true;
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837
 	default:
..
..
@@ -811,7 +844,8 @@
811
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 	switch (reg) {
812
845
 	case I2S_INTSR:
813
846
 	case I2S_CLR:
814
-	case I2S_FIFOLR:
847
+	case I2S_TXFIFOLR:
848
+	case I2S_RXFIFOLR:
815
849
 	case I2S_TXDR:
816
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 	case I2S_RXDR:
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851
 		return true;
..
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@@ -938,7 +972,7 @@
938
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 		i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
939
973
 		i2s->playback_dma_data.maxburst = 8;
940
974
 
941
-		if (!of_property_read_u32(node, "rockchip,playback-channels", &val)) {
975
+		if (!device_property_read_u32(i2s->dev, "rockchip,playback-channels", &val)) {
942
976
 			if (val >= 2 && val <= 8)
943
977
 				dai->playback.channels_max = val;
944
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 		}
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@@ -960,14 +994,14 @@
960
994
 		i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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 		i2s->capture_dma_data.maxburst = 8;
962
996
 
963
-		if (!of_property_read_u32(node, "rockchip,capture-channels", &val)) {
997
+		if (!device_property_read_u32(i2s->dev, "rockchip,capture-channels", &val)) {
964
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 			if (val >= 2 && val <= 8)
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 				dai->capture.channels_max = val;
966
1000
 		}
967
1001
 	}
968
1002
 
969
1003
 	i2s->clk_trcm = I2S_CKR_TRCM_TXRX;
970
-	if (!of_property_read_u32(node, "rockchip,clk-trcm", &val)) {
1004
+	if (!device_property_read_u32(i2s->dev, "rockchip,clk-trcm", &val)) {
971
1005
 		if (val >= 0 && val <= 2) {
972
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 			i2s->clk_trcm = val << I2S_CKR_TRCM_SHIFT;
973
1007
 			if (i2s->clk_trcm)
..
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@@ -1015,6 +1049,36 @@
1015
1049
 
1016
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 	return 0;
1017
1051
 }
1052
+
1053
+static int rockchip_i2s_get_fifo_count(struct device *dev,
1054
+				       struct snd_pcm_substream *substream)
1055
+{
1056
+	struct rk_i2s_dev *i2s = dev_get_drvdata(dev);
1057
+	unsigned int tx, rx;
1058
+	int val = 0;
1059
+
1060
+	regmap_read(i2s->regmap, I2S_TXFIFOLR, &tx);
1061
+	regmap_read(i2s->regmap, I2S_RXFIFOLR, &rx);
1062
+
1063
+	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1064
+		val = I2S_FIFOLR_XFL3(tx) +
1065
+		      I2S_FIFOLR_XFL2(tx) +
1066
+		      I2S_FIFOLR_XFL1(tx) +
1067
+		      I2S_FIFOLR_XFL0(tx);
1068
+	else
1069
+		/* XFL4 is compatible for old version */
1070
+		val = I2S_FIFOLR_XFL4(tx) +
1071
+		      I2S_FIFOLR_XFL3(rx) +
1072
+		      I2S_FIFOLR_XFL2(rx) +
1073
+		      I2S_FIFOLR_XFL1(rx) +
1074
+		      I2S_FIFOLR_XFL0(rx);
1075
+
1076
+	return val;
1077
+}
1078
+
1079
+static const struct snd_dlp_config dconfig = {
1080
+	.get_fifo_count = rockchip_i2s_get_fifo_count,
1081
+};
1018
1082
 
1019
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 static int rockchip_i2s_probe(struct platform_device *pdev)
1020
1084
 {
..
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@@ -1067,7 +1131,7 @@
1067
1131
 	dev_set_drvdata(&pdev->dev, i2s);
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1132
 
1069
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 	i2s->mclk_calibrate =
1070
-		of_property_read_bool(node, "rockchip,mclk-calibrate");
1134
+		device_property_read_bool(&pdev->dev, "rockchip,mclk-calibrate");
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 	if (i2s->mclk_calibrate) {
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 		i2s->mclk_root = devm_clk_get(&pdev->dev, "i2s_clk_root");
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1137
 		if (IS_ERR(i2s->mclk_root))
..
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@@ -1136,12 +1200,16 @@
1136
1200
 		goto err_suspend;
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1201
 	}
1138
1202
 
1139
-	if (of_property_read_bool(node, "rockchip,no-dmaengine")) {
1203
+	if (device_property_read_bool(&pdev->dev, "rockchip,no-dmaengine")) {
1140
1204
 		dev_info(&pdev->dev, "Used for Multi-DAI\n");
1141
1205
 		return 0;
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1206
 	}
1143
1207
 
1144
-	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
1208
+	if (device_property_read_bool(&pdev->dev, "rockchip,digital-loopback"))
1209
+		ret = devm_snd_dmaengine_dlp_register(&pdev->dev, &dconfig);
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+	else
1211
+		ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
1212
+
1145
1213
 	if (ret) {
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1214
 		dev_err(&pdev->dev, "Could not register PCM\n");
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1215
 		goto err_suspend;