| .. | .. |
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| 1 | 1 | // SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note |
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| 2 | 2 | /* |
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| 3 | 3 | * |
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| 4 | | - * (C) COPYRIGHT 2016-2021 ARM Limited. All rights reserved. |
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| 4 | + * (C) COPYRIGHT 2016-2023 ARM Limited. All rights reserved. |
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| 5 | 5 | * |
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| 6 | 6 | * This program is free software and is provided to you under the terms of the |
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| 7 | 7 | * GNU General Public License version 2 as published by the Free Software |
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| .. | .. |
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| 23 | 23 | |
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| 24 | 24 | #include "mali_kbase_ipa_counter_common_jm.h" |
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| 25 | 25 | #include "mali_kbase.h" |
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| 26 | | - |
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| 26 | +#include <backend/gpu/mali_kbase_model_linux.h> |
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| 27 | 27 | |
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| 28 | 28 | /* Performance counter blocks base offsets */ |
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| 29 | 29 | #define JM_BASE (0 * KBASE_IPA_NR_BYTES_PER_BLOCK) |
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| 30 | | -#define TILER_BASE (1 * KBASE_IPA_NR_BYTES_PER_BLOCK) |
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| 31 | 30 | #define MEMSYS_BASE (2 * KBASE_IPA_NR_BYTES_PER_BLOCK) |
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| 32 | 31 | |
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| 33 | 32 | /* JM counter block offsets */ |
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| 34 | 33 | #define JM_GPU_ACTIVE (KBASE_IPA_NR_BYTES_PER_CNT * 6) |
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| 35 | 34 | |
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| 36 | | -/* Tiler counter block offsets */ |
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| 37 | | -#define TILER_ACTIVE (KBASE_IPA_NR_BYTES_PER_CNT * 45) |
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| 38 | | - |
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| 39 | 35 | /* MEMSYS counter block offsets */ |
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| 40 | 36 | #define MEMSYS_L2_ANY_LOOKUP (KBASE_IPA_NR_BYTES_PER_CNT * 25) |
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| 41 | 37 | |
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| 42 | 38 | /* SC counter block offsets */ |
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| 43 | | -#define SC_FRAG_ACTIVE (KBASE_IPA_NR_BYTES_PER_CNT * 4) |
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| 44 | | -#define SC_EXEC_CORE_ACTIVE (KBASE_IPA_NR_BYTES_PER_CNT * 26) |
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| 45 | 39 | #define SC_EXEC_INSTR_FMA (KBASE_IPA_NR_BYTES_PER_CNT * 27) |
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| 46 | 40 | #define SC_EXEC_INSTR_COUNT (KBASE_IPA_NR_BYTES_PER_CNT * 28) |
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| 47 | 41 | #define SC_EXEC_INSTR_MSG (KBASE_IPA_NR_BYTES_PER_CNT * 30) |
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| .. | .. |
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| 49 | 43 | #define SC_TEX_COORD_ISSUE (KBASE_IPA_NR_BYTES_PER_CNT * 40) |
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| 50 | 44 | #define SC_TEX_TFCH_NUM_OPERATIONS (KBASE_IPA_NR_BYTES_PER_CNT * 42) |
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| 51 | 45 | #define SC_VARY_INSTR (KBASE_IPA_NR_BYTES_PER_CNT * 49) |
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| 52 | | -#define SC_VARY_SLOT_32 (KBASE_IPA_NR_BYTES_PER_CNT * 50) |
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| 53 | | -#define SC_VARY_SLOT_16 (KBASE_IPA_NR_BYTES_PER_CNT * 51) |
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| 54 | | -#define SC_BEATS_RD_LSC (KBASE_IPA_NR_BYTES_PER_CNT * 56) |
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| 55 | | -#define SC_BEATS_WR_LSC (KBASE_IPA_NR_BYTES_PER_CNT * 61) |
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| 56 | 46 | #define SC_BEATS_WR_TIB (KBASE_IPA_NR_BYTES_PER_CNT * 62) |
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| 57 | 47 | |
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| 58 | 48 | /** |
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| 59 | | - * get_jm_counter() - get performance counter offset inside the Job Manager block |
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| 49 | + * kbase_g7x_power_model_get_jm_counter() - get performance counter offset |
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| 50 | + * inside the Job Manager block |
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| 60 | 51 | * @model_data: pointer to GPU model data. |
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| 61 | | - * @counter_block_offset: offset in bytes of the performance counter inside the Job Manager block. |
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| 52 | + * @counter_block_offset: offset in bytes of the performance counter inside |
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| 53 | + * the Job Manager block. |
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| 62 | 54 | * |
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| 63 | 55 | * Return: Block offset in bytes of the required performance counter. |
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| 64 | 56 | */ |
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| .. | .. |
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| 69 | 61 | } |
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| 70 | 62 | |
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| 71 | 63 | /** |
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| 72 | | - * get_memsys_counter() - get performance counter offset inside the Memory System block |
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| 64 | + * kbase_g7x_power_model_get_memsys_counter() - get performance counter offset |
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| 65 | + * inside the Memory System block |
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| 73 | 66 | * @model_data: pointer to GPU model data. |
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| 74 | | - * @counter_block_offset: offset in bytes of the performance counter inside the (first) Memory System block. |
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| 67 | + * @counter_block_offset: offset in bytes of the performance counter inside |
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| 68 | + * the (first) Memory System block. |
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| 75 | 69 | * |
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| 76 | 70 | * Return: Block offset in bytes of the required performance counter. |
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| 77 | 71 | */ |
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| .. | .. |
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| 85 | 79 | } |
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| 86 | 80 | |
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| 87 | 81 | /** |
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| 88 | | - * get_sc_counter() - get performance counter offset inside the Shader Cores block |
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| 82 | + * kbase_g7x_power_model_get_sc_counter() - get performance counter offset |
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| 83 | + * inside the Shader Cores block |
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| 89 | 84 | * @model_data: pointer to GPU model data. |
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| 90 | | - * @counter_block_offset: offset in bytes of the performance counter inside the (first) Shader Cores block. |
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| 85 | + * @counter_block_offset: offset in bytes of the performance counter inside |
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| 86 | + * the (first) Shader Cores block. |
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| 91 | 87 | * |
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| 92 | 88 | * Return: Block offset in bytes of the required performance counter. |
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| 93 | 89 | */ |
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| 94 | 90 | static u32 kbase_g7x_power_model_get_sc_counter(struct kbase_ipa_model_vinstr_data *model_data, |
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| 95 | 91 | u32 counter_block_offset) |
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| 96 | 92 | { |
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| 93 | +#if IS_ENABLED(CONFIG_MALI_BIFROST_NO_MALI) |
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| 94 | + const u32 sc_base = MEMSYS_BASE + |
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| 95 | + (KBASE_DUMMY_MODEL_MAX_MEMSYS_BLOCKS * |
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| 96 | + KBASE_IPA_NR_BYTES_PER_BLOCK); |
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| 97 | +#else |
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| 97 | 98 | const u32 sc_base = MEMSYS_BASE + |
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| 98 | 99 | (model_data->kbdev->gpu_props.props.l2_props.num_l2_slices * |
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| 99 | 100 | KBASE_IPA_NR_BYTES_PER_BLOCK); |
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| 101 | +#endif |
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| 100 | 102 | return sc_base + counter_block_offset; |
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| 101 | 103 | } |
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| 102 | 104 | |
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| 103 | 105 | /** |
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| 104 | | - * memsys_single_counter() - calculate energy for a single Memory System performance counter. |
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| 105 | | - * @model_data: pointer to GPU model data. |
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| 106 | | - * @coeff: default value of coefficient for IPA group. |
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| 107 | | - * @offset: offset in bytes of the counter inside the block it belongs to. |
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| 106 | + * kbase_g7x_sum_all_memsys_blocks() - calculate energy for a single Memory |
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| 107 | + * System performance counter. |
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| 108 | + * @model_data: pointer to GPU model data. |
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| 109 | + * @coeff: default value of coefficient for IPA group. |
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| 110 | + * @counter_block_offset: offset in bytes of the counter inside the block it |
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| 111 | + * belongs to. |
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| 108 | 112 | * |
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| 109 | 113 | * Return: Energy estimation for a single Memory System performance counter. |
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| 110 | 114 | */ |
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| 111 | 115 | static s64 kbase_g7x_sum_all_memsys_blocks( |
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| 112 | 116 | struct kbase_ipa_model_vinstr_data *model_data, |
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| 113 | 117 | s32 coeff, |
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| 114 | | - u32 offset) |
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| 118 | + u32 counter_block_offset) |
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| 115 | 119 | { |
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| 116 | 120 | u32 counter; |
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| 117 | 121 | |
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| 118 | | - counter = kbase_g7x_power_model_get_memsys_counter(model_data, offset); |
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| 122 | + counter = kbase_g7x_power_model_get_memsys_counter(model_data, |
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| 123 | + counter_block_offset); |
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| 119 | 124 | return kbase_ipa_sum_all_memsys_blocks(model_data, coeff, counter); |
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| 120 | 125 | } |
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| 121 | 126 | |
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| 122 | 127 | /** |
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| 123 | | - * sum_all_shader_cores() - calculate energy for a Shader Cores performance counter for all cores. |
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| 128 | + * kbase_g7x_sum_all_shader_cores() - calculate energy for a Shader Cores |
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| 129 | + * performance counter for all cores. |
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| 124 | 130 | * @model_data: pointer to GPU model data. |
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| 125 | 131 | * @coeff: default value of coefficient for IPA group. |
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| 126 | | - * @counter_block_offset: offset in bytes of the counter inside the block it belongs to. |
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| 132 | + * @counter_block_offset: offset in bytes of the counter inside the block it |
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| 133 | + * belongs to. |
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| 127 | 134 | * |
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| 128 | | - * Return: Energy estimation for a Shader Cores performance counter for all cores. |
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| 135 | + * Return: Energy estimation for a Shader Cores performance counter for all |
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| 136 | + * cores. |
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| 129 | 137 | */ |
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| 130 | 138 | static s64 kbase_g7x_sum_all_shader_cores( |
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| 131 | 139 | struct kbase_ipa_model_vinstr_data *model_data, |
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| .. | .. |
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| 140 | 148 | } |
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| 141 | 149 | |
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| 142 | 150 | /** |
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| 143 | | - * jm_single_counter() - calculate energy for a single Job Manager performance counter. |
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| 151 | + * kbase_g7x_jm_single_counter() - calculate energy for a single Job Manager performance counter. |
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| 144 | 152 | * @model_data: pointer to GPU model data. |
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| 145 | 153 | * @coeff: default value of coefficient for IPA group. |
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| 146 | 154 | * @counter_block_offset: offset in bytes of the counter inside the block it belongs to. |
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| .. | .. |
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| 160 | 168 | } |
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| 161 | 169 | |
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| 162 | 170 | /** |
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| 163 | | - * get_active_cycles() - return the GPU_ACTIVE counter |
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| 171 | + * kbase_g7x_get_active_cycles() - return the GPU_ACTIVE counter |
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| 164 | 172 | * @model_data: pointer to GPU model data. |
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| 165 | 173 | * |
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| 166 | 174 | * Return: the number of cycles the GPU was active during the counter sampling |
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| .. | .. |
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| 447 | 455 | }, |
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| 448 | 456 | }; |
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| 449 | 457 | |
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| 450 | | - |
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| 451 | | -#define IPA_POWER_MODEL_OPS(gpu, init_token) \ |
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| 452 | | - const struct kbase_ipa_model_ops kbase_ ## gpu ## _ipa_model_ops = { \ |
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| 453 | | - .name = "mali-" #gpu "-power-model", \ |
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| 454 | | - .init = kbase_ ## init_token ## _power_model_init, \ |
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| 455 | | - .term = kbase_ipa_vinstr_common_model_term, \ |
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| 456 | | - .get_dynamic_coeff = kbase_ipa_vinstr_dynamic_coeff, \ |
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| 457 | | - .reset_counter_data = kbase_ipa_vinstr_reset_data, \ |
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| 458 | | - }; \ |
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| 459 | | - KBASE_EXPORT_TEST_API(kbase_ ## gpu ## _ipa_model_ops) |
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| 458 | +#define IPA_POWER_MODEL_OPS(gpu, init_token) \ |
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| 459 | + static const struct kbase_ipa_model_ops kbase_##gpu##_ipa_model_ops = { \ |
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| 460 | + .name = "mali-" #gpu "-power-model", \ |
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| 461 | + .init = kbase_##init_token##_power_model_init, \ |
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| 462 | + .term = kbase_ipa_vinstr_common_model_term, \ |
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| 463 | + .get_dynamic_coeff = kbase_ipa_vinstr_dynamic_coeff, \ |
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| 464 | + .reset_counter_data = kbase_ipa_vinstr_reset_data, \ |
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| 465 | + } |
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| 460 | 466 | |
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| 461 | 467 | #define STANDARD_POWER_MODEL(gpu, reference_voltage) \ |
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| 462 | 468 | static int kbase_ ## gpu ## _power_model_init(\ |
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| .. | .. |
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| 522 | 528 | |
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| 523 | 529 | const char *kbase_ipa_counter_model_name_from_id(u32 gpu_id) |
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| 524 | 530 | { |
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| 525 | | - const u32 prod_id = (gpu_id & GPU_ID_VERSION_PRODUCT_ID) >> |
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| 526 | | - GPU_ID_VERSION_PRODUCT_ID_SHIFT; |
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| 531 | + const u32 prod_id = |
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| 532 | + (gpu_id & GPU_ID_VERSION_PRODUCT_ID) >> KBASE_GPU_ID_VERSION_PRODUCT_ID_SHIFT; |
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| 527 | 533 | |
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| 528 | 534 | switch (GPU_ID2_MODEL_MATCH_VALUE(prod_id)) { |
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| 529 | 535 | case GPU_ID2_PRODUCT_TMIX: |
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