hc
2024-10-09 05e59e5fb0064c97a1c10921ecd549f2d4a58565
kernel/arch/mips/cavium-octeon/octeon-platform.c
....@@ -86,11 +86,12 @@
8686 "refclk-frequency", &clock_rate);
8787 if (i) {
8888 dev_err(dev, "No UCTL \"refclk-frequency\"\n");
89
+ of_node_put(uctl_node);
8990 goto exit;
9091 }
9192 i = of_property_read_string(uctl_node,
9293 "refclk-type", &clock_type);
93
-
94
+ of_node_put(uctl_node);
9495 if (!i && strcmp("crystal", clock_type) == 0)
9596 is_crystal_clock = true;
9697 }
....@@ -141,7 +142,7 @@
141142 default:
142143 pr_err("Invalid UCTL clock rate of %u, using 12000000 instead\n",
143144 clock_rate);
144
- /* Fall through */
145
+ fallthrough;
145146 case 12000000:
146147 clk_rst_ctl.s.p_refclk_div = 0;
147148 break;
....@@ -442,7 +443,7 @@
442443 }
443444 device_initcall(octeon_rng_device_init);
444445
445
-const struct of_device_id octeon_ids[] __initconst = {
446
+static const struct of_device_id octeon_ids[] __initconst = {
446447 { .compatible = "simple-bus", },
447448 { .compatible = "cavium,octeon-6335-uctl", },
448449 { .compatible = "cavium,octeon-5750-usbn", },
....@@ -458,6 +459,23 @@
458459 return !OCTEON_IS_MODEL(OCTEON_CN52XX) &&
459460 !OCTEON_IS_MODEL(OCTEON_CN6XXX) &&
460461 !OCTEON_IS_MODEL(OCTEON_CN56XX);
462
+}
463
+
464
+static bool __init octeon_has_fixed_link(int ipd_port)
465
+{
466
+ switch (cvmx_sysinfo_get()->board_type) {
467
+ case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
468
+ case CVMX_BOARD_TYPE_CN3010_EVB_HS5:
469
+ case CVMX_BOARD_TYPE_CN3020_EVB_HS5:
470
+ case CVMX_BOARD_TYPE_CUST_NB5:
471
+ case CVMX_BOARD_TYPE_EBH3100:
472
+ /* Port 1 on these boards is always gigabit. */
473
+ return ipd_port == 1;
474
+ case CVMX_BOARD_TYPE_BBGW_REF:
475
+ /* Ports 0 and 1 connect to the switch. */
476
+ return ipd_port == 0 || ipd_port == 1;
477
+ }
478
+ return false;
461479 }
462480
463481 static void __init octeon_fdt_set_phy(int eth, int phy_addr)
....@@ -588,12 +606,52 @@
588606 fdt_nop_node(initial_boot_params, node);
589607 }
590608
609
+static void __init _octeon_rx_tx_delay(int eth, int rx_delay, int tx_delay)
610
+{
611
+ fdt_setprop_inplace_cell(initial_boot_params, eth, "rx-delay",
612
+ rx_delay);
613
+ fdt_setprop_inplace_cell(initial_boot_params, eth, "tx-delay",
614
+ tx_delay);
615
+}
616
+
617
+static void __init octeon_rx_tx_delay(int eth, int iface, int port)
618
+{
619
+ switch (cvmx_sysinfo_get()->board_type) {
620
+ case CVMX_BOARD_TYPE_CN3005_EVB_HS5:
621
+ if (iface == 0) {
622
+ if (port == 0) {
623
+ /*
624
+ * Boards with gigabit WAN ports need a
625
+ * different setting that is compatible with
626
+ * 100 Mbit settings
627
+ */
628
+ _octeon_rx_tx_delay(eth, 0xc, 0x0c);
629
+ return;
630
+ } else if (port == 1) {
631
+ /* Different config for switch port. */
632
+ _octeon_rx_tx_delay(eth, 0x0, 0x0);
633
+ return;
634
+ }
635
+ }
636
+ break;
637
+ case CVMX_BOARD_TYPE_UBNT_E100:
638
+ if (iface == 0 && port <= 2) {
639
+ _octeon_rx_tx_delay(eth, 0x0, 0x10);
640
+ return;
641
+ }
642
+ break;
643
+ }
644
+ fdt_nop_property(initial_boot_params, eth, "rx-delay");
645
+ fdt_nop_property(initial_boot_params, eth, "tx-delay");
646
+}
647
+
591648 static void __init octeon_fdt_pip_port(int iface, int i, int p, int max)
592649 {
593650 char name_buffer[20];
594651 int eth;
595652 int phy_addr;
596653 int ipd_port;
654
+ int fixed_link;
597655
598656 snprintf(name_buffer, sizeof(name_buffer), "ethernet@%x", p);
599657 eth = fdt_subnode_offset(initial_boot_params, iface, name_buffer);
....@@ -611,6 +669,13 @@
611669
612670 phy_addr = cvmx_helper_board_get_mii_address(ipd_port);
613671 octeon_fdt_set_phy(eth, phy_addr);
672
+
673
+ fixed_link = fdt_subnode_offset(initial_boot_params, eth, "fixed-link");
674
+ if (fixed_link < 0)
675
+ WARN_ON(octeon_has_fixed_link(ipd_port));
676
+ else if (!octeon_has_fixed_link(ipd_port))
677
+ fdt_nop_node(initial_boot_params, fixed_link);
678
+ octeon_rx_tx_delay(eth, i, p);
614679 }
615680
616681 static void __init octeon_fdt_pip_iface(int pip, int idx)
....@@ -1054,7 +1119,7 @@
10541119 new_f[0] = cpu_to_be32(48000000);
10551120 fdt_setprop_inplace(initial_boot_params, usbn,
10561121 "refclk-frequency", new_f, sizeof(new_f));
1057
- /* Fall through ...*/
1122
+ fallthrough;
10581123 case USB_CLOCK_TYPE_REF_12:
10591124 /* Missing "refclk-type" defaults to external. */
10601125 fdt_nop_property(initial_boot_params, usbn, "refclk-type");