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2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 u-boot/drivers/video/drm/max96745.c
..
..
@@ -9,41 +9,111 @@
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 #include <i2c.h>
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 #include <max96745.h>
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 #include <video_bridge.h>
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+#include <linux/iopoll.h>
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 #include "rockchip_bridge.h"
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 #include "rockchip_display.h"
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 #include "rockchip_panel.h"
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17
 
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-struct max96745_bridge_priv {
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-	struct gpio_desc lock_gpio;
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-};
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-
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-static bool max96745_bridge_detect(struct rockchip_bridge *bridge)
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+static bool max96745_bridge_link_locked(struct udevice *dev)
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 {
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-	struct max96745_bridge_priv *priv = dev_get_priv(bridge->dev);
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+	int ret;
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-	if (!dm_gpio_get_value(&priv->lock_gpio))
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+	ret = dm_i2c_reg_read(dev->parent, 0x002a);
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+	if (ret < 0)
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+		return false;
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+
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+	if (!FIELD_GET(LINK_LOCKED, ret))
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 		return false;
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 	return true;
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 }
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+static bool max96745_bridge_detect(struct rockchip_bridge *bridge)
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+{
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+	return max96745_bridge_link_locked(bridge->dev);
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+}
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+
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+static void max96745_bridge_enable(struct rockchip_bridge *bridge)
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+{
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+	struct udevice *dev = bridge->dev;
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+	struct drm_display_mode *mode = &bridge->state->conn_state.mode;
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+	u8 cxtp, tx_rate;
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+	int ret;
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+
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+	ret = dm_i2c_reg_read(dev->parent, 0x0011);
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+	if (ret < 0)
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+		return;
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+
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+	cxtp = FIELD_GET(CXTP_A, ret);
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+
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+	ret = dm_i2c_reg_read(dev->parent, 0x0028);
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+	if (ret < 0)
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+		return;
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+
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+	tx_rate = FIELD_GET(TX_RATE, ret);
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+
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+	if (!cxtp && mode->clock > 95000 && tx_rate == 1) {
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+		ret = dm_i2c_reg_clrset(dev->parent, 0x0028, TX_RATE,
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+					FIELD_PREP(TX_RATE, 2));
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+		if (ret < 0)
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+			return;
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+
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+		ret = dm_i2c_reg_clrset(dev->parent, 0x0029, RESET_ONESHOT,
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+					FIELD_PREP(RESET_ONESHOT, 1));
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+		if (ret < 0)
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+			return;
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+
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+		if (readx_poll_timeout(max96745_bridge_link_locked, dev, ret,
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+				       ret, 200000))
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+			dev_err(dev, "%s: GMSL link not locked\n", __func__);
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+	}
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+}
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+
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+static void max96745_bridge_post_disable(struct rockchip_bridge *bridge)
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+{
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+	struct udevice *dev = bridge->dev;
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+	u8 cxtp, tx_rate;
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+	int ret;
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+
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+	ret = dm_i2c_reg_read(dev->parent, 0x0011);
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+	if (ret < 0)
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+		return;
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+
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+	cxtp = FIELD_GET(CXTP_A, ret);
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+
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+	ret = dm_i2c_reg_read(dev->parent, 0x0028);
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+	if (ret < 0)
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+		return;
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+
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+	tx_rate = FIELD_GET(TX_RATE, ret);
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+
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+	if (!cxtp && tx_rate == 2) {
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+		ret = dm_i2c_reg_clrset(dev->parent, 0x0028, TX_RATE,
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+					FIELD_PREP(TX_RATE, 1));
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+		if (ret < 0)
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+			return;
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+
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+		ret = dm_i2c_reg_clrset(dev->parent, 0x0029, RESET_ONESHOT,
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+					FIELD_PREP(RESET_ONESHOT, 1));
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+		if (ret < 0)
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+			return;
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+
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+		if (readx_poll_timeout(max96745_bridge_link_locked, dev, ret,
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+				       ret, 200000))
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+			dev_err(dev, "%s: GMSL link not locked\n", __func__);
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+	}
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+}
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+
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 static const struct rockchip_bridge_funcs max96745_bridge_funcs = {
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-	.detect = max96745_bridge_detect,
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+	.detect		= max96745_bridge_detect,
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+	.enable		= max96745_bridge_enable,
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+	.post_disable	= max96745_bridge_post_disable,
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 };
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 static int max96745_bridge_probe(struct udevice *dev)
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 {
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-	struct max96745_bridge_priv *priv = dev_get_priv(dev);
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 	struct rockchip_bridge *bridge;
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-	int ret;
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-
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-	ret = gpio_request_by_name(dev, "lock-gpios", 0, &priv->lock_gpio,
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-				   GPIOD_IS_IN);
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-	if (ret) {
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-		dev_err(dev, "failed to get lock GPIO: %d\n", ret);
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-		return ret;
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-	}
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117
 
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 	bridge = calloc(1, sizeof(*bridge));
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 	if (!bridge)
..
..
@@ -66,5 +136,4 @@
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 	.id = UCLASS_VIDEO_BRIDGE,
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 	.of_match = max96745_bridge_of_match,
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 	.probe = max96745_bridge_probe,
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-	.priv_auto_alloc_size = sizeof(struct max96745_bridge_priv),
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 };