change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/tools/power/cpupower/utils/idle_monitor/mperf_monitor.c
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@@ -1,7 +1,6 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /*
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  *  (C) 2010,2011       Thomas Renninger <trenn@suse.de>, Novell Inc.
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- *
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- *  Licensed under the terms of the GNU GPL License version 2.
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  */
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 #if defined(__i386__) || defined(__x86_64__)
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@@ -19,6 +18,10 @@
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 #define MSR_APERF	0xE8
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 #define MSR_MPERF	0xE7
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+
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+#define RDPRU ".byte 0x0f, 0x01, 0xfd"
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+#define RDPRU_ECX_MPERF	0
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+#define RDPRU_ECX_APERF	1
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 #define MSR_TSC	0x10
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@@ -67,8 +70,8 @@
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  */
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 static unsigned long max_frequency;
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-static unsigned long long tsc_at_measure_start;
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-static unsigned long long tsc_at_measure_end;
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+static unsigned long long *tsc_at_measure_start;
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+static unsigned long long *tsc_at_measure_end;
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 static unsigned long long *mperf_previous_count;
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 static unsigned long long *aperf_previous_count;
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 static unsigned long long *mperf_current_count;
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@@ -87,15 +90,51 @@
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 	return ret;
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 }
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-static int mperf_init_stats(unsigned int cpu)
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+static int get_aperf_mperf(int cpu, unsigned long long *aval,
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+				    unsigned long long *mval)
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 {
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-	unsigned long long val;
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+	unsigned long low_a, high_a;
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+	unsigned long low_m, high_m;
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 	int ret;
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-	ret = read_msr(cpu, MSR_APERF, &val);
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-	aperf_previous_count[cpu] = val;
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-	ret |= read_msr(cpu, MSR_MPERF, &val);
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-	mperf_previous_count[cpu] = val;
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+	/*
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+	 * Running on the cpu from which we read the registers will
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+	 * prevent APERF/MPERF from going out of sync because of IPI
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+	 * latency introduced by read_msr()s.
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+	 */
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+	if (mperf_monitor.flags.per_cpu_schedule) {
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+		if (bind_cpu(cpu))
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+			return 1;
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+	}
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+
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+	if (cpupower_cpu_info.caps & CPUPOWER_CAP_AMD_RDPRU) {
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+		asm volatile(RDPRU
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+			     : "=a" (low_a), "=d" (high_a)
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+			     : "c" (RDPRU_ECX_APERF));
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+		asm volatile(RDPRU
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+			     : "=a" (low_m), "=d" (high_m)
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+			     : "c" (RDPRU_ECX_MPERF));
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+
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+		*aval = ((low_a) | (high_a) << 32);
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+		*mval = ((low_m) | (high_m) << 32);
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+
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+		return 0;
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+	}
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+
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+	ret  = read_msr(cpu, MSR_APERF, aval);
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+	ret |= read_msr(cpu, MSR_MPERF, mval);
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+
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+	return ret;
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+}
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+
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+static int mperf_init_stats(unsigned int cpu)
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+{
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+	unsigned long long aval, mval;
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+	int ret;
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+
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+	ret = get_aperf_mperf(cpu, &aval, &mval);
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+	aperf_previous_count[cpu] = aval;
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+	mperf_previous_count[cpu] = mval;
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 	is_valid[cpu] = !ret;
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 	return 0;
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@@ -103,13 +142,12 @@
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 static int mperf_measure_stats(unsigned int cpu)
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 {
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-	unsigned long long val;
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+	unsigned long long aval, mval;
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 	int ret;
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-	ret = read_msr(cpu, MSR_APERF, &val);
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-	aperf_current_count[cpu] = val;
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-	ret |= read_msr(cpu, MSR_MPERF, &val);
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-	mperf_current_count[cpu] = val;
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+	ret = get_aperf_mperf(cpu, &aval, &mval);
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+	aperf_current_count[cpu] = aval;
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+	mperf_current_count[cpu] = mval;
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 	is_valid[cpu] = !ret;
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 	return 0;
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@@ -131,7 +169,7 @@
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 	aperf_diff = aperf_current_count[cpu] - aperf_previous_count[cpu];
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 	if (max_freq_mode == MAX_FREQ_TSC_REF) {
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-		tsc_diff = tsc_at_measure_end - tsc_at_measure_start;
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+		tsc_diff = tsc_at_measure_end[cpu] - tsc_at_measure_start[cpu];
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 		*percent = 100.0 * mperf_diff / tsc_diff;
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 		dprint("%s: TSC Ref - mperf_diff: %llu, tsc_diff: %llu\n",
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 		       mperf_cstates[id].name, mperf_diff, tsc_diff);
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@@ -168,7 +206,7 @@
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 	if (max_freq_mode == MAX_FREQ_TSC_REF) {
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 		/* Calculate max_freq from TSC count */
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-		tsc_diff = tsc_at_measure_end - tsc_at_measure_start;
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+		tsc_diff = tsc_at_measure_end[cpu] - tsc_at_measure_start[cpu];
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 		time_diff = timespec_diff_us(time_start, time_end);
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 		max_frequency = tsc_diff / time_diff;
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 	}
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@@ -187,33 +225,27 @@
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 static int mperf_start(void)
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 {
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 	int cpu;
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-	unsigned long long dbg;
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 	clock_gettime(CLOCK_REALTIME, &time_start);
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-	mperf_get_tsc(&tsc_at_measure_start);
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-	for (cpu = 0; cpu < cpu_count; cpu++)
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+	for (cpu = 0; cpu < cpu_count; cpu++) {
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+		mperf_get_tsc(&tsc_at_measure_start[cpu]);
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 		mperf_init_stats(cpu);
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+	}
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-	mperf_get_tsc(&dbg);
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-	dprint("TSC diff: %llu\n", dbg - tsc_at_measure_start);
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 	return 0;
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 }
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 static int mperf_stop(void)
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 {
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-	unsigned long long dbg;
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 	int cpu;
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-	for (cpu = 0; cpu < cpu_count; cpu++)
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+	for (cpu = 0; cpu < cpu_count; cpu++) {
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 		mperf_measure_stats(cpu);
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+		mperf_get_tsc(&tsc_at_measure_end[cpu]);
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+	}
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-	mperf_get_tsc(&tsc_at_measure_end);
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 	clock_gettime(CLOCK_REALTIME, &time_end);
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-
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-	mperf_get_tsc(&dbg);
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-	dprint("TSC diff: %llu\n", dbg - tsc_at_measure_end);
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-
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 	return 0;
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 }
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@@ -241,7 +273,8 @@
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 	if (!(cpupower_cpu_info.caps & CPUPOWER_CAP_INV_TSC))
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 		goto use_sysfs;
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-	if (cpupower_cpu_info.vendor == X86_VENDOR_AMD) {
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+	if (cpupower_cpu_info.vendor == X86_VENDOR_AMD ||
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+	    cpupower_cpu_info.vendor == X86_VENDOR_HYGON) {
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 		/* MSR_AMD_HWCR tells us whether TSC runs at P0/mperf
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 		 * freq.
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 		 * A test whether hwcr is accessable/available would be:
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@@ -305,13 +338,17 @@
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 	if (init_maxfreq_mode())
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 		return NULL;
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+	if (cpupower_cpu_info.vendor == X86_VENDOR_AMD)
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+		mperf_monitor.flags.per_cpu_schedule = 1;
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+
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 	/* Free this at program termination */
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 	is_valid = calloc(cpu_count, sizeof(int));
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 	mperf_previous_count = calloc(cpu_count, sizeof(unsigned long long));
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 	aperf_previous_count = calloc(cpu_count, sizeof(unsigned long long));
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 	mperf_current_count = calloc(cpu_count, sizeof(unsigned long long));
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 	aperf_current_count = calloc(cpu_count, sizeof(unsigned long long));
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-
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+	tsc_at_measure_start = calloc(cpu_count, sizeof(unsigned long long));
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+	tsc_at_measure_end = calloc(cpu_count, sizeof(unsigned long long));
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 	mperf_monitor.name_len = strlen(mperf_monitor.name);
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 	return &mperf_monitor;
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 }
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@@ -322,6 +359,8 @@
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 	free(aperf_previous_count);
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 	free(mperf_current_count);
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 	free(aperf_current_count);
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+	free(tsc_at_measure_start);
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+	free(tsc_at_measure_end);
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 	free(is_valid);
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 }
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@@ -333,7 +372,7 @@
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 	.stop			= mperf_stop,
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 	.do_register		= mperf_register,
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 	.unregister		= mperf_unregister,
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-	.needs_root		= 1,
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+	.flags.needs_root	= 1,
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 	.overflow_s		= 922000000 /* 922337203 seconds TSC overflow
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 					       at 20GHz */
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 };