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2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777 
 kernel/include/uapi/gpu/arm/bifrost/csf/mali_base_csf_kernel.h
....@@ -1,7 +1,7 @@
11 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
22 /*
33  *
4
- * (C) COPYRIGHT 2020-2021 ARM Limited. All rights reserved.
4
+ * (C) COPYRIGHT 2020-2022 ARM Limited. All rights reserved.
55  *
66  * This program is free software and is provided to you under the terms of the
77  * GNU General Public License version 2 as published by the Free Software
....@@ -23,97 +23,15 @@
2323 #define _UAPI_BASE_CSF_KERNEL_H_
2424 
2525 #include <linux/types.h>
26
+#include "../mali_base_common_kernel.h"
2627 
27
-/* Memory allocation, access/hint flags.
28
+/* Memory allocation, access/hint flags & mask specific to CSF GPU.
2829  *
2930  * See base_mem_alloc_flags.
3031  */
3132 
32
-/* IN */
33
-/* Read access CPU side
34
- */
35
-#define BASE_MEM_PROT_CPU_RD ((base_mem_alloc_flags)1 << 0)
36
-
37
-/* Write access CPU side
38
- */
39
-#define BASE_MEM_PROT_CPU_WR ((base_mem_alloc_flags)1 << 1)
40
-
41
-/* Read access GPU side
42
- */
43
-#define BASE_MEM_PROT_GPU_RD ((base_mem_alloc_flags)1 << 2)
44
-
45
-/* Write access GPU side
46
- */
47
-#define BASE_MEM_PROT_GPU_WR ((base_mem_alloc_flags)1 << 3)
48
-
49
-/* Execute allowed on the GPU side
50
- */
51
-#define BASE_MEM_PROT_GPU_EX ((base_mem_alloc_flags)1 << 4)
52
-
53
-/* Will be permanently mapped in kernel space.
54
- * Flag is only allowed on allocations originating from kbase.
55
- */
56
-#define BASEP_MEM_PERMANENT_KERNEL_MAPPING ((base_mem_alloc_flags)1 << 5)
57
-
58
-/* The allocation will completely reside within the same 4GB chunk in the GPU
59
- * virtual space.
60
- * Since this flag is primarily required only for the TLS memory which will
61
- * not be used to contain executable code and also not used for Tiler heap,
62
- * it can't be used along with BASE_MEM_PROT_GPU_EX and TILER_ALIGN_TOP flags.
63
- */
64
-#define BASE_MEM_GPU_VA_SAME_4GB_PAGE ((base_mem_alloc_flags)1 << 6)
65
-
66
-/* Userspace is not allowed to free this memory.
67
- * Flag is only allowed on allocations originating from kbase.
68
- */
69
-#define BASEP_MEM_NO_USER_FREE ((base_mem_alloc_flags)1 << 7)
70
-
71
-#define BASE_MEM_RESERVED_BIT_8 ((base_mem_alloc_flags)1 << 8)
72
-
73
-/* Grow backing store on GPU Page Fault
74
- */
75
-#define BASE_MEM_GROW_ON_GPF ((base_mem_alloc_flags)1 << 9)
76
-
77
-/* Page coherence Outer shareable, if available
78
- */
79
-#define BASE_MEM_COHERENT_SYSTEM ((base_mem_alloc_flags)1 << 10)
80
-
81
-/* Page coherence Inner shareable
82
- */
83
-#define BASE_MEM_COHERENT_LOCAL ((base_mem_alloc_flags)1 << 11)
84
-
85
-/* IN/OUT */
86
-/* Should be cached on the CPU, returned if actually cached
87
- */
88
-#define BASE_MEM_CACHED_CPU ((base_mem_alloc_flags)1 << 12)
89
-
90
-/* IN/OUT */
91
-/* Must have same VA on both the GPU and the CPU
92
- */
93
-#define BASE_MEM_SAME_VA ((base_mem_alloc_flags)1 << 13)
94
-
95
-/* OUT */
96
-/* Must call mmap to acquire a GPU address for the alloc
97
- */
98
-#define BASE_MEM_NEED_MMAP ((base_mem_alloc_flags)1 << 14)
99
-
100
-/* IN */
101
-/* Page coherence Outer shareable, required.
102
- */
103
-#define BASE_MEM_COHERENT_SYSTEM_REQUIRED ((base_mem_alloc_flags)1 << 15)
104
-
105
-/* Protected memory
106
- */
107
-#define BASE_MEM_PROTECTED ((base_mem_alloc_flags)1 << 16)
108
-
109
-/* Not needed physical memory
110
- */
111
-#define BASE_MEM_DONT_NEED ((base_mem_alloc_flags)1 << 17)
112
-
113
-/* Must use shared CPU/GPU zone (SAME_VA zone) but doesn't require the
114
- * addresses to be the same
115
- */
116
-#define BASE_MEM_IMPORT_SHARED ((base_mem_alloc_flags)1 << 18)
33
+/* Must be FIXED memory. */
34
+#define BASE_MEM_FIXED ((base_mem_alloc_flags)1 << 8)
11735 
11836 /* CSF event memory
11937  *
....@@ -130,41 +48,15 @@
13048 
13149 #define BASE_MEM_RESERVED_BIT_20 ((base_mem_alloc_flags)1 << 20)
13250 
133
-/* Should be uncached on the GPU, will work only for GPUs using AARCH64 mmu
134
- * mode. Some components within the GPU might only be able to access memory
135
- * that is GPU cacheable. Refer to the specific GPU implementation for more
136
- * details. The 3 shareability flags will be ignored for GPU uncached memory.
137
- * If used while importing USER_BUFFER type memory, then the import will fail
138
- * if the memory is not aligned to GPU and CPU cache line width.
139
- */
140
-#define BASE_MEM_UNCACHED_GPU ((base_mem_alloc_flags)1 << 21)
14151 
142
-/*
143
- * Bits [22:25] for group_id (0~15).
144
- *
145
- * base_mem_group_id_set() should be used to pack a memory group ID into a
146
- * base_mem_alloc_flags value instead of accessing the bits directly.
147
- * base_mem_group_id_get() should be used to extract the memory group ID from
148
- * a base_mem_alloc_flags value.
52
+/* Must be FIXABLE memory: its GPU VA will be determined at a later point,
53
+ * at which time it will be at a fixed GPU VA.
14954  */
150
-#define BASEP_MEM_GROUP_ID_SHIFT 22
151
-#define BASE_MEM_GROUP_ID_MASK \
152
-	((base_mem_alloc_flags)0xF << BASEP_MEM_GROUP_ID_SHIFT)
55
+#define BASE_MEM_FIXABLE ((base_mem_alloc_flags)1 << 29)
15356 
154
-/* Must do CPU cache maintenance when imported memory is mapped/unmapped
155
- * on GPU. Currently applicable to dma-buf type only.
57
+/* Note that the number of bits used for base_mem_alloc_flags
58
+ * must be less than BASE_MEM_FLAGS_NR_BITS !!!
15659  */
157
-#define BASE_MEM_IMPORT_SYNC_ON_MAP_UNMAP ((base_mem_alloc_flags)1 << 26)
158
-
159
-/* OUT */
160
-/* Kernel side cache sync ops required */
161
-#define BASE_MEM_KERNEL_SYNC ((base_mem_alloc_flags)1 << 28)
162
-
163
-/* Number of bits used as flags for base memory management
164
- *
165
- * Must be kept in sync with the base_mem_alloc_flags flags
166
- */
167
-#define BASE_MEM_FLAGS_NR_BITS 29
16860 
16961 /* A mask of all the flags which are only valid for allocations within kbase,
17062  * and may not be passed from user space.
....@@ -172,63 +64,23 @@
17264 #define BASEP_MEM_FLAGS_KERNEL_ONLY \
17365 	(BASEP_MEM_PERMANENT_KERNEL_MAPPING | BASEP_MEM_NO_USER_FREE)
17466 
175
-/* A mask for all output bits, excluding IN/OUT bits.
176
- */
177
-#define BASE_MEM_FLAGS_OUTPUT_MASK BASE_MEM_NEED_MMAP
178
-
179
-/* A mask for all input bits, including IN/OUT bits.
180
- */
181
-#define BASE_MEM_FLAGS_INPUT_MASK \
182
-	(((1 << BASE_MEM_FLAGS_NR_BITS) - 1) & ~BASE_MEM_FLAGS_OUTPUT_MASK)
183
-
18467 /* A mask of all currently reserved flags
18568  */
186
-#define BASE_MEM_FLAGS_RESERVED \
187
-	BASE_MEM_RESERVED_BIT_8 | BASE_MEM_RESERVED_BIT_20
69
+#define BASE_MEM_FLAGS_RESERVED BASE_MEM_RESERVED_BIT_20
18870 
189
-#define BASEP_MEM_INVALID_HANDLE               (0ull  << 12)
190
-#define BASE_MEM_MMU_DUMP_HANDLE               (1ull  << 12)
191
-#define BASE_MEM_TRACE_BUFFER_HANDLE           (2ull  << 12)
192
-#define BASE_MEM_MAP_TRACKING_HANDLE           (3ull  << 12)
193
-#define BASEP_MEM_WRITE_ALLOC_PAGES_HANDLE     (4ull  << 12)
194
-/* reserved handles ..-47<<PAGE_SHIFT> for future special handles */
195
-#define BASEP_MEM_CSF_USER_REG_PAGE_HANDLE     (47ul  << 12)
196
-#define BASEP_MEM_CSF_USER_IO_PAGES_HANDLE     (48ul  << 12)
197
-#define BASE_MEM_COOKIE_BASE                   (64ul  << 12)
198
-#define BASE_MEM_FIRST_FREE_ADDRESS            ((BITS_PER_LONG << 12) + \
199
-						BASE_MEM_COOKIE_BASE)
71
+/* Special base mem handles specific to CSF.
72
+ */
73
+#define BASEP_MEM_CSF_USER_REG_PAGE_HANDLE (47ul << LOCAL_PAGE_SHIFT)
74
+#define BASEP_MEM_CSF_USER_IO_PAGES_HANDLE (48ul << LOCAL_PAGE_SHIFT)
20075 
20176 #define KBASE_CSF_NUM_USER_IO_PAGES_HANDLE \
20277 	((BASE_MEM_COOKIE_BASE - BASEP_MEM_CSF_USER_IO_PAGES_HANDLE) >> \
20378 	 LOCAL_PAGE_SHIFT)
20479 
205
-/**
206
- * Valid set of just-in-time memory allocation flags
207
- */
80
+/* Valid set of just-in-time memory allocation flags */
20881 #define BASE_JIT_ALLOC_VALID_FLAGS ((__u8)0)
20982 
210
-/* Flags to pass to ::base_context_init.
211
- * Flags can be ORed together to enable multiple things.
212
- *
213
- * These share the same space as BASEP_CONTEXT_FLAG_*, and so must
214
- * not collide with them.
215
- */
216
-typedef __u32 base_context_create_flags;
217
-
218
-/* No flags set */
219
-#define BASE_CONTEXT_CREATE_FLAG_NONE ((base_context_create_flags)0)
220
-
221
-/* Base context is embedded in a cctx object (flag used for CINSTR
222
- * software counter macros)
223
- */
224
-#define BASE_CONTEXT_CCTX_EMBEDDED ((base_context_create_flags)1 << 0)
225
-
226
-/* Base context is a 'System Monitor' context for Hardware counters.
227
- *
228
- * One important side effect of this is that job submission is disabled.
229
- */
230
-#define BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED \
231
-	((base_context_create_flags)1 << 1)
83
+/* flags for base context specific to CSF */
23284 
23385 /* Base context creates a CSF event notification thread.
23486  *
....@@ -236,22 +88,6 @@
23688  * mandatory for the handling of CSF events.
23789  */
23890 #define BASE_CONTEXT_CSF_EVENT_THREAD ((base_context_create_flags)1 << 2)
239
-
240
-/* Bit-shift used to encode a memory group ID in base_context_create_flags
241
- */
242
-#define BASEP_CONTEXT_MMU_GROUP_ID_SHIFT (3)
243
-
244
-/* Bitmask used to encode a memory group ID in base_context_create_flags
245
- */
246
-#define BASEP_CONTEXT_MMU_GROUP_ID_MASK \
247
-	((base_context_create_flags)0xF << BASEP_CONTEXT_MMU_GROUP_ID_SHIFT)
248
-
249
-/* Bitpattern describing the base_context_create_flags that can be
250
- * passed to the kernel
251
- */
252
-#define BASEP_CONTEXT_CREATE_KERNEL_FLAGS \
253
-	(BASE_CONTEXT_SYSTEM_MONITOR_SUBMIT_DISABLED | \
254
-	 BASEP_CONTEXT_MMU_GROUP_ID_MASK)
25591 
25692 /* Bitpattern describing the ::base_context_create_flags that can be
25793  * passed to base_context_init()
....@@ -261,15 +97,7 @@
26197 	 BASE_CONTEXT_CSF_EVENT_THREAD | \
26298 	 BASEP_CONTEXT_CREATE_KERNEL_FLAGS)
26399 
264
-/* Enable additional tracepoints for latency measurements (TL_ATOM_READY,
265
- * TL_ATOM_DONE, TL_ATOM_PRIO_CHANGE, TL_ATOM_EVENT_POST)
266
- */
267
-#define BASE_TLSTREAM_ENABLE_LATENCY_TRACEPOINTS (1 << 0)
268
-
269
-/* Indicate that job dumping is enabled. This could affect certain timers
270
- * to account for the performance impact.
271
- */
272
-#define BASE_TLSTREAM_JOB_DUMPING_ENABLED (1 << 1)
100
+/* Flags for base tracepoint specific to CSF */
273101 
274102 /* Enable KBase tracepoints for CSF builds */
275103 #define BASE_TLSTREAM_ENABLE_CSF_TRACEPOINTS (1 << 2)
....@@ -290,9 +118,21 @@
290118 
291119 #define BASE_QUEUE_MAX_PRIORITY (15U)
292120 
293
-/* CQS Sync object is an array of __u32 event_mem[2], error field index is 1 */
294
-#define BASEP_EVENT_VAL_INDEX (0U)
295
-#define BASEP_EVENT_ERR_INDEX (1U)
121
+/* Sync32 object fields definition */
122
+#define BASEP_EVENT32_VAL_OFFSET (0U)
123
+#define BASEP_EVENT32_ERR_OFFSET (4U)
124
+#define BASEP_EVENT32_SIZE_BYTES (8U)
125
+
126
+/* Sync64 object fields definition */
127
+#define BASEP_EVENT64_VAL_OFFSET (0U)
128
+#define BASEP_EVENT64_ERR_OFFSET (8U)
129
+#define BASEP_EVENT64_SIZE_BYTES (16U)
130
+
131
+/* Sync32 object alignment, equal to its size */
132
+#define BASEP_EVENT32_ALIGN_BYTES (8U)
133
+
134
+/* Sync64 object alignment, equal to its size */
135
+#define BASEP_EVENT64_ALIGN_BYTES (16U)
296136 
297137 /* The upper limit for number of objects that could be waited/set per command.
298138  * This limit is now enforced as internally the error inherit inputs are
....@@ -301,41 +141,13 @@
301141  */
302142 #define BASEP_KCPU_CQS_MAX_NUM_OBJS ((size_t)32)
303143 
304
-#if MALI_UNIT_TEST
305
-/**
306
- * enum base_kcpu_command_type - Kernel CPU queue command type.
307
- * @BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL:       fence_signal,
308
- * @BASE_KCPU_COMMAND_TYPE_FENCE_WAIT:         fence_wait,
309
- * @BASE_KCPU_COMMAND_TYPE_CQS_WAIT:           cqs_wait,
310
- * @BASE_KCPU_COMMAND_TYPE_CQS_SET:            cqs_set,
311
- * @BASE_KCPU_COMMAND_TYPE_CQS_WAIT_OPERATION: cqs_wait_operation,
312
- * @BASE_KCPU_COMMAND_TYPE_CQS_SET_OPERATION:  cqs_set_operation,
313
- * @BASE_KCPU_COMMAND_TYPE_MAP_IMPORT:         map_import,
314
- * @BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT:       unmap_import,
315
- * @BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT_FORCE: unmap_import_force,
316
- * @BASE_KCPU_COMMAND_TYPE_JIT_ALLOC:          jit_alloc,
317
- * @BASE_KCPU_COMMAND_TYPE_JIT_FREE:           jit_free,
318
- * @BASE_KCPU_COMMAND_TYPE_GROUP_SUSPEND:      group_suspend,
319
- * @BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER:      error_barrier,
320
- * @BASE_KCPU_COMMAND_TYPE_SAMPLE_TIME:        sample_time,
321
- */
322
-enum base_kcpu_command_type {
323
-	BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL,
324
-	BASE_KCPU_COMMAND_TYPE_FENCE_WAIT,
325
-	BASE_KCPU_COMMAND_TYPE_CQS_WAIT,
326
-	BASE_KCPU_COMMAND_TYPE_CQS_SET,
327
-	BASE_KCPU_COMMAND_TYPE_CQS_WAIT_OPERATION,
328
-	BASE_KCPU_COMMAND_TYPE_CQS_SET_OPERATION,
329
-	BASE_KCPU_COMMAND_TYPE_MAP_IMPORT,
330
-	BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT,
331
-	BASE_KCPU_COMMAND_TYPE_UNMAP_IMPORT_FORCE,
332
-	BASE_KCPU_COMMAND_TYPE_JIT_ALLOC,
333
-	BASE_KCPU_COMMAND_TYPE_JIT_FREE,
334
-	BASE_KCPU_COMMAND_TYPE_GROUP_SUSPEND,
335
-	BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER,
336
-	BASE_KCPU_COMMAND_TYPE_SAMPLE_TIME,
337
-};
338
-#else
144
+/* CSF CSI EXCEPTION_HANDLER_FLAGS */
145
+#define BASE_CSF_TILER_OOM_EXCEPTION_FLAG (1u << 0)
146
+#define BASE_CSF_EXCEPTION_HANDLER_FLAGS_MASK (BASE_CSF_TILER_OOM_EXCEPTION_FLAG)
147
+
148
+/* Initial value for LATEST_FLUSH register */
149
+#define POWER_DOWN_LATEST_FLUSH_VALUE ((uint32_t)1)
150
+
339151 /**
340152  * enum base_kcpu_command_type - Kernel CPU queue command type.
341153  * @BASE_KCPU_COMMAND_TYPE_FENCE_SIGNAL:       fence_signal,
....@@ -365,9 +177,8 @@
365177 	BASE_KCPU_COMMAND_TYPE_JIT_ALLOC,
366178 	BASE_KCPU_COMMAND_TYPE_JIT_FREE,
367179 	BASE_KCPU_COMMAND_TYPE_GROUP_SUSPEND,
368
-	BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER,
180
+	BASE_KCPU_COMMAND_TYPE_ERROR_BARRIER
369181 };
370
-#endif /* MALI_UNIT_TEST */
371182 
372183 /**
373184  * enum base_queue_group_priority - Priority of a GPU Command Queue Group.
....@@ -426,7 +237,7 @@
426237 };
427238 
428239 /**
429
- * basep_cqs_data_type - Enumeration of CQS Data Types
240
+ * typedef basep_cqs_data_type - Enumeration of CQS Data Types
430241  *
431242  * @BASEP_CQS_DATA_TYPE_U32: The Data Type of a CQS Object's value
432243  *                           is an unsigned 32-bit integer
....@@ -439,7 +250,7 @@
439250 } basep_cqs_data_type;
440251 
441252 /**
442
- * basep_cqs_wait_operation_op - Enumeration of CQS Object Wait
253
+ * typedef basep_cqs_wait_operation_op - Enumeration of CQS Object Wait
443254  *                                Operation conditions
444255  *
445256  * @BASEP_CQS_WAIT_OPERATION_LE: CQS Wait Operation indicating that a
....@@ -480,7 +291,7 @@
480291 };
481292 
482293 /**
483
- * basep_cqs_set_operation_op - Enumeration of CQS Set Operations
294
+ * typedef basep_cqs_set_operation_op - Enumeration of CQS Set Operations
484295  *
485296  * @BASEP_CQS_SET_OPERATION_ADD: CQS Set operation for adding a value
486297  *                                to a synchronization object
....@@ -569,11 +380,6 @@
569380 	__u8 padding[3];
570381 };
571382 
572
-#if MALI_UNIT_TEST
573
-struct base_kcpu_command_sample_time_info {
574
-	__u64 time;
575
-};
576
-#endif /* MALI_UNIT_TEST */
577383 
578384 /**
579385  * struct base_kcpu_command - kcpu command.
....@@ -581,15 +387,17 @@
581387  * @padding:	padding to a multiple of 64 bits
582388  * @info:	structure which contains information about the kcpu command;
583389  *		actual type is determined by @p type
584
- * @info.fence:            Fence
585
- * @info.cqs_wait:         CQS wait
586
- * @info.cqs_set:          CQS set
587
- * @info.import:           import
588
- * @info.jit_alloc:        jit allocation
589
- * @info.jit_free:         jit deallocation
590
- * @info.suspend_buf_copy: suspend buffer copy
591
- * @info.sample_time:      sample time
592
- * @info.padding:          padding
390
+ * @info.fence:              Fence
391
+ * @info.cqs_wait:           CQS wait
392
+ * @info.cqs_set:            CQS set
393
+ * @info.cqs_wait_operation: CQS wait operation
394
+ * @info.cqs_set_operation:  CQS set operation
395
+ * @info.import:             import
396
+ * @info.jit_alloc:          JIT allocation
397
+ * @info.jit_free:           JIT deallocation
398
+ * @info.suspend_buf_copy:   suspend buffer copy
399
+ * @info.sample_time:        sample time
400
+ * @info.padding:            padding
593401  */
594402 struct base_kcpu_command {
595403 	__u8 type;
....@@ -604,9 +412,6 @@
604412 		struct base_kcpu_command_jit_alloc_info jit_alloc;
605413 		struct base_kcpu_command_jit_free_info jit_free;
606414 		struct base_kcpu_command_group_suspend_info suspend_buf_copy;
607
-#if MALI_UNIT_TEST
608
-		struct base_kcpu_command_sample_time_info sample_time;
609
-#endif /* MALI_UNIT_TEST */
610415 		__u64 padding[2]; /* No sub-struct should be larger */
611416 	} info;
612417 };
....@@ -762,4 +567,47 @@
762567 	} payload;
763568 };
764569 
570
+/**
571
+ * struct mali_base_gpu_core_props - GPU core props info
572
+ *
573
+ * @product_id: Pro specific value.
574
+ * @version_status: Status of the GPU release. No defined values, but starts at
575
+ *   0 and increases by one for each release status (alpha, beta, EAC, etc.).
576
+ *   4 bit values (0-15).
577
+ * @minor_revision: Minor release number of the GPU. "P" part of an "RnPn"
578
+ *   release number.
579
+ *   8 bit values (0-255).
580
+ * @major_revision: Major release number of the GPU. "R" part of an "RnPn"
581
+ *   release number.
582
+ *   4 bit values (0-15).
583
+ * @padding: padding to align to 8-byte
584
+ * @gpu_freq_khz_max: The maximum GPU frequency. Reported to applications by
585
+ *   clGetDeviceInfo()
586
+ * @log2_program_counter_size: Size of the shader program counter, in bits.
587
+ * @texture_features: TEXTURE_FEATURES_x registers, as exposed by the GPU. This
588
+ *   is a bitpattern where a set bit indicates that the format is supported.
589
+ *   Before using a texture format, it is recommended that the corresponding
590
+ *   bit be checked.
591
+ * @paddings: Padding bytes.
592
+ * @gpu_available_memory_size: Theoretical maximum memory available to the GPU.
593
+ *   It is unlikely that a client will be able to allocate all of this memory
594
+ *   for their own purposes, but this at least provides an upper bound on the
595
+ *   memory available to the GPU.
596
+ *   This is required for OpenCL's clGetDeviceInfo() call when
597
+ *   CL_DEVICE_GLOBAL_MEM_SIZE is requested, for OpenCL GPU devices. The
598
+ *   client will not be expecting to allocate anywhere near this value.
599
+ */
600
+struct mali_base_gpu_core_props {
601
+	__u32 product_id;
602
+	__u16 version_status;
603
+	__u16 minor_revision;
604
+	__u16 major_revision;
605
+	__u16 padding;
606
+	__u32 gpu_freq_khz_max;
607
+	__u32 log2_program_counter_size;
608
+	__u32 texture_features[BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS];
609
+	__u8 paddings[4];
610
+	__u64 gpu_available_memory_size;
611
+};
612
+
765613 #endif /* _UAPI_BASE_CSF_KERNEL_H_ */