forked from ~ljy/RK356X_SDK_RELEASE
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hc
2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777 
 kernel/drivers/tty/serial/8250/8250_port.c
....@@ -11,15 +11,13 @@
1111  *  membase is an 'ioremapped' cookie.
1212  */
1313 
14
-#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
15
-#define SUPPORT_SYSRQ
16
-#endif
17
-
1814 #include <linux/module.h>
1915 #include <linux/moduleparam.h>
2016 #include <linux/ioport.h>
2117 #include <linux/init.h>
18
+#include <linux/irq.h>
2219 #include <linux/console.h>
20
+#include <linux/gpio/consumer.h>
2321 #include <linux/sysrq.h>
2422 #include <linux/delay.h>
2523 #include <linux/platform_device.h>
....@@ -31,7 +29,6 @@
3129 #include <linux/nmi.h>
3230 #include <linux/mutex.h>
3331 #include <linux/slab.h>
34
-#include <linux/kdb.h>
3532 #include <linux/uaccess.h>
3633 #include <linux/pm_runtime.h>
3734 #include <linux/ktime.h>
....@@ -40,13 +37,6 @@
4037 #include <asm/irq.h>
4138 
4239 #include "8250.h"
43
-
44
-/*
45
- * These are definitions for the Exar XR17V35X and XR17(C|D)15X
46
- */
47
-#define UART_EXAR_INT0		0x80
48
-#define UART_EXAR_SLEEP		0x8b	/* Sleep mode */
49
-#define UART_EXAR_DVID		0x8d	/* Device identification */
5040 
5141 /* Nuvoton NPCM timeout register */
5242 #define UART_NPCM_TOR          7
....@@ -67,6 +57,7 @@
6757  * Here we define the default xmit fifo size used for each type of UART.
6858  */
6959 static const struct serial8250_config uart_config[] = {
60
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
7061 	[PORT_UNKNOWN] = {
7162 		.name		= "unknown",
7263 		.fifo_size	= 1,
....@@ -87,6 +78,7 @@
8778 		.fifo_size	= 1,
8879 		.tx_loadsz	= 1,
8980 	},
81
+#endif
9082 	[PORT_16550A] = {
9183 		.name		= "16550A",
9284 		.fifo_size	= 16,
....@@ -95,6 +87,7 @@
9587 		.rxtrig_bytes	= {1, 4, 8, 14},
9688 		.flags		= UART_CAP_FIFO,
9789 	},
90
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
9891 	[PORT_CIRRUS] = {
9992 		.name		= "Cirrus",
10093 		.fifo_size	= 1,
....@@ -310,6 +303,15 @@
310303 		.rxtrig_bytes	= {1, 4, 8, 14},
311304 		.flags		= UART_CAP_FIFO,
312305 	},
306
+	[PORT_SUNIX] = {
307
+		.name		= "Sunix",
308
+		.fifo_size	= 128,
309
+		.tx_loadsz	= 128,
310
+		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
311
+		.rxtrig_bytes	= {1, 32, 64, 112},
312
+		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP,
313
+	},
314
+#endif
313315 };
314316 
315317 /* Uart divisor latch read */
....@@ -387,6 +389,7 @@
387389 
388390 #endif
389391 
392
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
390393 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
391394 {
392395 	offset = offset << p->regshift;
....@@ -460,6 +463,7 @@
460463 	offset = offset << p->regshift;
461464 	outb(value, p->iobase + offset);
462465 }
466
+#endif
463467 
464468 static int serial8250_default_handle_irq(struct uart_port *port);
465469 
....@@ -470,6 +474,7 @@
470474 	up->dl_read = default_serial_dl_read;
471475 	up->dl_write = default_serial_dl_write;
472476 
477
+#ifndef CONFIG_ROCKCHIP_MINI_KERNEL
473478 	switch (p->iotype) {
474479 	case UPIO_HUB6:
475480 		p->serial_in = hub6_serial_in;
....@@ -510,6 +515,7 @@
510515 		p->serial_out = io_serial_out;
511516 		break;
512517 	}
518
+#endif
513519 	/* Remember loaded iotype */
514520 	up->cur_iotype = p->iotype;
515521 	p->handle_irq = serial8250_default_handle_irq;
....@@ -533,27 +539,6 @@
533539 }
534540 
535541 /*
536
- * For the 16C950
537
- */
538
-static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
539
-{
540
-	serial_out(up, UART_SCR, offset);
541
-	serial_out(up, UART_ICR, value);
542
-}
543
-
544
-static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
545
-{
546
-	unsigned int value;
547
-
548
-	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
549
-	serial_out(up, UART_SCR, offset);
550
-	value = serial_in(up, UART_ICR);
551
-	serial_icr_write(up, UART_ACR, up->acr);
552
-
553
-	return value;
554
-}
555
-
556
-/*
557542  * FIFO support.
558543  */
559544 static void serial8250_clear_fifos(struct uart_8250_port *p)
....@@ -564,17 +549,6 @@
564549 			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
565550 		serial_out(p, UART_FCR, 0);
566551 	}
567
-}
568
-
569
-static inline void serial8250_em485_rts_after_send(struct uart_8250_port *p)
570
-{
571
-	unsigned char mcr = serial8250_in_MCR(p);
572
-
573
-	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
574
-		mcr |= UART_MCR_RTS;
575
-	else
576
-		mcr &= ~UART_MCR_RTS;
577
-	serial8250_out_MCR(p, mcr);
578552 }
579553 
580554 static enum hrtimer_restart serial8250_em485_handle_start_tx(struct hrtimer *t);
....@@ -624,10 +598,10 @@
624598  *
625599  *	Return 0 - success, -errno - otherwise
626600  */
627
-int serial8250_em485_init(struct uart_8250_port *p)
601
+static int serial8250_em485_init(struct uart_8250_port *p)
628602 {
629603 	if (p->em485)
630
-		return 0;
604
+		goto deassert_rts;
631605 
632606 	p->em485 = kmalloc(sizeof(struct uart_8250_em485), GFP_ATOMIC);
633607 	if (!p->em485)
....@@ -641,11 +615,14 @@
641615 	p->em485->start_tx_timer.function = &serial8250_em485_handle_start_tx;
642616 	p->em485->port = p;
643617 	p->em485->active_timer = NULL;
644
-	serial8250_em485_rts_after_send(p);
618
+	p->em485->tx_stopped = true;
619
+
620
+deassert_rts:
621
+	if (p->em485->tx_stopped)
622
+		p->rs485_stop_tx(p);
645623 
646624 	return 0;
647625 }
648
-EXPORT_SYMBOL_GPL(serial8250_em485_init);
649626 
650627 /**
651628  *	serial8250_em485_destroy() - put uart_8250_port into normal state
....@@ -672,6 +649,41 @@
672649 	p->em485 = NULL;
673650 }
674651 EXPORT_SYMBOL_GPL(serial8250_em485_destroy);
652
+
653
+/**
654
+ * serial8250_em485_config() - generic ->rs485_config() callback
655
+ * @port: uart port
656
+ * @rs485: rs485 settings
657
+ *
658
+ * Generic callback usable by 8250 uart drivers to activate rs485 settings
659
+ * if the uart is incapable of driving RTS as a Transmit Enable signal in
660
+ * hardware, relying on software emulation instead.
661
+ */
662
+int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485)
663
+{
664
+	struct uart_8250_port *up = up_to_u8250p(port);
665
+
666
+	/* pick sane settings if the user hasn't */
667
+	if (!!(rs485->flags & SER_RS485_RTS_ON_SEND) ==
668
+	    !!(rs485->flags & SER_RS485_RTS_AFTER_SEND)) {
669
+		rs485->flags |= SER_RS485_RTS_ON_SEND;
670
+		rs485->flags &= ~SER_RS485_RTS_AFTER_SEND;
671
+	}
672
+
673
+	gpiod_set_value(port->rs485_term_gpio,
674
+			rs485->flags & SER_RS485_TERMINATE_BUS);
675
+
676
+	/*
677
+	 * Both serial8250_em485_init() and serial8250_em485_destroy()
678
+	 * are idempotent.
679
+	 */
680
+	if (rs485->flags & SER_RS485_ENABLED)
681
+		return serial8250_em485_init(up);
682
+
683
+	serial8250_em485_destroy(up);
684
+	return 0;
685
+}
686
+EXPORT_SYMBOL_GPL(serial8250_em485_config);
675687 
676688 /*
677689  * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
....@@ -715,19 +727,8 @@
715727 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
716728 {
717729 	unsigned char lcr = 0, efr = 0;
718
-	/*
719
-	 * Exar UARTs have a SLEEP register that enables or disables
720
-	 * each UART to enter sleep mode separately.  On the XR17V35x the
721
-	 * register is accessible to each UART at the UART_EXAR_SLEEP
722
-	 * offset but the UART channel may only write to the corresponding
723
-	 * bit.
724
-	 */
730
+
725731 	serial8250_rpm_get(p);
726
-	if ((p->port.type == PORT_XR17V35X) ||
727
-	   (p->port.type == PORT_XR17D15X)) {
728
-		serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
729
-		goto out;
730
-	}
731732 
732733 	if (p->capabilities & UART_CAP_SLEEP) {
733734 		if (p->capabilities & UART_CAP_EFR) {
....@@ -744,7 +745,7 @@
744745 			serial_out(p, UART_LCR, lcr);
745746 		}
746747 	}
747
-out:
748
+
748749 	serial8250_rpm_put(p);
749750 }
750751 
....@@ -1017,26 +1018,8 @@
10171018 	up->port.type = PORT_16550A;
10181019 	up->capabilities |= UART_CAP_FIFO;
10191020 
1020
-	/*
1021
-	 * XR17V35x UARTs have an extra divisor register, DLD
1022
-	 * that gets enabled with when DLAB is set which will
1023
-	 * cause the device to incorrectly match and assign
1024
-	 * port type to PORT_16650.  The EFR for this UART is
1025
-	 * found at offset 0x09. Instead check the Deice ID (DVID)
1026
-	 * register for a 2, 4 or 8 port UART.
1027
-	 */
1028
-	if (up->port.flags & UPF_EXAR_EFR) {
1029
-		status1 = serial_in(up, UART_EXAR_DVID);
1030
-		if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
1031
-			DEBUG_AUTOCONF("Exar XR17V35x ");
1032
-			up->port.type = PORT_XR17V35X;
1033
-			up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1034
-						UART_CAP_SLEEP;
1035
-
1036
-			return;
1037
-		}
1038
-
1039
-	}
1021
+	if (!IS_ENABLED(CONFIG_SERIAL_8250_16550A_VARIANTS))
1022
+		return;
10401023 
10411024 	/*
10421025 	 * Check for presence of the EFR when DLAB is set.
....@@ -1175,18 +1158,6 @@
11751158 		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
11761159 	}
11771160 	serial_out(up, UART_IER, iersave);
1178
-
1179
-	/*
1180
-	 * Exar uarts have EFR in a weird location
1181
-	 */
1182
-	if (up->port.flags & UPF_EXAR_EFR) {
1183
-		DEBUG_AUTOCONF("Exar XR17D15x ");
1184
-		up->port.type = PORT_XR17D15X;
1185
-		up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1186
-				    UART_CAP_SLEEP;
1187
-
1188
-		return;
1189
-	}
11901161 
11911162 	/*
11921163 	 * We distinguish between 16550A and U6 16550A by counting
....@@ -1370,8 +1341,8 @@
13701341 		fintek_8250_probe(up);
13711342 
13721343 	if (up->capabilities != old_capabilities) {
1373
-		pr_warn("%s: detected caps %08x should be %08x\n",
1374
-			port->name, old_capabilities, up->capabilities);
1344
+		dev_warn(port->dev, "detected caps %08x should be %08x\n",
1345
+			 old_capabilities, up->capabilities);
13751346 	}
13761347 out:
13771348 	DEBUG_AUTOCONF("iir=%d ", scratch);
....@@ -1446,9 +1417,21 @@
14461417 	serial8250_rpm_put(up);
14471418 }
14481419 
1449
-static void __do_stop_tx_rs485(struct uart_8250_port *p)
1420
+/**
1421
+ * serial8250_em485_stop_tx() - generic ->rs485_stop_tx() callback
1422
+ * @p: uart 8250 port
1423
+ *
1424
+ * Generic callback usable by 8250 uart drivers to stop rs485 transmission.
1425
+ */
1426
+void serial8250_em485_stop_tx(struct uart_8250_port *p)
14501427 {
1451
-	serial8250_em485_rts_after_send(p);
1428
+	unsigned char mcr = serial8250_in_MCR(p);
1429
+
1430
+	if (p->port.rs485.flags & SER_RS485_RTS_AFTER_SEND)
1431
+		mcr |= UART_MCR_RTS;
1432
+	else
1433
+		mcr &= ~UART_MCR_RTS;
1434
+	serial8250_out_MCR(p, mcr);
14521435 
14531436 	/*
14541437 	 * Empty the RX FIFO, we are not interested in anything
....@@ -1462,6 +1445,8 @@
14621445 		serial_port_out(&p->port, UART_IER, p->ier);
14631446 	}
14641447 }
1448
+EXPORT_SYMBOL_GPL(serial8250_em485_stop_tx);
1449
+
14651450 static enum hrtimer_restart serial8250_em485_handle_stop_tx(struct hrtimer *t)
14661451 {
14671452 	struct uart_8250_em485 *em485;
....@@ -1474,8 +1459,9 @@
14741459 	serial8250_rpm_get(p);
14751460 	spin_lock_irqsave(&p->port.lock, flags);
14761461 	if (em485->active_timer == &em485->stop_tx_timer) {
1477
-		__do_stop_tx_rs485(p);
1462
+		p->rs485_stop_tx(p);
14781463 		em485->active_timer = NULL;
1464
+		em485->tx_stopped = true;
14791465 	}
14801466 	spin_unlock_irqrestore(&p->port.lock, flags);
14811467 	serial8250_rpm_put(p);
....@@ -1496,7 +1482,7 @@
14961482 	struct uart_8250_em485 *em485 = p->em485;
14971483 
14981484 	/*
1499
-	 * __do_stop_tx_rs485 is going to set RTS according to config
1485
+	 * rs485_stop_tx() is going to set RTS according to config
15001486 	 * AND flush RX FIFO if required.
15011487 	 */
15021488 	if (p->port.rs485.delay_rts_after_send > 0) {
....@@ -1504,20 +1490,16 @@
15041490 		start_hrtimer_ms(&em485->stop_tx_timer,
15051491 				   p->port.rs485.delay_rts_after_send);
15061492 	} else {
1507
-		__do_stop_tx_rs485(p);
1493
+		p->rs485_stop_tx(p);
1494
+		em485->active_timer = NULL;
1495
+		em485->tx_stopped = true;
15081496 	}
15091497 }
15101498 
15111499 static inline void __do_stop_tx(struct uart_8250_port *p)
15121500 {
1513
-	if (p->ier & UART_IER_THRI) {
1514
-		p->ier &= ~UART_IER_THRI;
1515
-#ifdef CONFIG_ARCH_ROCKCHIP
1516
-		p->ier &= ~UART_IER_PTIME;
1517
-#endif
1518
-		serial_out(p, UART_IER, p->ier);
1501
+	if (serial8250_clear_THRI(p))
15191502 		serial8250_rpm_put_tx(p);
1520
-	}
15211503 }
15221504 
15231505 static inline void __stop_tx(struct uart_8250_port *p)
....@@ -1526,6 +1508,8 @@
15261508 
15271509 	if (em485) {
15281510 		unsigned char lsr = serial_in(p, UART_LSR);
1511
+		p->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1512
+
15291513 		/*
15301514 		 * To provide required timeing and allow FIFO transfer,
15311515 		 * __stop_tx_rs485() must be called only when both FIFO and
....@@ -1534,8 +1518,6 @@
15341518 		 */
15351519 		if ((lsr & BOTH_EMPTY) != BOTH_EMPTY)
15361520 			return;
1537
-
1538
-		em485->active_timer = NULL;
15391521 
15401522 		__stop_tx_rs485(p);
15411523 	}
....@@ -1571,13 +1553,7 @@
15711553 		return;
15721554 #endif
15731555 
1574
-	if (!(up->ier & UART_IER_THRI)) {
1575
-		up->ier |= UART_IER_THRI;
1576
-#ifdef CONFIG_ARCH_ROCKCHIP
1577
-		up->ier |= UART_IER_PTIME;
1578
-#endif
1579
-		serial_port_out(port, UART_IER, up->ier);
1580
-
1556
+	if (serial8250_set_THRI(up)) {
15811557 		if (up->bugs & UART_BUG_TXEN) {
15821558 			unsigned char lsr;
15831559 
....@@ -1597,25 +1573,54 @@
15971573 	}
15981574 }
15991575 
1600
-static inline void start_tx_rs485(struct uart_port *port)
1576
+/**
1577
+ * serial8250_em485_start_tx() - generic ->rs485_start_tx() callback
1578
+ * @up: uart 8250 port
1579
+ *
1580
+ * Generic callback usable by 8250 uart drivers to start rs485 transmission.
1581
+ * Assumes that setting the RTS bit in the MCR register means RTS is high.
1582
+ * (Some chips use inverse semantics.)  Further assumes that reception is
1583
+ * stoppable by disabling the UART_IER_RDI interrupt.  (Some chips set the
1584
+ * UART_LSR_DR bit even when UART_IER_RDI is disabled, foiling this approach.)
1585
+ */
1586
+void serial8250_em485_start_tx(struct uart_8250_port *up)
16011587 {
1602
-	struct uart_8250_port *up = up_to_u8250p(port);
1603
-	struct uart_8250_em485 *em485 = up->em485;
1604
-	unsigned char mcr;
1588
+	unsigned char mcr = serial8250_in_MCR(up);
16051589 
16061590 	if (!(up->port.rs485.flags & SER_RS485_RX_DURING_TX))
16071591 		serial8250_stop_rx(&up->port);
16081592 
1593
+	if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1594
+		mcr |= UART_MCR_RTS;
1595
+	else
1596
+		mcr &= ~UART_MCR_RTS;
1597
+	serial8250_out_MCR(up, mcr);
1598
+}
1599
+EXPORT_SYMBOL_GPL(serial8250_em485_start_tx);
1600
+
1601
+static inline void start_tx_rs485(struct uart_port *port)
1602
+{
1603
+	struct uart_8250_port *up = up_to_u8250p(port);
1604
+	struct uart_8250_em485 *em485 = up->em485;
1605
+
1606
+	/*
1607
+	 * While serial8250_em485_handle_stop_tx() is a noop if
1608
+	 * em485->active_timer != &em485->stop_tx_timer, it might happen that
1609
+	 * the timer is still armed and triggers only after the current bunch of
1610
+	 * chars is send and em485->active_timer == &em485->stop_tx_timer again.
1611
+	 * So cancel the timer. There is still a theoretical race condition if
1612
+	 * the timer is already running and only comes around to check for
1613
+	 * em485->active_timer when &em485->stop_tx_timer is armed again.
1614
+	 */
1615
+	if (em485->active_timer == &em485->stop_tx_timer)
1616
+		hrtimer_try_to_cancel(&em485->stop_tx_timer);
1617
+
16091618 	em485->active_timer = NULL;
16101619 
1611
-	mcr = serial8250_in_MCR(up);
1612
-	if (!!(up->port.rs485.flags & SER_RS485_RTS_ON_SEND) !=
1613
-	    !!(mcr & UART_MCR_RTS)) {
1614
-		if (up->port.rs485.flags & SER_RS485_RTS_ON_SEND)
1615
-			mcr |= UART_MCR_RTS;
1616
-		else
1617
-			mcr &= ~UART_MCR_RTS;
1618
-		serial8250_out_MCR(up, mcr);
1620
+	if (em485->tx_stopped) {
1621
+		em485->tx_stopped = false;
1622
+
1623
+		up->rs485_start_tx(up);
16191624 
16201625 		if (up->port.rs485.delay_rts_before_send > 0) {
16211626 			em485->active_timer = &em485->start_tx_timer;
....@@ -1681,6 +1686,8 @@
16811686 	if (up->bugs & UART_BUG_NOMSR)
16821687 		return;
16831688 
1689
+	mctrl_gpio_disable_ms(up->gpios);
1690
+
16841691 	up->ier &= ~UART_IER_MSI;
16851692 	serial_port_out(port, UART_IER, up->ier);
16861693 }
....@@ -1692,6 +1699,8 @@
16921699 	/* no MSR capabilities */
16931700 	if (up->bugs & UART_BUG_NOMSR)
16941701 		return;
1702
+
1703
+	mctrl_gpio_enable_ms(up->gpios);
16951704 
16961705 	up->ier |= UART_IER_MSI;
16971706 
....@@ -1748,14 +1757,14 @@
17481757 		lsr &= port->read_status_mask;
17491758 
17501759 		if (lsr & UART_LSR_BI) {
1751
-			pr_debug("%s: handling break\n", __func__);
1760
+			dev_dbg(port->dev, "handling break\n");
17521761 			flag = TTY_BREAK;
17531762 		} else if (lsr & UART_LSR_PE)
17541763 			flag = TTY_PARITY;
17551764 		else if (lsr & UART_LSR_FE)
17561765 			flag = TTY_FRAME;
17571766 	}
1758
-	if (uart_handle_sysrq_char(port, ch))
1767
+	if (uart_prepare_sysrq_char(port, ch))
17591768 		return;
17601769 
17611770 	uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
....@@ -1791,9 +1800,7 @@
17911800 	int count;
17921801 
17931802 	if (port->x_char) {
1794
-		serial_out(up, UART_TX, port->x_char);
1795
-		port->icount.tx++;
1796
-		port->x_char = 0;
1803
+		uart_xchar_out(port, UART_TX);
17971804 		return;
17981805 	}
17991806 	if (uart_tx_stopped(port)) {
....@@ -1808,6 +1815,18 @@
18081815 	count = up->tx_loadsz;
18091816 	do {
18101817 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1818
+		if (up->bugs & UART_BUG_TXRACE) {
1819
+			/*
1820
+			 * The Aspeed BMC virtual UARTs have a bug where data
1821
+			 * may get stuck in the BMC's Tx FIFO from bursts of
1822
+			 * writes on the APB interface.
1823
+			 *
1824
+			 * Delay back-to-back writes by a read cycle to avoid
1825
+			 * stalling the VUART. Read a register that won't have
1826
+			 * side-effects and discard the result.
1827
+			 */
1828
+			serial_in(up, UART_SCR);
1829
+		}
18111830 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
18121831 		port->icount.tx++;
18131832 		if (uart_circ_empty(xmit))
....@@ -1869,10 +1888,13 @@
18691888 		return up->dma->rx_dma(up);
18701889 #else
18711890 	switch (iir & 0x3f) {
1891
+	case UART_IIR_RDI:
1892
+		if (!up->dma->rx_running)
1893
+			break;
1894
+		fallthrough;
1895
+	case UART_IIR_RLSI:
18721896 	case UART_IIR_RX_TIMEOUT:
18731897 		serial8250_rx_dma_flush(up);
1874
-		/* fall-through */
1875
-	case UART_IIR_RLSI:
18761898 		return true;
18771899 	}
18781900 	return up->dma->rx_dma(up);
....@@ -1887,7 +1909,10 @@
18871909 	unsigned char status;
18881910 	unsigned long flags;
18891911 	struct uart_8250_port *up = up_to_u8250p(port);
1912
+#ifndef CONFIG_ARCH_ROCKCHIP
1913
+	struct tty_port *tport = &port->state->port;
18901914 	bool skip_rx = false;
1915
+#endif
18911916 
18921917 	if (iir & UART_IIR_NO_INT)
18931918 		return 0;
....@@ -1896,6 +1921,17 @@
18961921 
18971922 	status = serial_port_in(port, UART_LSR);
18981923 
1924
+#ifdef CONFIG_ARCH_ROCKCHIP
1925
+	if (status & (UART_LSR_DR | UART_LSR_BI)) {
1926
+		int dma_err = -1;
1927
+
1928
+		if (up->dma && up->dma->rxchan)
1929
+			dma_err = handle_rx_dma(up, iir);
1930
+
1931
+		if (!up->dma || dma_err)
1932
+			status = serial8250_rx_chars(up, status);
1933
+	}
1934
+#else
18991935 	/*
19001936 	 * If port is stopped and there are no error conditions in the
19011937 	 * FIFO, then don't drain the FIFO, as this may lead to TTY buffer
....@@ -1910,27 +1946,23 @@
19101946 		skip_rx = true;
19111947 
19121948 	if (status & (UART_LSR_DR | UART_LSR_BI) && !skip_rx) {
1913
-#ifdef CONFIG_ARCH_ROCKCHIP
1914
-		int dma_err = -1;
1949
+		struct irq_data *d;
19151950 
1916
-		if (up->dma && up->dma->rxchan)
1917
-			dma_err = handle_rx_dma(up, iir);
1918
-
1919
-		if (!up->dma || dma_err)
1920
-			status = serial8250_rx_chars(up, status);
1921
-#else
1951
+		d = irq_get_irq_data(port->irq);
1952
+		if (d && irqd_is_wakeup_set(d))
1953
+			pm_wakeup_event(tport->tty->dev, 0);
19221954 		if (!up->dma || handle_rx_dma(up, iir))
19231955 			status = serial8250_rx_chars(up, status);
1924
-#endif
19251956 	}
1957
+#endif
19261958 	serial8250_modem_status(up);
19271959 #ifdef CONFIG_ARCH_ROCKCHIP
19281960 	if ((!up->dma || (up->dma && (!up->dma->txchan || up->dma->tx_err))) &&
19291961 	    ((iir & 0xf) == UART_IIR_THRI))
19301962 		serial8250_tx_chars(up);
19311963 #else
1932
-	if ((!up->dma || up->dma->tx_err) && (status & UART_LSR_THRE) &&
1933
-		(up->ier & UART_IER_THRI))
1964
+	if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1965
+	    (status & UART_LSR_THRE))
19341966 		serial8250_tx_chars(up);
19351967 #endif
19361968 
....@@ -1950,7 +1982,7 @@
19501982 			port->name);
19511983 	}
19521984 #endif
1953
-	spin_unlock_irqrestore(&port->lock, flags);
1985
+	uart_unlock_and_check_sysrq(port, flags);
19541986 	return 1;
19551987 }
19561988 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
....@@ -1997,41 +2029,42 @@
19972029 static unsigned int serial8250_tx_empty(struct uart_port *port)
19982030 {
19992031 	struct uart_8250_port *up = up_to_u8250p(port);
2032
+	unsigned int result = 0;
20002033 	unsigned long flags;
20012034 	unsigned int lsr;
20022035 
20032036 	serial8250_rpm_get(up);
20042037 
20052038 	spin_lock_irqsave(&port->lock, flags);
2006
-	lsr = serial_port_in(port, UART_LSR);
2007
-	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
2039
+	if (!serial8250_tx_dma_running(up)) {
2040
+		lsr = serial_port_in(port, UART_LSR);
2041
+		up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
2042
+
2043
+		if ((lsr & BOTH_EMPTY) == BOTH_EMPTY)
2044
+			result = TIOCSER_TEMT;
2045
+	}
20082046 	spin_unlock_irqrestore(&port->lock, flags);
20092047 
20102048 	serial8250_rpm_put(up);
20112049 
2012
-	return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
2050
+	return result;
20132051 }
20142052 
20152053 unsigned int serial8250_do_get_mctrl(struct uart_port *port)
20162054 {
20172055 	struct uart_8250_port *up = up_to_u8250p(port);
20182056 	unsigned int status;
2019
-	unsigned int ret;
2057
+	unsigned int val;
20202058 
20212059 	serial8250_rpm_get(up);
20222060 	status = serial8250_modem_status(up);
20232061 	serial8250_rpm_put(up);
20242062 
2025
-	ret = 0;
2026
-	if (status & UART_MSR_DCD)
2027
-		ret |= TIOCM_CAR;
2028
-	if (status & UART_MSR_RI)
2029
-		ret |= TIOCM_RNG;
2030
-	if (status & UART_MSR_DSR)
2031
-		ret |= TIOCM_DSR;
2032
-	if (status & UART_MSR_CTS)
2033
-		ret |= TIOCM_CTS;
2034
-	return ret;
2063
+	val = serial8250_MSR_to_TIOCM(status);
2064
+	if (up->gpios)
2065
+		return mctrl_gpio_get(up->gpios, &val);
2066
+
2067
+	return val;
20352068 }
20362069 EXPORT_SYMBOL_GPL(serial8250_do_get_mctrl);
20372070 
....@@ -2045,18 +2078,9 @@
20452078 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
20462079 {
20472080 	struct uart_8250_port *up = up_to_u8250p(port);
2048
-	unsigned char mcr = 0;
2081
+	unsigned char mcr;
20492082 
2050
-	if (mctrl & TIOCM_RTS)
2051
-		mcr |= UART_MCR_RTS;
2052
-	if (mctrl & TIOCM_DTR)
2053
-		mcr |= UART_MCR_DTR;
2054
-	if (mctrl & TIOCM_OUT1)
2055
-		mcr |= UART_MCR_OUT1;
2056
-	if (mctrl & TIOCM_OUT2)
2057
-		mcr |= UART_MCR_OUT2;
2058
-	if (mctrl & TIOCM_LOOP)
2059
-		mcr |= UART_MCR_LOOP;
2083
+	mcr = serial8250_TIOCM_to_MCR(mctrl);
20602084 
20612085 	mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
20622086 
....@@ -2066,6 +2090,9 @@
20662090 
20672091 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
20682092 {
2093
+	if (port->rs485.flags & SER_RS485_ENABLED)
2094
+		return;
2095
+
20692096 	if (port->set_mctrl)
20702097 		port->set_mctrl(port, mctrl);
20712098 	else
....@@ -2245,20 +2272,6 @@
22452272 	enable_rsa(up);
22462273 #endif
22472274 
2248
-	if (port->type == PORT_XR17V35X) {
2249
-		/*
2250
-		 * First enable access to IER [7:5], ISR [5:4], FCR [5:4],
2251
-		 * MCR [7:5] and MSR [7:0]
2252
-		 */
2253
-		serial_port_out(port, UART_XR_EFR, UART_EFR_ECB);
2254
-
2255
-		/*
2256
-		 * Make sure all interrups are masked until initialization is
2257
-		 * complete and the FIFOs are cleared
2258
-		 */
2259
-		serial_port_out(port, UART_IER, 0);
2260
-	}
2261
-
22622275 	/*
22632276 	 * Clear the FIFO buffers and disable them.
22642277 	 * (they will be reenabled in set_termios())
....@@ -2272,8 +2285,6 @@
22722285 	serial_port_in(port, UART_RX);
22732286 	serial_port_in(port, UART_IIR);
22742287 	serial_port_in(port, UART_MSR);
2275
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2276
-		serial_port_in(port, UART_EXAR_INT0);
22772288 
22782289 	/*
22792290 	 * At this point, there's no way the LSR could still be 0xff;
....@@ -2282,7 +2293,7 @@
22822293 	 */
22832294 	if (!(port->flags & UPF_BUGGY_UART) &&
22842295 	    (serial_port_in(port, UART_LSR) == 0xff)) {
2285
-		pr_info_ratelimited("%s: LSR safety check engaged!\n", port->name);
2296
+		dev_info_ratelimited(port->dev, "LSR safety check engaged!\n");
22862297 		retval = -ENODEV;
22872298 		goto out;
22882299 	}
....@@ -2314,8 +2325,7 @@
23142325 	     (port->type == PORT_ALTR_16550_F128)) && (port->fifosize > 1)) {
23152326 		/* Bounds checking of TX threshold (valid 0 to fifosize-2) */
23162327 		if ((up->tx_loadsz < 2) || (up->tx_loadsz > port->fifosize)) {
2317
-			pr_err("%s TX FIFO Threshold errors, skipping\n",
2318
-			       port->name);
2328
+			dev_err(port->dev, "TX FIFO Threshold errors, skipping\n");
23192329 		} else {
23202330 			serial_port_out(port, UART_ALTR_AFR,
23212331 					UART_ALTR_EN_TXFIFO_LW);
....@@ -2419,8 +2429,7 @@
24192429 	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
24202430 		if (!(up->bugs & UART_BUG_TXEN)) {
24212431 			up->bugs |= UART_BUG_TXEN;
2422
-			pr_debug("%s - enabling bad tx status workarounds\n",
2423
-				 port->name);
2432
+			dev_dbg(port->dev, "enabling bad tx status workarounds\n");
24242433 		}
24252434 	} else {
24262435 		up->bugs &= ~UART_BUG_TXEN;
....@@ -2438,8 +2447,6 @@
24382447 	serial_port_in(port, UART_RX);
24392448 	serial_port_in(port, UART_IIR);
24402449 	serial_port_in(port, UART_MSR);
2441
-	if ((port->type == PORT_XR17V35X) || (port->type == PORT_XR17D15X))
2442
-		serial_port_in(port, UART_EXAR_INT0);
24432450 	up->lsr_saved_flags = 0;
24442451 	up->msr_saved_flags = 0;
24452452 
....@@ -2447,15 +2454,18 @@
24472454 	 * Request DMA channels for both RX and TX.
24482455 	 */
24492456 	if (up->dma) {
2450
-		retval = serial8250_request_dma(up);
2451
-		if (retval) {
2457
+		const char *msg = NULL;
2458
+
2459
+		if (uart_console(port))
2460
+			msg = "forbid DMA for kernel console";
2461
+		else if (serial8250_request_dma(up))
24522462 #ifdef CONFIG_ARCH_ROCKCHIP
2453
-			pr_warn_ratelimited("%s - failed to request DMA, use interrupt mode\n",
2454
-					    port->name);
2463
+			msg = "failed to request DMA, use interrupt mode";
24552464 #else
2456
-			pr_warn_ratelimited("%s - failed to request DMA\n",
2457
-					    port->name);
2465
+			msg = "failed to request DMA";
24582466 #endif
2467
+		if (msg) {
2468
+			dev_warn_ratelimited(port->dev, "%s\n", msg);
24592469 			up->dma = NULL;
24602470 		}
24612471 	}
....@@ -2553,23 +2563,6 @@
25532563 		serial8250_do_shutdown(port);
25542564 }
25552565 
2556
-/*
2557
- * XR17V35x UARTs have an extra fractional divisor register (DLD)
2558
- * Calculate divisor with extra 4-bit fractional portion
2559
- */
2560
-static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2561
-					 unsigned int baud,
2562
-					 unsigned int *frac)
2563
-{
2564
-	struct uart_port *port = &up->port;
2565
-	unsigned int quot_16;
2566
-
2567
-	quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2568
-	*frac = quot_16 & 0x0f;
2569
-
2570
-	return quot_16 >> 4;
2571
-}
2572
-
25732566 /* Nuvoton NPCM UARTs have a custom divisor calculation */
25742567 static unsigned int npcm_get_divisor(struct uart_8250_port *up,
25752568 		unsigned int baud)
....@@ -2597,8 +2590,6 @@
25972590 	else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
25982591 		 baud == (port->uartclk/8))
25992592 		quot = 0x8002;
2600
-	else if (up->port.type == PORT_XR17V35X)
2601
-		quot = xr17v35x_get_divisor(up, baud, frac);
26022593 	else if (up->port.type == PORT_NPCM)
26032594 		quot = npcm_get_divisor(up, baud);
26042595 	else
....@@ -2700,13 +2691,6 @@
27002691 #ifdef CONFIG_ARCH_ROCKCHIP
27012692 	serial_port_out(port, UART_MCR, up->mcr);
27022693 #endif
2703
-
2704
-	/* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2705
-	if (up->port.type == PORT_XR17V35X) {
2706
-		/* Preserve bits not related to baudrate; DLD[7:4]. */
2707
-		quot_frac |= serial_port_in(port, 0x2) & 0xf0;
2708
-		serial_port_out(port, 0x2, quot_frac);
2709
-	}
27102694 }
27112695 EXPORT_SYMBOL_GPL(serial8250_do_set_divisor);
27122696 
....@@ -2748,6 +2732,62 @@
27482732 	 */
27492733 	return uart_get_baud_rate(port, termios, old, min, max);
27502734 }
2735
+
2736
+/*
2737
+ * Note in order to avoid the tty port mutex deadlock don't use the next method
2738
+ * within the uart port callbacks. Primarily it's supposed to be utilized to
2739
+ * handle a sudden reference clock rate change.
2740
+ */
2741
+void serial8250_update_uartclk(struct uart_port *port, unsigned int uartclk)
2742
+{
2743
+	struct uart_8250_port *up = up_to_u8250p(port);
2744
+	struct tty_port *tport = &port->state->port;
2745
+	unsigned int baud, quot, frac = 0;
2746
+	struct ktermios *termios;
2747
+	struct tty_struct *tty;
2748
+	unsigned long flags;
2749
+
2750
+	tty = tty_port_tty_get(tport);
2751
+	if (!tty) {
2752
+		mutex_lock(&tport->mutex);
2753
+		port->uartclk = uartclk;
2754
+		mutex_unlock(&tport->mutex);
2755
+		return;
2756
+	}
2757
+
2758
+	down_write(&tty->termios_rwsem);
2759
+	mutex_lock(&tport->mutex);
2760
+
2761
+	if (port->uartclk == uartclk)
2762
+		goto out_lock;
2763
+
2764
+	port->uartclk = uartclk;
2765
+
2766
+	if (!tty_port_initialized(tport))
2767
+		goto out_lock;
2768
+
2769
+	termios = &tty->termios;
2770
+
2771
+	baud = serial8250_get_baud_rate(port, termios, NULL);
2772
+	quot = serial8250_get_divisor(port, baud, &frac);
2773
+
2774
+	serial8250_rpm_get(up);
2775
+	spin_lock_irqsave(&port->lock, flags);
2776
+
2777
+	uart_update_timeout(port, termios->c_cflag, baud);
2778
+
2779
+	serial8250_set_divisor(port, baud, quot, frac);
2780
+	serial_port_out(port, UART_LCR, up->lcr);
2781
+
2782
+	spin_unlock_irqrestore(&port->lock, flags);
2783
+	serial8250_rpm_put(up);
2784
+
2785
+out_lock:
2786
+	mutex_unlock(&tport->mutex);
2787
+	up_write(&tty->termios_rwsem);
2788
+	tty_kref_put(tty);
2789
+}
2790
+EXPORT_SYMBOL_GPL(serial8250_update_uartclk);
27512791 
27522792 void
27532793 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
....@@ -2864,7 +2904,7 @@
28642904 	}
28652905 
28662906 #ifdef CONFIG_ARCH_ROCKCHIP
2867
-	/* Reset uart to make sure it is idle, then set buad rate */
2907
+	/* Reset uart to make sure it is idle, then set baud rate */
28682908 	serial_port_out(port, 0x88 >> 2, 0x7);
28692909 #endif
28702910 
....@@ -3002,8 +3042,10 @@
30023042 	case UPIO_MEM32BE:
30033043 	case UPIO_MEM16:
30043044 	case UPIO_MEM:
3005
-		if (!port->mapbase)
3045
+		if (!port->mapbase) {
3046
+			ret = -EINVAL;
30063047 			break;
3048
+		}
30073049 
30083050 		if (!request_mem_region(port->mapbase, size, "serial")) {
30093051 			ret = -EBUSY;
....@@ -3011,7 +3053,7 @@
30113053 		}
30123054 
30133055 		if (port->flags & UPF_IOREMAP) {
3014
-			port->membase = ioremap_nocache(port->mapbase, size);
3056
+			port->membase = ioremap(port->mapbase, size);
30153057 			if (!port->membase) {
30163058 				release_mem_region(port->mapbase, size);
30173059 				ret = -ENOMEM;
....@@ -3122,7 +3164,7 @@
31223164 	return rxtrig_bytes;
31233165 }
31243166 
3125
-static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
3167
+static ssize_t rx_trig_bytes_show(struct device *dev,
31263168 	struct device_attribute *attr, char *buf)
31273169 {
31283170 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3168,7 +3210,7 @@
31683210 	return ret;
31693211 }
31703212 
3171
-static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
3213
+static ssize_t rx_trig_bytes_store(struct device *dev,
31723214 	struct device_attribute *attr, const char *buf, size_t count)
31733215 {
31743216 	struct tty_port *port = dev_get_drvdata(dev);
....@@ -3189,18 +3231,16 @@
31893231 	return count;
31903232 }
31913233 
3192
-static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
3193
-		   serial8250_get_attr_rx_trig_bytes,
3194
-		   serial8250_set_attr_rx_trig_bytes);
3234
+static DEVICE_ATTR_RW(rx_trig_bytes);
31953235 
31963236 static struct attribute *serial8250_dev_attrs[] = {
31973237 	&dev_attr_rx_trig_bytes.attr,
3198
-	NULL,
3199
-	};
3238
+	NULL
3239
+};
32003240 
32013241 static struct attribute_group serial8250_dev_attr_group = {
32023242 	.attrs = serial8250_dev_attrs,
3203
-	};
3243
+};
32043244 
32053245 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
32063246 {
....@@ -3299,7 +3339,9 @@
32993339 	struct uart_port *port = &up->port;
33003340 
33013341 	spin_lock_init(&port->lock);
3342
+	port->pm = NULL;
33023343 	port->ops = &serial8250_pops;
3344
+	port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_8250_CONSOLE);
33033345 
33043346 	up->cur_iotype = 0xFF;
33053347 }
....@@ -3360,7 +3402,7 @@
33603402 
33613403 	serial8250_set_divisor(port, baud, quot, frac);
33623404 	serial_port_out(port, UART_LCR, up->lcr);
3363
-	serial8250_out_MCR(up, UART_MCR_DTR | UART_MCR_RTS);
3405
+	serial8250_out_MCR(up, up->mcr | UART_MCR_DTR | UART_MCR_RTS);
33643406 }
33653407 
33663408 /*
....@@ -3368,10 +3410,14 @@
33683410  *	any possible real use of the port...
33693411  *
33703412  *	The console_lock must be held when we get here.
3413
+ *
3414
+ *	Doing runtime PM is really a bad idea for the kernel console.
3415
+ *	Thus, we assume the function is called when device is powered up.
33713416  */
33723417 void serial8250_console_write(struct uart_8250_port *up, const char *s,
33733418 			      unsigned int count)
33743419 {
3420
+	struct uart_8250_em485 *em485 = up->em485;
33753421 	struct uart_port *port = &up->port;
33763422 	unsigned long flags;
33773423 	unsigned int ier;
....@@ -3379,11 +3425,7 @@
33793425 
33803426 	touch_nmi_watchdog();
33813427 
3382
-	serial8250_rpm_get(up);
3383
-
3384
-	if (port->sysrq || oops_in_progress)
3385
-		locked = 0;
3386
-	else if (in_kdb_printk())
3428
+	if (oops_in_progress)
33873429 		locked = spin_trylock_irqsave(&port->lock, flags);
33883430 	else
33893431 		spin_lock_irqsave(&port->lock, flags);
....@@ -3404,6 +3446,12 @@
34043446 		up->canary = 0;
34053447 	}
34063448 
3449
+	if (em485) {
3450
+		if (em485->tx_stopped)
3451
+			up->rs485_start_tx(up);
3452
+		mdelay(port->rs485.delay_rts_before_send);
3453
+	}
3454
+
34073455 	uart_console_write(port, s, count, serial8250_console_putchar);
34083456 
34093457 	/*
....@@ -3411,6 +3459,13 @@
34113459 	 *	and restore the IER
34123460 	 */
34133461 	wait_for_xmitr(up, BOTH_EMPTY);
3462
+
3463
+	if (em485) {
3464
+		mdelay(port->rs485.delay_rts_after_send);
3465
+		if (em485->tx_stopped)
3466
+			up->rs485_stop_tx(up);
3467
+	}
3468
+
34143469 	serial_port_out(port, UART_IER, ier);
34153470 
34163471 	/*
....@@ -3425,7 +3480,6 @@
34253480 
34263481 	if (locked)
34273482 		spin_unlock_irqrestore(&port->lock, flags);
3428
-	serial8250_rpm_put(up);
34293483 }
34303484 
34313485 static unsigned int probe_baud(struct uart_port *port)
....@@ -3449,6 +3503,7 @@
34493503 	int bits = 8;
34503504 	int parity = 'n';
34513505 	int flow = 'n';
3506
+	int ret;
34523507 
34533508 	if (!port->iobase && !port->membase)
34543509 		return -ENODEV;
....@@ -3458,7 +3513,22 @@
34583513 	else if (probe)
34593514 		baud = probe_baud(port);
34603515 
3461
-	return uart_set_options(port, port->cons, baud, parity, bits, flow);
3516
+	ret = uart_set_options(port, port->cons, baud, parity, bits, flow);
3517
+	if (ret)
3518
+		return ret;
3519
+
3520
+	if (port->dev)
3521
+		pm_runtime_get_sync(port->dev);
3522
+
3523
+	return 0;
3524
+}
3525
+
3526
+int serial8250_console_exit(struct uart_port *port)
3527
+{
3528
+	if (port->dev)
3529
+		pm_runtime_put_sync(port->dev);
3530
+
3531
+	return 0;
34623532 }
34633533 
34643534 #endif /* CONFIG_SERIAL_8250_CONSOLE */