forked from ~ljy/RK356X_SDK_RELEASE

hc
2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777
kernel/drivers/staging/clocking-wizard/clk-xlnx-clock-wizard.c
....@@ -135,7 +135,6 @@
135135 unsigned long rate;
136136 const char *clk_name;
137137 struct clk_wzrd *clk_wzrd;
138
- struct resource *mem;
139138 struct device_node *np = pdev->dev.of_node;
140139
141140 clk_wzrd = devm_kzalloc(&pdev->dev, sizeof(*clk_wzrd), GFP_KERNEL);
....@@ -143,8 +142,7 @@
143142 return -ENOMEM;
144143 platform_set_drvdata(pdev, clk_wzrd);
145144
146
- mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
147
- clk_wzrd->base = devm_ioremap_resource(&pdev->dev, mem);
145
+ clk_wzrd->base = devm_platform_ioremap_resource(pdev, 0);
148146 if (IS_ERR(clk_wzrd->base))
149147 return PTR_ERR(clk_wzrd->base);
150148
....@@ -199,10 +197,10 @@
199197 ret = -ENOMEM;
200198 goto err_disable_clk;
201199 }
202
- clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor(
203
- &pdev->dev, clk_name,
204
- __clk_get_name(clk_wzrd->clk_in1),
205
- 0, reg, 1);
200
+ clk_wzrd->clks_internal[wzrd_clk_mul] = clk_register_fixed_factor
201
+ (&pdev->dev, clk_name,
202
+ __clk_get_name(clk_wzrd->clk_in1),
203
+ 0, reg, 1);
206204 kfree(clk_name);
207205 if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul])) {
208206 dev_err(&pdev->dev, "unable to register fixed-factor clock\n");
....@@ -219,10 +217,10 @@
219217 goto err_rm_int_clk;
220218 }
221219
222
- clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor(
223
- &pdev->dev, clk_name,
224
- __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]),
225
- 0, 1, reg);
220
+ clk_wzrd->clks_internal[wzrd_clk_mul_div] = clk_register_fixed_factor
221
+ (&pdev->dev, clk_name,
222
+ __clk_get_name(clk_wzrd->clks_internal[wzrd_clk_mul]),
223
+ 0, 1, reg);
226224 if (IS_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div])) {
227225 dev_err(&pdev->dev, "unable to register divider clock\n");
228226 ret = PTR_ERR(clk_wzrd->clks_internal[wzrd_clk_mul_div]);
....@@ -243,8 +241,8 @@
243241 reg = readl(clk_wzrd->base + WZRD_CLK_CFG_REG(2) + i * 12);
244242 reg &= WZRD_CLKOUT_DIVIDE_MASK;
245243 reg >>= WZRD_CLKOUT_DIVIDE_SHIFT;
246
- clk_wzrd->clkout[i] = clk_register_fixed_factor(&pdev->dev,
247
- clkout_name, clk_name, 0, 1, reg);
244
+ clk_wzrd->clkout[i] = clk_register_fixed_factor
245
+ (&pdev->dev, clkout_name, clk_name, 0, 1, reg);
248246 if (IS_ERR(clk_wzrd->clkout[i])) {
249247 int j;
250248