change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/drivers/gpu/drm/radeon/r100.c
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@@ -25,24 +25,30 @@
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  *          Alex Deucher
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  *          Jerome Glisse
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  */
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-#include <linux/seq_file.h>
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-#include <linux/slab.h>
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-#include <drm/drmP.h>
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-#include <drm/radeon_drm.h>
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-#include "radeon_reg.h"
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-#include "radeon.h"
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-#include "radeon_asic.h"
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-#include "r100d.h"
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-#include "rs100d.h"
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-#include "rv200d.h"
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-#include "rv250d.h"
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-#include "atom.h"
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 #include <linux/firmware.h>
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 #include <linux/module.h>
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+#include <linux/pci.h>
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+#include <linux/seq_file.h>
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+#include <linux/slab.h>
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+#include <drm/drm_debugfs.h>
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+#include <drm/drm_device.h>
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+#include <drm/drm_file.h>
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+#include <drm/drm_fourcc.h>
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+#include <drm/drm_vblank.h>
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+#include <drm/radeon_drm.h>
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+
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+#include "atom.h"
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 #include "r100_reg_safe.h"
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+#include "r100d.h"
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+#include "radeon.h"
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+#include "radeon_asic.h"
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+#include "radeon_reg.h"
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 #include "rn50_reg_safe.h"
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+#include "rs100d.h"
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+#include "rv200d.h"
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+#include "rv250d.h"
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 /* Firmware Names */
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 #define FIRMWARE_R100		"radeon/R100_cp.bin"
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@@ -885,7 +891,7 @@
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 				    uint64_t src_offset,
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 				    uint64_t dst_offset,
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 				    unsigned num_gpu_pages,
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-				    struct reservation_object *resv)
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+				    struct dma_resv *resv)
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 {
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 	struct radeon_ring *ring = &rdev->ring[RADEON_RING_TYPE_GFX_INDEX];
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 	struct radeon_fence *fence;
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@@ -1817,9 +1823,9 @@
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 	case RADEON_PP_TXFORMAT_2:
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 		i = (reg - RADEON_PP_TXFORMAT_0) / 24;
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 		if (idx_value & RADEON_TXFORMAT_NON_POWER2) {
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-			track->textures[i].use_pitch = 1;
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+			track->textures[i].use_pitch = true;
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 		} else {
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-			track->textures[i].use_pitch = 0;
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+			track->textures[i].use_pitch = false;
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 			track->textures[i].width = 1 << ((idx_value & RADEON_TXFORMAT_WIDTH_MASK) >> RADEON_TXFORMAT_WIDTH_SHIFT);
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 			track->textures[i].height = 1 << ((idx_value & RADEON_TXFORMAT_HEIGHT_MASK) >> RADEON_TXFORMAT_HEIGHT_SHIFT);
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 		}
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@@ -2381,12 +2387,12 @@
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 		else
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 			track->num_texture = 6;
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 		track->maxy = 2048;
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-		track->separate_cube = 1;
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+		track->separate_cube = true;
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 	} else {
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 		track->num_cb = 4;
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 		track->num_texture = 16;
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 		track->maxy = 4096;
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-		track->separate_cube = 0;
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+		track->separate_cube = false;
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 		track->aaresolve = false;
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 		track->aa.robj = NULL;
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 	}
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@@ -2470,7 +2476,7 @@
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 		if (tmp >= n) {
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 			return 0;
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 		}
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-		DRM_UDELAY(1);
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+		udelay(1);
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 	}
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 	return -1;
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 }
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@@ -2488,7 +2494,7 @@
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 		if (!(tmp & RADEON_RBBM_ACTIVE)) {
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 			return 0;
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 		}
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-		DRM_UDELAY(1);
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+		udelay(1);
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 	}
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 	return -1;
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 }
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@@ -2504,7 +2510,7 @@
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 		if (tmp & RADEON_MC_IDLE) {
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 			return 0;
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 		}
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-		DRM_UDELAY(1);
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+		udelay(1);
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 	}
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 	return -1;
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 }
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@@ -2809,7 +2815,7 @@
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 	uint32_t temp;
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 	temp = RREG32(RADEON_CONFIG_CNTL);
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-	if (state == false) {
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+	if (!state) {
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 		temp &= ~RADEON_CFG_VGA_RAM_EN;
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 		temp |= RADEON_CFG_VGA_IO_DIS;
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 	} else {
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@@ -3669,7 +3675,7 @@
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 		if (tmp == 0xDEADBEEF) {
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 			break;
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 		}
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-		DRM_UDELAY(1);
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+		udelay(1);
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 	}
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 	if (i < rdev->usec_timeout) {
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 		DRM_INFO("ring test succeeded in %d usecs\n", i);
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@@ -3746,7 +3752,7 @@
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 		if (tmp == 0xDEADBEEF) {
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 			break;
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 		}
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-		DRM_UDELAY(1);
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+		udelay(1);
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 	}
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 	if (i < rdev->usec_timeout) {
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 		DRM_INFO("ib test succeeded in %u usecs\n", i);