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| 1 | +// SPDX-License-Identifier: GPL-2.0-only |
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| 1 | 2 | /* |
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| 2 | 3 | * Copyright (c) 2016, The Linux Foundation. All rights reserved. |
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| 3 | | - * |
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| 4 | | - * This program is free software; you can redistribute it and/or modify |
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| 5 | | - * it under the terms of the GNU General Public License version 2 and |
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| 6 | | - * only version 2 as published by the Free Software Foundation. |
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| 7 | | - * |
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| 8 | | - * This program is distributed in the hope that it will be useful, |
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| 9 | | - * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 10 | | - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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| 11 | | - * GNU General Public License for more details. |
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| 12 | 4 | */ |
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| 13 | 5 | |
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| 14 | 6 | #include <linux/of_device.h> |
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| .. | .. |
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| 37 | 29 | reg = devm_regulator_get(dev, cfg->reg_names[i]); |
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| 38 | 30 | if (IS_ERR(reg)) { |
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| 39 | 31 | ret = PTR_ERR(reg); |
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| 40 | | - dev_err(dev, "failed to get phy regulator: %s (%d)\n", |
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| 41 | | - cfg->reg_names[i], ret); |
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| 32 | + if (ret != -EPROBE_DEFER) { |
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| 33 | + DRM_DEV_ERROR(dev, |
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| 34 | + "failed to get phy regulator: %s (%d)\n", |
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| 35 | + cfg->reg_names[i], ret); |
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| 36 | + } |
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| 37 | + |
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| 42 | 38 | return ret; |
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| 43 | 39 | } |
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| 44 | 40 | |
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| .. | .. |
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| 51 | 47 | clk = msm_clk_get(phy->pdev, cfg->clk_names[i]); |
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| 52 | 48 | if (IS_ERR(clk)) { |
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| 53 | 49 | ret = PTR_ERR(clk); |
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| 54 | | - dev_err(dev, "failed to get phy clock: %s (%d)\n", |
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| 50 | + DRM_DEV_ERROR(dev, "failed to get phy clock: %s (%d)\n", |
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| 55 | 51 | cfg->clk_names[i], ret); |
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| 56 | 52 | return ret; |
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| 57 | 53 | } |
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| .. | .. |
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| 73 | 69 | for (i = 0; i < cfg->num_regs; i++) { |
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| 74 | 70 | ret = regulator_enable(phy->regs[i]); |
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| 75 | 71 | if (ret) |
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| 76 | | - dev_err(dev, "failed to enable regulator: %s (%d)\n", |
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| 72 | + DRM_DEV_ERROR(dev, "failed to enable regulator: %s (%d)\n", |
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| 77 | 73 | cfg->reg_names[i], ret); |
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| 78 | 74 | } |
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| 79 | 75 | |
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| 80 | 76 | for (i = 0; i < cfg->num_clks; i++) { |
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| 81 | 77 | ret = clk_prepare_enable(phy->clks[i]); |
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| 82 | 78 | if (ret) |
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| 83 | | - dev_err(dev, "failed to enable clock: %s (%d)\n", |
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| 79 | + DRM_DEV_ERROR(dev, "failed to enable clock: %s (%d)\n", |
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| 84 | 80 | cfg->clk_names[i], ret); |
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| 85 | 81 | } |
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| 86 | 82 | |
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| .. | .. |
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| 159 | 155 | |
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| 160 | 156 | phy->mmio = msm_ioremap(pdev, "hdmi_phy", "HDMI_PHY"); |
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| 161 | 157 | if (IS_ERR(phy->mmio)) { |
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| 162 | | - dev_err(dev, "%s: failed to map phy base\n", __func__); |
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| 158 | + DRM_DEV_ERROR(dev, "%s: failed to map phy base\n", __func__); |
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| 163 | 159 | return -ENOMEM; |
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| 164 | 160 | } |
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| 165 | 161 | |
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| .. | .. |
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| 177 | 173 | |
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| 178 | 174 | ret = msm_hdmi_phy_pll_init(pdev, phy->cfg->type); |
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| 179 | 175 | if (ret) { |
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| 180 | | - dev_err(dev, "couldn't init PLL\n"); |
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| 176 | + DRM_DEV_ERROR(dev, "couldn't init PLL\n"); |
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| 181 | 177 | msm_hdmi_phy_resource_disable(phy); |
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| 182 | 178 | return ret; |
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| 183 | 179 | } |
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