change otg to host mode

hc

2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777

 kernel/drivers/gpu/drm/gma500/mdfld_device.c
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@@ -1,29 +1,20 @@
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+// SPDX-License-Identifier: GPL-2.0-only
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 /**************************************************************************
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  * Copyright (c) 2011, Intel Corporation.
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  * All Rights Reserved.
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  *
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- * This program is free software; you can redistribute it and/or modify it
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- * under the terms and conditions of the GNU General Public License,
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- * version 2, as published by the Free Software Foundation.
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- *
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- * This program is distributed in the hope it will be useful, but WITHOUT
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- * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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- * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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- * more details.
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- *
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- * You should have received a copy of the GNU General Public License along with
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- * this program; if not, write to the Free Software Foundation, Inc.,
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- * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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- *
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  **************************************************************************/
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7
 
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-#include "psb_drv.h"
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-#include "mid_bios.h"
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-#include "mdfld_output.h"
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-#include "mdfld_dsi_output.h"
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-#include "tc35876x-dsi-lvds.h"
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+#include <linux/delay.h>
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+#include <linux/gpio/machine.h>
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 #include <asm/intel_scu_ipc.h>
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+
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+#include "mdfld_dsi_output.h"
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+#include "mdfld_output.h"
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+#include "mid_bios.h"
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+#include "psb_drv.h"
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+#include "tc35876x-dsi-lvds.h"
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 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
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@@ -342,7 +333,7 @@
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 	if (pipenum == 1) {
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 		/* restore palette (gamma) */
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-		/*DRM_UDELAY(50000); */
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+		/* udelay(50000); */
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 		for (i = 0; i < 256; i++)
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 			PSB_WVDC32(pipe->palette[i], map->palette + (i << 2));
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@@ -404,7 +395,7 @@
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 	PSB_WVDC32(pipe->conf, map->conf);
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 	/* restore palette (gamma) */
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-	/*DRM_UDELAY(50000); */
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+	/* udelay(50000); */
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 	for (i = 0; i < 256; i++)
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 		PSB_WVDC32(pipe->palette[i], map->palette + (i << 2));
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..
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@@ -515,12 +506,31 @@
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 	},
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 };
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+/*
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+ * The GPIO lines for resetting DSI pipe 0 and 2 are available in the
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+ * PCI device 0000:00:0c.0 on the Medfield.
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+ */
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+static struct gpiod_lookup_table mdfld_dsi_pipe_gpio_table = {
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+	.table  = {
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+		GPIO_LOOKUP("0000:00:0c.0", 128, "dsi-pipe0-reset",
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+			    GPIO_ACTIVE_HIGH),
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+		GPIO_LOOKUP("0000:00:0c.0", 34, "dsi-pipe2-reset",
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+			    GPIO_ACTIVE_HIGH),
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+		{ },
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+	},
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+};
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+
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 static int mdfld_chip_setup(struct drm_device *dev)
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 {
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 	struct drm_psb_private *dev_priv = dev->dev_private;
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 	if (pci_enable_msi(dev->pdev))
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 		dev_warn(dev->dev, "Enabling MSI failed!\n");
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 	dev_priv->regmap = mdfld_regmap;
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+
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+	/* Associate the GPIO lines with the DRM device */
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+	mdfld_dsi_pipe_gpio_table.dev_id = dev_name(dev->dev);
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+	gpiod_add_lookup_table(&mdfld_dsi_pipe_gpio_table);
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+
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 	return mid_chip_setup(dev);
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 }
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