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hc
2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777 
 kernel/drivers/crypto/qat/qat_common/qat_hal.c
....@@ -1,51 +1,8 @@
1
-/*
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-  This file is provided under a dual BSD/GPLv2 license.  When using or
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-  redistributing this file, you may do so under either license.
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-
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-  GPL LICENSE SUMMARY
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-  Copyright(c) 2014 Intel Corporation.
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-  This program is free software; you can redistribute it and/or modify
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-  it under the terms of version 2 of the GNU General Public License as
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-  published by the Free Software Foundation.
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-
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-  This program is distributed in the hope that it will be useful, but
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-  WITHOUT ANY WARRANTY; without even the implied warranty of
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-  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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-  General Public License for more details.
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-
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-  Contact Information:
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-  qat-linux@intel.com
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-
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-  BSD LICENSE
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-  Copyright(c) 2014 Intel Corporation.
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-  Redistribution and use in source and binary forms, with or without
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-  modification, are permitted provided that the following conditions
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-  are met:
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-
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-    * Redistributions of source code must retain the above copyright
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-      notice, this list of conditions and the following disclaimer.
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-    * Redistributions in binary form must reproduce the above copyright
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-      notice, this list of conditions and the following disclaimer in
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-      the documentation and/or other materials provided with the
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-      distribution.
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-    * Neither the name of Intel Corporation nor the names of its
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-      contributors may be used to endorse or promote products derived
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-      from this software without specific prior written permission.
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-
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-  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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-  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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-  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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-  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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-  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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-  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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-  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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-  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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-  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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-  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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-  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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-*/
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+// SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only)
2
+/* Copyright(c) 2014 - 2020 Intel Corporation */
473 #include <linux/slab.h>
484 #include <linux/delay.h>
5
+#include <linux/pci_ids.h>
496 
507 #include "adf_accel_devices.h"
518 #include "adf_common_drv.h"
....@@ -78,13 +35,13 @@
7835 
7936 #define AE(handle, ae) handle->hal_handle->aes[ae]
8037 
81
-static const uint64_t inst_4b[] = {
38
+static const u64 inst_4b[] = {
8239 	0x0F0400C0000ull, 0x0F4400C0000ull, 0x0F040000300ull, 0x0F440000300ull,
8340 	0x0FC066C0000ull, 0x0F0000C0300ull, 0x0F0000C0300ull, 0x0F0000C0300ull,
8441 	0x0A021000000ull
8542 };
8643 
87
-static const uint64_t inst[] = {
44
+static const u64 inst[] = {
8845 	0x0F0000C0000ull, 0x0F000000380ull, 0x0D805000011ull, 0x0FC082C0300ull,
8946 	0x0F0000C0300ull, 0x0F0000C0300ull, 0x0F0000C0300ull, 0x0F0000C0300ull,
9047 	0x0A0643C0000ull, 0x0BAC0000301ull, 0x0D802000101ull, 0x0F0000C0001ull,
....@@ -456,7 +413,7 @@
456413 	unsigned int csr_val;
457414 	int times = 30;
458415 
459
-	if (handle->pci_dev->device != ADF_DH895XCC_PCI_DEVICE_ID)
416
+	if (handle->pci_dev->device != PCI_DEVICE_ID_INTEL_QAT_DH895XCC)
460417 		return 0;
461418 
462419 	csr_val = ADF_CSR_RD(csr_addr, 0);
....@@ -546,7 +503,7 @@
546503 	qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, ctx);
547504 }
548505 
549
-static uint64_t qat_hal_parity_64bit(uint64_t word)
506
+static u64 qat_hal_parity_64bit(u64 word)
550507 {
551508 	word ^= word >> 1;
552509 	word ^= word >> 2;
....@@ -557,9 +514,9 @@
557514 	return word & 1;
558515 }
559516 
560
-static uint64_t qat_hal_set_uword_ecc(uint64_t uword)
517
+static u64 qat_hal_set_uword_ecc(u64 uword)
561518 {
562
-	uint64_t bit0_mask = 0xff800007fffULL, bit1_mask = 0x1f801ff801fULL,
519
+	u64 bit0_mask = 0xff800007fffULL, bit1_mask = 0x1f801ff801fULL,
563520 		bit2_mask = 0xe387e0781e1ULL, bit3_mask = 0x7cb8e388e22ULL,
564521 		bit4_mask = 0xaf5b2c93244ULL, bit5_mask = 0xf56d5525488ULL,
565522 		bit6_mask = 0xdaf69a46910ULL;
....@@ -578,7 +535,7 @@
578535 
579536 void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle,
580537 		       unsigned char ae, unsigned int uaddr,
581
-		       unsigned int words_num, uint64_t *uword)
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+		       unsigned int words_num, u64 *uword)
582539 {
583540 	unsigned int ustore_addr;
584541 	unsigned int i;
....@@ -588,7 +545,7 @@
588545 	qat_hal_wr_ae_csr(handle, ae, USTORE_ADDRESS, uaddr);
589546 	for (i = 0; i < words_num; i++) {
590547 		unsigned int uwrd_lo, uwrd_hi;
591
-		uint64_t tmp;
548
+		u64 tmp;
592549 
593550 		tmp = qat_hal_set_uword_ecc(uword[i]);
594551 		uwrd_lo = (unsigned int)(tmp & 0xffffffff);
....@@ -644,7 +601,7 @@
644601 		csr_val |= CE_NN_MODE;
645602 		qat_hal_wr_ae_csr(handle, ae, CTX_ENABLES, csr_val);
646603 		qat_hal_wr_uwords(handle, ae, 0, ARRAY_SIZE(inst),
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-				  (uint64_t *)inst);
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+				  (u64 *)inst);
648605 		qat_hal_wr_indr_csr(handle, ae, ctx_mask, CTX_STS_INDIRECT,
649606 				    handle->hal_handle->upc_mask &
650607 				    INIT_PC_VALUE);
....@@ -716,13 +673,13 @@
716673 		(void __iomem *)((uintptr_t)handle->hal_cap_ae_xfer_csr_addr_v +
717674 				 LOCAL_TO_XFER_REG_OFFSET);
718675 	handle->pci_dev = pci_info->pci_dev;
719
-	if (handle->pci_dev->device == ADF_DH895XCC_PCI_DEVICE_ID) {
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+	if (handle->pci_dev->device == PCI_DEVICE_ID_INTEL_QAT_DH895XCC) {
720677 		sram_bar =
721678 			&pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)];
722679 		handle->hal_sram_addr_v = sram_bar->virt_addr;
723680 	}
724681 	handle->fw_auth = (handle->pci_dev->device ==
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-			   ADF_DH895XCC_PCI_DEVICE_ID) ? false : true;
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+			   PCI_DEVICE_ID_INTEL_QAT_DH895XCC) ? false : true;
726683 	handle->hal_handle = kzalloc(sizeof(*handle->hal_handle), GFP_KERNEL);
727684 	if (!handle->hal_handle)
728685 		goto out_hal_handle;
....@@ -821,7 +778,7 @@
821778 
822779 static void qat_hal_get_uwords(struct icp_qat_fw_loader_handle *handle,
823780 			       unsigned char ae, unsigned int uaddr,
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-			       unsigned int words_num, uint64_t *uword)
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+			       unsigned int words_num, u64 *uword)
825782 {
826783 	unsigned int i, uwrd_lo, uwrd_hi;
827784 	unsigned int ustore_addr, misc_control;
....@@ -871,11 +828,11 @@
871828 #define MAX_EXEC_INST 100
872829 static int qat_hal_exec_micro_inst(struct icp_qat_fw_loader_handle *handle,
873830 				   unsigned char ae, unsigned char ctx,
874
-				   uint64_t *micro_inst, unsigned int inst_num,
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+				   u64 *micro_inst, unsigned int inst_num,
875832 				   int code_off, unsigned int max_cycle,
876833 				   unsigned int *endpc)
877834 {
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-	uint64_t savuwords[MAX_EXEC_INST];
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+	u64 savuwords[MAX_EXEC_INST];
879836 	unsigned int ind_lm_addr0, ind_lm_addr1;
880837 	unsigned int ind_lm_addr_byte0, ind_lm_addr_byte1;
881838 	unsigned int ind_cnt_sig;
....@@ -972,7 +929,7 @@
972929 	unsigned int ctxarb_cntl, ustore_addr, ctx_enables;
973930 	unsigned short reg_addr;
974931 	int status = 0;
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-	uint64_t insts, savuword;
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+	u64 insts, savuword;
976933 
977934 	reg_addr = qat_hal_get_reg_addr(reg_type, reg_num);
978935 	if (reg_addr == BAD_REGADDR) {
....@@ -984,7 +941,7 @@
984941 		insts = 0xA070000000ull | (reg_addr & 0x3ff);
985942 		break;
986943 	default:
987
-		insts = (uint64_t)0xA030000000ull | ((reg_addr & 0x3ff) << 10);
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+		insts = (u64)0xA030000000ull | ((reg_addr & 0x3ff) << 10);
988945 		break;
989946 	}
990947 	savctx = qat_hal_rd_ae_csr(handle, ae, ACTIVE_CTX_STATUS);
....@@ -1030,7 +987,7 @@
1030987 			      unsigned short reg_num, unsigned int data)
1031988 {
1032989 	unsigned short src_hiaddr, src_lowaddr, dest_addr, data16hi, data16lo;
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-	uint64_t insts[] = {
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+	u64 insts[] = {
1034991 		0x0F440000000ull,
1035992 		0x0F040000000ull,
1036993 		0x0F0000C0300ull,
....@@ -1076,13 +1033,13 @@
10761033 	return ARRAY_SIZE(inst_4b);
10771034 }
10781035 
1079
-static int qat_hal_concat_micro_code(uint64_t *micro_inst,
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+static int qat_hal_concat_micro_code(u64 *micro_inst,
10801037 				     unsigned int inst_num, unsigned int size,
10811038 				     unsigned int addr, unsigned int *value)
10821039 {
10831040 	int i;
10841041 	unsigned int cur_value;
1085
-	const uint64_t *inst_arr;
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+	const u64 *inst_arr;
10861043 	int fixup_offset;
10871044 	int usize = 0;
10881045 	int orig_num;
....@@ -1107,7 +1064,7 @@
11071064 
11081065 static int qat_hal_exec_micro_init_lm(struct icp_qat_fw_loader_handle *handle,
11091066 				      unsigned char ae, unsigned char ctx,
1110
-				      int *pfirst_exec, uint64_t *micro_inst,
1067
+				      int *pfirst_exec, u64 *micro_inst,
11111068 				      unsigned int inst_num)
11121069 {
11131070 	int stat = 0;
....@@ -1140,7 +1097,7 @@
11401097 			struct icp_qat_uof_batch_init *lm_init_header)
11411098 {
11421099 	struct icp_qat_uof_batch_init *plm_init;
1143
-	uint64_t *micro_inst_arry;
1100
+	u64 *micro_inst_arry;
11441101 	int micro_inst_num;
11451102 	int alloc_inst_size;
11461103 	int first_exec = 1;
....@@ -1150,7 +1107,7 @@
11501107 	alloc_inst_size = lm_init_header->size;
11511108 	if ((unsigned int)alloc_inst_size > handle->hal_handle->max_ustore)
11521109 		alloc_inst_size = handle->hal_handle->max_ustore;
1153
-	micro_inst_arry = kmalloc_array(alloc_inst_size, sizeof(uint64_t),
1110
+	micro_inst_arry = kmalloc_array(alloc_inst_size, sizeof(u64),
11541111 					GFP_KERNEL);
11551112 	if (!micro_inst_arry)
11561113 		return -ENOMEM;
....@@ -1229,7 +1186,7 @@
12291186 	    data16low;
12301187 	unsigned short reg_mask;
12311188 	int status = 0;
1232
-	uint64_t micro_inst[] = {
1189
+	u64 micro_inst[] = {
12331190 		0x0F440000000ull,
12341191 		0x0F040000000ull,
12351192 		0x0A000000000ull,