forked from ~ljy/RK356X_SDK_RELEASE
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2024-05-11 04dd17822334871b23ea2862f7798fb0e0007777 
 kernel/drivers/clk/socfpga/clk-s10.c
....@@ -12,35 +12,172 @@
1212 
1313 #include "stratix10-clk.h"
1414 
15
-static const char * const pll_mux[] = { "osc1", "cb-intosc-hs-div2-clk",
16
-					"f2s-free-clk",};
17
-static const char * const cntr_mux[] = { "main_pll", "periph_pll",
18
-					 "osc1", "cb-intosc-hs-div2-clk",
19
-					 "f2s-free-clk"};
20
-static const char * const boot_mux[] = { "osc1", "cb-intosc-hs-div2-clk",};
15
+static const struct clk_parent_data pll_mux[] = {
16
+	{ .fw_name = "osc1",
17
+	  .name = "osc1" },
18
+	{ .fw_name = "cb-intosc-hs-div2-clk",
19
+	  .name = "cb-intosc-hs-div2-clk" },
20
+	{ .fw_name = "f2s-free-clk",
21
+	  .name = "f2s-free-clk" },
22
+};
2123 
22
-static const char * const noc_free_mux[] = {"main_noc_base_clk",
23
-					    "peri_noc_base_clk",
24
-					    "osc1", "cb-intosc-hs-div2-clk",
25
-					    "f2s-free-clk"};
24
+static const struct clk_parent_data cntr_mux[] = {
25
+	{ .fw_name =  "main_pll",
26
+	  .name = "main_pll", },
27
+	{ .fw_name = "periph_pll",
28
+	  .name = "periph_pll", },
29
+	{ .fw_name = "osc1",
30
+	  .name = "osc1", },
31
+	{ .fw_name = "cb-intosc-hs-div2-clk",
32
+	  .name = "cb-intosc-hs-div2-clk", },
33
+	{ .fw_name = "f2s-free-clk",
34
+	  .name = "f2s-free-clk", },
35
+};
2636 
27
-static const char * const emaca_free_mux[] = {"peri_emaca_clk", "boot_clk"};
28
-static const char * const emacb_free_mux[] = {"peri_emacb_clk", "boot_clk"};
29
-static const char * const emac_ptp_free_mux[] = {"peri_emac_ptp_clk", "boot_clk"};
30
-static const char * const gpio_db_free_mux[] = {"peri_gpio_db_clk", "boot_clk"};
31
-static const char * const sdmmc_free_mux[] = {"main_sdmmc_clk", "boot_clk"};
32
-static const char * const s2f_usr1_free_mux[] = {"peri_s2f_usr1_clk", "boot_clk"};
33
-static const char * const psi_ref_free_mux[] = {"peri_psi_ref_clk", "boot_clk"};
34
-static const char * const mpu_mux[] = { "mpu_free_clk", "boot_clk",};
37
+static const struct clk_parent_data boot_mux[] = {
38
+	{ .fw_name = "osc1",
39
+	  .name = "osc1" },
40
+	{ .fw_name = "cb-intosc-hs-div2-clk",
41
+	  .name = "cb-intosc-hs-div2-clk" },
42
+};
3543 
36
-static const char * const s2f_usr0_mux[] = {"f2s-free-clk", "boot_clk"};
37
-static const char * const emac_mux[] = {"emaca_free_clk", "emacb_free_clk"};
38
-static const char * const noc_mux[] = {"noc_free_clk", "boot_clk"};
44
+static const struct clk_parent_data noc_free_mux[] = {
45
+	{ .fw_name = "main_noc_base_clk",
46
+	  .name = "main_noc_base_clk", },
47
+	{ .fw_name = "peri_noc_base_clk",
48
+	  .name = "peri_noc_base_clk", },
49
+	{ .fw_name = "osc1",
50
+	  .name = "osc1", },
51
+	{ .fw_name = "cb-intosc-hs-div2-clk",
52
+	  .name = "cb-intosc-hs-div2-clk", },
53
+	{ .fw_name = "f2s-free-clk",
54
+	  .name = "f2s-free-clk", },
55
+};
3956 
40
-static const char * const mpu_free_mux[] = {"main_mpu_base_clk",
41
-					    "peri_mpu_base_clk",
42
-					    "osc1", "cb-intosc-hs-div2-clk",
43
-					    "f2s-free-clk"};
57
+static const struct clk_parent_data emaca_free_mux[] = {
58
+	{ .fw_name = "peri_emaca_clk",
59
+	  .name = "peri_emaca_clk", },
60
+	{ .fw_name = "boot_clk",
61
+	  .name = "boot_clk", },
62
+};
63
+
64
+static const struct clk_parent_data emacb_free_mux[] = {
65
+	{ .fw_name = "peri_emacb_clk",
66
+	  .name = "peri_emacb_clk", },
67
+	{ .fw_name = "boot_clk",
68
+	  .name = "boot_clk", },
69
+};
70
+
71
+static const struct clk_parent_data emac_ptp_free_mux[] = {
72
+	{ .fw_name = "peri_emac_ptp_clk",
73
+	  .name = "peri_emac_ptp_clk", },
74
+	{ .fw_name = "boot_clk",
75
+	  .name = "boot_clk", },
76
+};
77
+
78
+static const struct clk_parent_data gpio_db_free_mux[] = {
79
+	{ .fw_name = "peri_gpio_db_clk",
80
+	  .name = "peri_gpio_db_clk", },
81
+	{ .fw_name = "boot_clk",
82
+	  .name = "boot_clk", },
83
+};
84
+
85
+static const struct clk_parent_data sdmmc_free_mux[] = {
86
+	{ .fw_name = "main_sdmmc_clk",
87
+	  .name = "main_sdmmc_clk", },
88
+	{ .fw_name = "boot_clk",
89
+	  .name = "boot_clk", },
90
+};
91
+
92
+static const struct clk_parent_data s2f_usr1_free_mux[] = {
93
+	{ .fw_name = "peri_s2f_usr1_clk",
94
+	  .name = "peri_s2f_usr1_clk", },
95
+	{ .fw_name = "boot_clk",
96
+	  .name = "boot_clk", },
97
+};
98
+
99
+static const struct clk_parent_data psi_ref_free_mux[] = {
100
+	{ .fw_name = "peri_psi_ref_clk",
101
+	  .name = "peri_psi_ref_clk", },
102
+	{ .fw_name = "boot_clk",
103
+	  .name = "boot_clk", },
104
+};
105
+
106
+static const struct clk_parent_data mpu_mux[] = {
107
+	{ .fw_name = "mpu_free_clk",
108
+	  .name = "mpu_free_clk", },
109
+	{ .fw_name = "boot_clk",
110
+	  .name = "boot_clk", },
111
+};
112
+
113
+static const struct clk_parent_data s2f_usr0_mux[] = {
114
+	{ .fw_name = "f2s-free-clk",
115
+	  .name = "f2s-free-clk", },
116
+	{ .fw_name = "boot_clk",
117
+	  .name = "boot_clk", },
118
+};
119
+
120
+static const struct clk_parent_data emac_mux[] = {
121
+	{ .fw_name = "emaca_free_clk",
122
+	  .name = "emaca_free_clk", },
123
+	{ .fw_name = "emacb_free_clk",
124
+	  .name = "emacb_free_clk", },
125
+};
126
+
127
+static const struct clk_parent_data noc_mux[] = {
128
+	{ .fw_name = "noc_free_clk",
129
+	  .name = "noc_free_clk", },
130
+	{ .fw_name = "boot_clk",
131
+	  .name = "boot_clk", },
132
+};
133
+
134
+static const struct clk_parent_data mpu_free_mux[] = {
135
+	{ .fw_name = "main_mpu_base_clk",
136
+	  .name = "main_mpu_base_clk", },
137
+	{ .fw_name = "peri_mpu_base_clk",
138
+	  .name = "peri_mpu_base_clk", },
139
+	{ .fw_name = "osc1",
140
+	  .name = "osc1", },
141
+	{ .fw_name = "cb-intosc-hs-div2-clk",
142
+	  .name = "cb-intosc-hs-div2-clk", },
143
+	{ .fw_name = "f2s-free-clk",
144
+	  .name = "f2s-free-clk", },
145
+};
146
+
147
+static const struct clk_parent_data sdmmc_mux[] = {
148
+	{ .fw_name = "sdmmc_free_clk",
149
+	  .name = "sdmmc_free_clk", },
150
+	{ .fw_name = "boot_clk",
151
+	  .name = "boot_clk", },
152
+};
153
+
154
+static const struct clk_parent_data s2f_user1_mux[] = {
155
+	{ .fw_name = "s2f_user1_free_clk",
156
+	  .name = "s2f_user1_free_clk", },
157
+	{ .fw_name = "boot_clk",
158
+	  .name = "boot_clk", },
159
+};
160
+
161
+static const struct clk_parent_data psi_mux[] = {
162
+	{ .fw_name = "psi_ref_free_clk",
163
+	  .name = "psi_ref_free_clk", },
164
+	{ .fw_name = "boot_clk",
165
+	  .name = "boot_clk", },
166
+};
167
+
168
+static const struct clk_parent_data gpio_db_mux[] = {
169
+	{ .fw_name = "gpio_db_free_clk",
170
+	  .name = "gpio_db_free_clk", },
171
+	{ .fw_name = "boot_clk",
172
+	  .name = "boot_clk", },
173
+};
174
+
175
+static const struct clk_parent_data emac_ptp_mux[] = {
176
+	{ .fw_name = "emac_ptp_free_clk",
177
+	  .name = "emac_ptp_free_clk", },
178
+	{ .fw_name = "boot_clk",
179
+	  .name = "boot_clk", },
180
+};
44181 
45182 /* clocks in AO (always on) controller */
46183 static const struct stratix10_pll_clock s10_pll_clks[] = {
....@@ -65,7 +202,7 @@
65202 	{ STRATIX10_MPU_FREE_CLK, "mpu_free_clk", NULL, mpu_free_mux, ARRAY_SIZE(mpu_free_mux),
66203 	   0, 0x48, 0, 0, 0},
67204 	{ STRATIX10_NOC_FREE_CLK, "noc_free_clk", NULL, noc_free_mux, ARRAY_SIZE(noc_free_mux),
68
-	  0, 0x4C, 0, 0, 0},
205
+	  0, 0x4C, 0, 0x3C, 1},
69206 	{ STRATIX10_MAIN_EMACA_CLK, "main_emaca_clk", "main_noc_base_clk", NULL, 1, 0,
70207 	  0x50, 0, 0, 0},
71208 	{ STRATIX10_MAIN_EMACB_CLK, "main_emacb_clk", "main_noc_base_clk", NULL, 1, 0,
....@@ -98,10 +235,8 @@
98235 	  0, 0xD4, 0, 0, 0},
99236 	{ STRATIX10_PERI_PSI_REF_CLK, "peri_psi_ref_clk", "peri_noc_base_clk", NULL, 1, 0,
100237 	  0xD8, 0, 0, 0},
101
-	{ STRATIX10_L4_SYS_FREE_CLK, "l4_sys_free_clk", "noc_free_clk", NULL, 1, 0,
102
-	  0, 4, 0, 0},
103
-	{ STRATIX10_NOC_CLK, "noc_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux),
104
-	  0, 0, 0, 0x3C, 1},
238
+	{ STRATIX10_L4_SYS_FREE_CLK, "l4_sys_free_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0,
239
+	  0, 4, 0x3C, 1},
105240 	{ STRATIX10_EMAC_A_FREE_CLK, "emaca_free_clk", NULL, emaca_free_mux, ARRAY_SIZE(emaca_free_mux),
106241 	  0, 0, 2, 0xB0, 0},
107242 	{ STRATIX10_EMAC_B_FREE_CLK, "emacb_free_clk", NULL, emacb_free_mux, ARRAY_SIZE(emacb_free_mux),
....@@ -125,20 +260,20 @@
125260 	  0, 0, 0, 0, 0, 0, 4},
126261 	{ STRATIX10_MPU_L2RAM_CLK, "mpu_l2ram_clk", "mpu_clk", NULL, 1, 0, 0x30,
127262 	  0, 0, 0, 0, 0, 0, 2},
128
-	{ STRATIX10_L4_MAIN_CLK, "l4_main_clk", "noc_clk", NULL, 1, 0, 0x30,
129
-	  1, 0x70, 0, 2, 0, 0, 0},
130
-	{ STRATIX10_L4_MP_CLK, "l4_mp_clk", "noc_clk", NULL, 1, 0, 0x30,
131
-	  2, 0x70, 8, 2, 0, 0, 0},
132
-	{ STRATIX10_L4_SP_CLK, "l4_sp_clk", "noc_clk", NULL, 1, CLK_IS_CRITICAL, 0x30,
133
-	  3, 0x70, 16, 2, 0, 0, 0},
134
-	{ STRATIX10_CS_AT_CLK, "cs_at_clk", "noc_clk", NULL, 1, 0, 0x30,
135
-	  4, 0x70, 24, 2, 0, 0, 0},
136
-	{ STRATIX10_CS_TRACE_CLK, "cs_trace_clk", "noc_clk", NULL, 1, 0, 0x30,
137
-	  4, 0x70, 26, 2, 0, 0, 0},
263
+	{ STRATIX10_L4_MAIN_CLK, "l4_main_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x30,
264
+	  1, 0x70, 0, 2, 0x3C, 1, 0},
265
+	{ STRATIX10_L4_MP_CLK, "l4_mp_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x30,
266
+	  2, 0x70, 8, 2, 0x3C, 1, 0},
267
+	{ STRATIX10_L4_SP_CLK, "l4_sp_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), CLK_IS_CRITICAL, 0x30,
268
+	  3, 0x70, 16, 2, 0x3C, 1, 0},
269
+	{ STRATIX10_CS_AT_CLK, "cs_at_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x30,
270
+	  4, 0x70, 24, 2, 0x3C, 1, 0},
271
+	{ STRATIX10_CS_TRACE_CLK, "cs_trace_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x30,
272
+	  4, 0x70, 26, 2, 0x3C, 1, 0},
138273 	{ STRATIX10_CS_PDBG_CLK, "cs_pdbg_clk", "cs_at_clk", NULL, 1, 0, 0x30,
139274 	  4, 0x70, 28, 1, 0, 0, 0},
140
-	{ STRATIX10_CS_TIMER_CLK, "cs_timer_clk", "noc_clk", NULL, 1, 0, 0x30,
141
-	  5, 0, 0, 0, 0, 0, 0},
275
+	{ STRATIX10_CS_TIMER_CLK, "cs_timer_clk", NULL, noc_mux, ARRAY_SIZE(noc_mux), 0, 0x30,
276
+	  5, 0, 0, 0, 0x3C, 1, 0},
142277 	{ STRATIX10_S2F_USER0_CLK, "s2f_user0_clk", NULL, s2f_usr0_mux, ARRAY_SIZE(s2f_usr0_mux), 0, 0x30,
143278 	  6, 0, 0, 0, 0, 0, 0},
144279 	{ STRATIX10_EMAC0_CLK, "emac0_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0xA4,
....@@ -147,22 +282,26 @@
147282 	  1, 0, 0, 0, 0xDC, 27, 0},
148283 	{ STRATIX10_EMAC2_CLK, "emac2_clk", NULL, emac_mux, ARRAY_SIZE(emac_mux), 0, 0xA4,
149284 	  2, 0, 0, 0, 0xDC, 28, 0},
150
-	{ STRATIX10_EMAC_PTP_CLK, "emac_ptp_clk", "emac_ptp_free_clk", NULL, 1, 0, 0xA4,
151
-	  3, 0, 0, 0, 0, 0, 0},
152
-	{ STRATIX10_GPIO_DB_CLK, "gpio_db_clk", "gpio_db_free_clk", NULL, 1, 0, 0xA4,
153
-	  4, 0xE0, 0, 16, 0, 0, 0},
154
-	{ STRATIX10_SDMMC_CLK, "sdmmc_clk", "sdmmc_free_clk", NULL, 1, 0, 0xA4,
155
-	  5, 0, 0, 0, 0, 0, 4},
156
-	{ STRATIX10_S2F_USER1_CLK, "s2f_user1_clk", "s2f_user1_free_clk", NULL, 1, 0, 0xA4,
157
-	  6, 0, 0, 0, 0, 0, 0},
158
-	{ STRATIX10_PSI_REF_CLK, "psi_ref_clk", "psi_ref_free_clk", NULL, 1, 0, 0xA4,
159
-	  7, 0, 0, 0, 0, 0, 0},
285
+	{ STRATIX10_EMAC_PTP_CLK, "emac_ptp_clk", NULL, emac_ptp_mux, ARRAY_SIZE(emac_ptp_mux), 0, 0xA4,
286
+	  3, 0, 0, 0, 0xB0, 2, 0},
287
+	{ STRATIX10_GPIO_DB_CLK, "gpio_db_clk", NULL, gpio_db_mux, ARRAY_SIZE(gpio_db_mux), 0, 0xA4,
288
+	  4, 0xE0, 0, 16, 0xB0, 3, 0},
289
+	{ STRATIX10_SDMMC_CLK, "sdmmc_clk", NULL, sdmmc_mux, ARRAY_SIZE(sdmmc_mux), 0, 0xA4,
290
+	  5, 0, 0, 0, 0xB0, 4, 4},
291
+	{ STRATIX10_S2F_USER1_CLK, "s2f_user1_clk", NULL, s2f_user1_mux, ARRAY_SIZE(s2f_user1_mux), 0, 0xA4,
292
+	  6, 0, 0, 0, 0xB0, 5, 0},
293
+	{ STRATIX10_PSI_REF_CLK, "psi_ref_clk", NULL, psi_mux, ARRAY_SIZE(psi_mux), 0, 0xA4,
294
+	  7, 0, 0, 0, 0xB0, 6, 0},
160295 	{ STRATIX10_USB_CLK, "usb_clk", "l4_mp_clk", NULL, 1, 0, 0xA4,
161296 	  8, 0, 0, 0, 0, 0, 0},
162297 	{ STRATIX10_SPI_M_CLK, "spi_m_clk", "l4_mp_clk", NULL, 1, 0, 0xA4,
163298 	  9, 0, 0, 0, 0, 0, 0},
164
-	{ STRATIX10_NAND_CLK, "nand_clk", "l4_main_clk", NULL, 1, 0, 0xA4,
299
+	{ STRATIX10_NAND_X_CLK, "nand_x_clk", "l4_mp_clk", NULL, 1, 0, 0xA4,
165300 	  10, 0, 0, 0, 0, 0, 0},
301
+	{ STRATIX10_NAND_CLK, "nand_clk", "nand_x_clk", NULL, 1, 0, 0xA4,
302
+	  10, 0, 0, 0, 0, 0, 4},
303
+	{ STRATIX10_NAND_ECC_CLK, "nand_ecc_clk", "nand_x_clk", NULL, 1, 0, 0xA4,
304
+	  10, 0, 0, 0, 0, 0, 4},
166305 };
167306 
168307 static int s10_clk_register_c_perip(const struct stratix10_perip_c_clock *clks,
....@@ -173,9 +312,7 @@
173312 	int i;
174313 
175314 	for (i = 0; i < nums; i++) {
176
-		clk = s10_register_periph(clks[i].name, clks[i].parent_name,
177
-					  clks[i].parent_names, clks[i].num_parents,
178
-					  clks[i].flags, base, clks[i].offset);
315
+		clk = s10_register_periph(&clks[i], base);
179316 		if (IS_ERR(clk)) {
180317 			pr_err("%s: failed to register clock %s\n",
181318 			       __func__, clks[i].name);
....@@ -194,14 +331,7 @@
194331 	int i;
195332 
196333 	for (i = 0; i < nums; i++) {
197
-		clk = s10_register_cnt_periph(clks[i].name, clks[i].parent_name,
198
-					      clks[i].parent_names,
199
-					      clks[i].num_parents,
200
-					      clks[i].flags, base,
201
-					      clks[i].offset,
202
-					      clks[i].fixed_divider,
203
-					      clks[i].bypass_reg,
204
-					      clks[i].bypass_shift);
334
+		clk = s10_register_cnt_periph(&clks[i], base);
205335 		if (IS_ERR(clk)) {
206336 			pr_err("%s: failed to register clock %s\n",
207337 			       __func__, clks[i].name);
....@@ -221,16 +351,7 @@
221351 	int i;
222352 
223353 	for (i = 0; i < nums; i++) {
224
-		clk = s10_register_gate(clks[i].name, clks[i].parent_name,
225
-					clks[i].parent_names,
226
-					clks[i].num_parents,
227
-					clks[i].flags, base,
228
-					clks[i].gate_reg,
229
-					clks[i].gate_idx, clks[i].div_reg,
230
-					clks[i].div_offset, clks[i].div_width,
231
-					clks[i].bypass_reg,
232
-					clks[i].bypass_shift,
233
-					clks[i].fixed_div);
354
+		clk = s10_register_gate(&clks[i], base);
234355 		if (IS_ERR(clk)) {
235356 			pr_err("%s: failed to register clock %s\n",
236357 			       __func__, clks[i].name);
....@@ -250,10 +371,7 @@
250371 	int i;
251372 
252373 	for (i = 0; i < nums; i++) {
253
-		clk = s10_register_pll(clks[i].name, clks[i].parent_names,
254
-				    clks[i].num_parents,
255
-				    clks[i].flags, base,
256
-				    clks[i].offset);
374
+		clk = s10_register_pll(&clks[i], base);
257375 		if (IS_ERR(clk)) {
258376 			pr_err("%s: failed to register clock %s\n",
259377 			       __func__, clks[i].name);